tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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kernel / drivers / pinctrl / qcom / pinctrl-sm8750.c
at nocache-cleanup 1730 lines 56 kB view raw
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6#include <linux/module.h> 7#include <linux/of.h> 8#include <linux/platform_device.h> 9 10#include "pinctrl-msm.h" 11 12#define REG_SIZE 0x1000 13 14#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 15 { \ 16 .grp = PINCTRL_PINGROUP("gpio" #id, \ 17 gpio##id##_pins, \ 18 ARRAY_SIZE(gpio##id##_pins)), \ 19 .funcs = (int[]){ \ 20 msm_mux_gpio, /* gpio mode */ \ 21 msm_mux_##f1, \ 22 msm_mux_##f2, \ 23 msm_mux_##f3, \ 24 msm_mux_##f4, \ 25 msm_mux_##f5, \ 26 msm_mux_##f6, \ 27 msm_mux_##f7, \ 28 msm_mux_##f8, \ 29 msm_mux_##f9, \ 30 msm_mux_##f10, \ 31 msm_mux_##f11 /* egpio mode */ \ 32 }, \ 33 .nfuncs = 12, \ 34 .ctl_reg = REG_SIZE * id, \ 35 .io_reg = 0x4 + REG_SIZE * id, \ 36 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 37 .intr_status_reg = 0xc + REG_SIZE * id, \ 38 .intr_target_reg = 0x8 + REG_SIZE * id, \ 39 .mux_bit = 2, \ 40 .pull_bit = 0, \ 41 .drv_bit = 6, \ 42 .egpio_enable = 12, \ 43 .egpio_present = 11, \ 44 .oe_bit = 9, \ 45 .in_bit = 0, \ 46 .out_bit = 1, \ 47 .intr_enable_bit = 0, \ 48 .intr_status_bit = 0, \ 49 .intr_wakeup_present_bit = 6, \ 50 .intr_wakeup_enable_bit = 7, \ 51 .intr_target_bit = 8, \ 52 .intr_target_kpss_val = 3, \ 53 .intr_raw_status_bit = 4, \ 54 .intr_polarity_bit = 1, \ 55 .intr_detection_bit = 2, \ 56 .intr_detection_width = 2, \ 57 } 58 59#define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 60 { \ 61 .grp = PINCTRL_PINGROUP(#pg_name, \ 62 pg_name##_pins, \ 63 ARRAY_SIZE(pg_name##_pins)), \ 64 .ctl_reg = ctl, \ 65 .io_reg = 0, \ 66 .intr_cfg_reg = 0, \ 67 .intr_status_reg = 0, \ 68 .intr_target_reg = 0, \ 69 .mux_bit = -1, \ 70 .pull_bit = pull, \ 71 .drv_bit = drv, \ 72 .oe_bit = -1, \ 73 .in_bit = -1, \ 74 .out_bit = -1, \ 75 .intr_enable_bit = -1, \ 76 .intr_status_bit = -1, \ 77 .intr_target_bit = -1, \ 78 .intr_raw_status_bit = -1, \ 79 .intr_polarity_bit = -1, \ 80 .intr_detection_bit = -1, \ 81 .intr_detection_width = -1, \ 82 } 83 84#define UFS_RESET(pg_name, ctl, io) \ 85 { \ 86 .grp = PINCTRL_PINGROUP(#pg_name, \ 87 pg_name##_pins, \ 88 ARRAY_SIZE(pg_name##_pins)), \ 89 .ctl_reg = ctl, \ 90 .io_reg = io, \ 91 .intr_cfg_reg = 0, \ 92 .intr_status_reg = 0, \ 93 .intr_target_reg = 0, \ 94 .mux_bit = -1, \ 95 .pull_bit = 3, \ 96 .drv_bit = 0, \ 97 .oe_bit = -1, \ 98 .in_bit = -1, \ 99 .out_bit = 0, \ 100 .intr_enable_bit = -1, \ 101 .intr_status_bit = -1, \ 102 .intr_target_bit = -1, \ 103 .intr_raw_status_bit = -1, \ 104 .intr_polarity_bit = -1, \ 105 .intr_detection_bit = -1, \ 106 .intr_detection_width = -1, \ 107 } 108 109static const struct pinctrl_pin_desc sm8750_pins[] = { 110 PINCTRL_PIN(0, "GPIO_0"), 111 PINCTRL_PIN(1, "GPIO_1"), 112 PINCTRL_PIN(2, "GPIO_2"), 113 PINCTRL_PIN(3, "GPIO_3"), 114 PINCTRL_PIN(4, "GPIO_4"), 115 PINCTRL_PIN(5, "GPIO_5"), 116 PINCTRL_PIN(6, "GPIO_6"), 117 PINCTRL_PIN(7, "GPIO_7"), 118 PINCTRL_PIN(8, "GPIO_8"), 119 PINCTRL_PIN(9, "GPIO_9"), 120 PINCTRL_PIN(10, "GPIO_10"), 121 PINCTRL_PIN(11, "GPIO_11"), 122 PINCTRL_PIN(12, "GPIO_12"), 123 PINCTRL_PIN(13, "GPIO_13"), 124 PINCTRL_PIN(14, "GPIO_14"), 125 PINCTRL_PIN(15, "GPIO_15"), 126 PINCTRL_PIN(16, "GPIO_16"), 127 PINCTRL_PIN(17, "GPIO_17"), 128 PINCTRL_PIN(18, "GPIO_18"), 129 PINCTRL_PIN(19, "GPIO_19"), 130 PINCTRL_PIN(20, "GPIO_20"), 131 PINCTRL_PIN(21, "GPIO_21"), 132 PINCTRL_PIN(22, "GPIO_22"), 133 PINCTRL_PIN(23, "GPIO_23"), 134 PINCTRL_PIN(24, "GPIO_24"), 135 PINCTRL_PIN(25, "GPIO_25"), 136 PINCTRL_PIN(26, "GPIO_26"), 137 PINCTRL_PIN(27, "GPIO_27"), 138 PINCTRL_PIN(28, "GPIO_28"), 139 PINCTRL_PIN(29, "GPIO_29"), 140 PINCTRL_PIN(30, "GPIO_30"), 141 PINCTRL_PIN(31, "GPIO_31"), 142 PINCTRL_PIN(32, "GPIO_32"), 143 PINCTRL_PIN(33, "GPIO_33"), 144 PINCTRL_PIN(34, "GPIO_34"), 145 PINCTRL_PIN(35, "GPIO_35"), 146 PINCTRL_PIN(36, "GPIO_36"), 147 PINCTRL_PIN(37, "GPIO_37"), 148 PINCTRL_PIN(38, "GPIO_38"), 149 PINCTRL_PIN(39, "GPIO_39"), 150 PINCTRL_PIN(40, "GPIO_40"), 151 PINCTRL_PIN(41, "GPIO_41"), 152 PINCTRL_PIN(42, "GPIO_42"), 153 PINCTRL_PIN(43, "GPIO_43"), 154 PINCTRL_PIN(44, "GPIO_44"), 155 PINCTRL_PIN(45, "GPIO_45"), 156 PINCTRL_PIN(46, "GPIO_46"), 157 PINCTRL_PIN(47, "GPIO_47"), 158 PINCTRL_PIN(48, "GPIO_48"), 159 PINCTRL_PIN(49, "GPIO_49"), 160 PINCTRL_PIN(50, "GPIO_50"), 161 PINCTRL_PIN(51, "GPIO_51"), 162 PINCTRL_PIN(52, "GPIO_52"), 163 PINCTRL_PIN(53, "GPIO_53"), 164 PINCTRL_PIN(54, "GPIO_54"), 165 PINCTRL_PIN(55, "GPIO_55"), 166 PINCTRL_PIN(56, "GPIO_56"), 167 PINCTRL_PIN(57, "GPIO_57"), 168 PINCTRL_PIN(58, "GPIO_58"), 169 PINCTRL_PIN(59, "GPIO_59"), 170 PINCTRL_PIN(60, "GPIO_60"), 171 PINCTRL_PIN(61, "GPIO_61"), 172 PINCTRL_PIN(62, "GPIO_62"), 173 PINCTRL_PIN(63, "GPIO_63"), 174 PINCTRL_PIN(64, "GPIO_64"), 175 PINCTRL_PIN(65, "GPIO_65"), 176 PINCTRL_PIN(66, "GPIO_66"), 177 PINCTRL_PIN(67, "GPIO_67"), 178 PINCTRL_PIN(68, "GPIO_68"), 179 PINCTRL_PIN(69, "GPIO_69"), 180 PINCTRL_PIN(70, "GPIO_70"), 181 PINCTRL_PIN(71, "GPIO_71"), 182 PINCTRL_PIN(72, "GPIO_72"), 183 PINCTRL_PIN(73, "GPIO_73"), 184 PINCTRL_PIN(74, "GPIO_74"), 185 PINCTRL_PIN(75, "GPIO_75"), 186 PINCTRL_PIN(76, "GPIO_76"), 187 PINCTRL_PIN(77, "GPIO_77"), 188 PINCTRL_PIN(78, "GPIO_78"), 189 PINCTRL_PIN(79, "GPIO_79"), 190 PINCTRL_PIN(80, "GPIO_80"), 191 PINCTRL_PIN(81, "GPIO_81"), 192 PINCTRL_PIN(82, "GPIO_82"), 193 PINCTRL_PIN(83, "GPIO_83"), 194 PINCTRL_PIN(84, "GPIO_84"), 195 PINCTRL_PIN(85, "GPIO_85"), 196 PINCTRL_PIN(86, "GPIO_86"), 197 PINCTRL_PIN(87, "GPIO_87"), 198 PINCTRL_PIN(88, "GPIO_88"), 199 PINCTRL_PIN(89, "GPIO_89"), 200 PINCTRL_PIN(90, "GPIO_90"), 201 PINCTRL_PIN(91, "GPIO_91"), 202 PINCTRL_PIN(92, "GPIO_92"), 203 PINCTRL_PIN(93, "GPIO_93"), 204 PINCTRL_PIN(94, "GPIO_94"), 205 PINCTRL_PIN(95, "GPIO_95"), 206 PINCTRL_PIN(96, "GPIO_96"), 207 PINCTRL_PIN(97, "GPIO_97"), 208 PINCTRL_PIN(98, "GPIO_98"), 209 PINCTRL_PIN(99, "GPIO_99"), 210 PINCTRL_PIN(100, "GPIO_100"), 211 PINCTRL_PIN(101, "GPIO_101"), 212 PINCTRL_PIN(102, "GPIO_102"), 213 PINCTRL_PIN(103, "GPIO_103"), 214 PINCTRL_PIN(104, "GPIO_104"), 215 PINCTRL_PIN(105, "GPIO_105"), 216 PINCTRL_PIN(106, "GPIO_106"), 217 PINCTRL_PIN(107, "GPIO_107"), 218 PINCTRL_PIN(108, "GPIO_108"), 219 PINCTRL_PIN(109, "GPIO_109"), 220 PINCTRL_PIN(110, "GPIO_110"), 221 PINCTRL_PIN(111, "GPIO_111"), 222 PINCTRL_PIN(112, "GPIO_112"), 223 PINCTRL_PIN(113, "GPIO_113"), 224 PINCTRL_PIN(114, "GPIO_114"), 225 PINCTRL_PIN(115, "GPIO_115"), 226 PINCTRL_PIN(116, "GPIO_116"), 227 PINCTRL_PIN(117, "GPIO_117"), 228 PINCTRL_PIN(118, "GPIO_118"), 229 PINCTRL_PIN(119, "GPIO_119"), 230 PINCTRL_PIN(120, "GPIO_120"), 231 PINCTRL_PIN(121, "GPIO_121"), 232 PINCTRL_PIN(122, "GPIO_122"), 233 PINCTRL_PIN(123, "GPIO_123"), 234 PINCTRL_PIN(124, "GPIO_124"), 235 PINCTRL_PIN(125, "GPIO_125"), 236 PINCTRL_PIN(126, "GPIO_126"), 237 PINCTRL_PIN(127, "GPIO_127"), 238 PINCTRL_PIN(128, "GPIO_128"), 239 PINCTRL_PIN(129, "GPIO_129"), 240 PINCTRL_PIN(130, "GPIO_130"), 241 PINCTRL_PIN(131, "GPIO_131"), 242 PINCTRL_PIN(132, "GPIO_132"), 243 PINCTRL_PIN(133, "GPIO_133"), 244 PINCTRL_PIN(134, "GPIO_134"), 245 PINCTRL_PIN(135, "GPIO_135"), 246 PINCTRL_PIN(136, "GPIO_136"), 247 PINCTRL_PIN(137, "GPIO_137"), 248 PINCTRL_PIN(138, "GPIO_138"), 249 PINCTRL_PIN(139, "GPIO_139"), 250 PINCTRL_PIN(140, "GPIO_140"), 251 PINCTRL_PIN(141, "GPIO_141"), 252 PINCTRL_PIN(142, "GPIO_142"), 253 PINCTRL_PIN(143, "GPIO_143"), 254 PINCTRL_PIN(144, "GPIO_144"), 255 PINCTRL_PIN(145, "GPIO_145"), 256 PINCTRL_PIN(146, "GPIO_146"), 257 PINCTRL_PIN(147, "GPIO_147"), 258 PINCTRL_PIN(148, "GPIO_148"), 259 PINCTRL_PIN(149, "GPIO_149"), 260 PINCTRL_PIN(150, "GPIO_150"), 261 PINCTRL_PIN(151, "GPIO_151"), 262 PINCTRL_PIN(152, "GPIO_152"), 263 PINCTRL_PIN(153, "GPIO_153"), 264 PINCTRL_PIN(154, "GPIO_154"), 265 PINCTRL_PIN(155, "GPIO_155"), 266 PINCTRL_PIN(156, "GPIO_156"), 267 PINCTRL_PIN(157, "GPIO_157"), 268 PINCTRL_PIN(158, "GPIO_158"), 269 PINCTRL_PIN(159, "GPIO_159"), 270 PINCTRL_PIN(160, "GPIO_160"), 271 PINCTRL_PIN(161, "GPIO_161"), 272 PINCTRL_PIN(162, "GPIO_162"), 273 PINCTRL_PIN(163, "GPIO_163"), 274 PINCTRL_PIN(164, "GPIO_164"), 275 PINCTRL_PIN(165, "GPIO_165"), 276 PINCTRL_PIN(166, "GPIO_166"), 277 PINCTRL_PIN(167, "GPIO_167"), 278 PINCTRL_PIN(168, "GPIO_168"), 279 PINCTRL_PIN(169, "GPIO_169"), 280 PINCTRL_PIN(170, "GPIO_170"), 281 PINCTRL_PIN(171, "GPIO_171"), 282 PINCTRL_PIN(172, "GPIO_172"), 283 PINCTRL_PIN(173, "GPIO_173"), 284 PINCTRL_PIN(174, "GPIO_174"), 285 PINCTRL_PIN(175, "GPIO_175"), 286 PINCTRL_PIN(176, "GPIO_176"), 287 PINCTRL_PIN(177, "GPIO_177"), 288 PINCTRL_PIN(178, "GPIO_178"), 289 PINCTRL_PIN(179, "GPIO_179"), 290 PINCTRL_PIN(180, "GPIO_180"), 291 PINCTRL_PIN(181, "GPIO_181"), 292 PINCTRL_PIN(182, "GPIO_182"), 293 PINCTRL_PIN(183, "GPIO_183"), 294 PINCTRL_PIN(184, "GPIO_184"), 295 PINCTRL_PIN(185, "GPIO_185"), 296 PINCTRL_PIN(186, "GPIO_186"), 297 PINCTRL_PIN(187, "GPIO_187"), 298 PINCTRL_PIN(188, "GPIO_188"), 299 PINCTRL_PIN(189, "GPIO_189"), 300 PINCTRL_PIN(190, "GPIO_190"), 301 PINCTRL_PIN(191, "GPIO_191"), 302 PINCTRL_PIN(192, "GPIO_192"), 303 PINCTRL_PIN(193, "GPIO_193"), 304 PINCTRL_PIN(194, "GPIO_194"), 305 PINCTRL_PIN(195, "GPIO_195"), 306 PINCTRL_PIN(196, "GPIO_196"), 307 PINCTRL_PIN(197, "GPIO_197"), 308 PINCTRL_PIN(198, "GPIO_198"), 309 PINCTRL_PIN(199, "GPIO_199"), 310 PINCTRL_PIN(200, "GPIO_200"), 311 PINCTRL_PIN(201, "GPIO_201"), 312 PINCTRL_PIN(202, "GPIO_202"), 313 PINCTRL_PIN(203, "GPIO_203"), 314 PINCTRL_PIN(204, "GPIO_204"), 315 PINCTRL_PIN(205, "GPIO_205"), 316 PINCTRL_PIN(206, "GPIO_206"), 317 PINCTRL_PIN(207, "GPIO_207"), 318 PINCTRL_PIN(208, "GPIO_208"), 319 PINCTRL_PIN(209, "GPIO_209"), 320 PINCTRL_PIN(210, "GPIO_210"), 321 PINCTRL_PIN(211, "GPIO_211"), 322 PINCTRL_PIN(212, "GPIO_212"), 323 PINCTRL_PIN(213, "GPIO_213"), 324 PINCTRL_PIN(214, "GPIO_214"), 325 PINCTRL_PIN(215, "UFS_RESET"), 326 PINCTRL_PIN(216, "SDC2_CLK"), 327 PINCTRL_PIN(217, "SDC2_CMD"), 328 PINCTRL_PIN(218, "SDC2_DATA"), 329}; 330 331#define DECLARE_MSM_GPIO_PINS(pin) \ 332 static const unsigned int gpio##pin##_pins[] = { pin } 333DECLARE_MSM_GPIO_PINS(0); 334DECLARE_MSM_GPIO_PINS(1); 335DECLARE_MSM_GPIO_PINS(2); 336DECLARE_MSM_GPIO_PINS(3); 337DECLARE_MSM_GPIO_PINS(4); 338DECLARE_MSM_GPIO_PINS(5); 339DECLARE_MSM_GPIO_PINS(6); 340DECLARE_MSM_GPIO_PINS(7); 341DECLARE_MSM_GPIO_PINS(8); 342DECLARE_MSM_GPIO_PINS(9); 343DECLARE_MSM_GPIO_PINS(10); 344DECLARE_MSM_GPIO_PINS(11); 345DECLARE_MSM_GPIO_PINS(12); 346DECLARE_MSM_GPIO_PINS(13); 347DECLARE_MSM_GPIO_PINS(14); 348DECLARE_MSM_GPIO_PINS(15); 349DECLARE_MSM_GPIO_PINS(16); 350DECLARE_MSM_GPIO_PINS(17); 351DECLARE_MSM_GPIO_PINS(18); 352DECLARE_MSM_GPIO_PINS(19); 353DECLARE_MSM_GPIO_PINS(20); 354DECLARE_MSM_GPIO_PINS(21); 355DECLARE_MSM_GPIO_PINS(22); 356DECLARE_MSM_GPIO_PINS(23); 357DECLARE_MSM_GPIO_PINS(24); 358DECLARE_MSM_GPIO_PINS(25); 359DECLARE_MSM_GPIO_PINS(26); 360DECLARE_MSM_GPIO_PINS(27); 361DECLARE_MSM_GPIO_PINS(28); 362DECLARE_MSM_GPIO_PINS(29); 363DECLARE_MSM_GPIO_PINS(30); 364DECLARE_MSM_GPIO_PINS(31); 365DECLARE_MSM_GPIO_PINS(32); 366DECLARE_MSM_GPIO_PINS(33); 367DECLARE_MSM_GPIO_PINS(34); 368DECLARE_MSM_GPIO_PINS(35); 369DECLARE_MSM_GPIO_PINS(36); 370DECLARE_MSM_GPIO_PINS(37); 371DECLARE_MSM_GPIO_PINS(38); 372DECLARE_MSM_GPIO_PINS(39); 373DECLARE_MSM_GPIO_PINS(40); 374DECLARE_MSM_GPIO_PINS(41); 375DECLARE_MSM_GPIO_PINS(42); 376DECLARE_MSM_GPIO_PINS(43); 377DECLARE_MSM_GPIO_PINS(44); 378DECLARE_MSM_GPIO_PINS(45); 379DECLARE_MSM_GPIO_PINS(46); 380DECLARE_MSM_GPIO_PINS(47); 381DECLARE_MSM_GPIO_PINS(48); 382DECLARE_MSM_GPIO_PINS(49); 383DECLARE_MSM_GPIO_PINS(50); 384DECLARE_MSM_GPIO_PINS(51); 385DECLARE_MSM_GPIO_PINS(52); 386DECLARE_MSM_GPIO_PINS(53); 387DECLARE_MSM_GPIO_PINS(54); 388DECLARE_MSM_GPIO_PINS(55); 389DECLARE_MSM_GPIO_PINS(56); 390DECLARE_MSM_GPIO_PINS(57); 391DECLARE_MSM_GPIO_PINS(58); 392DECLARE_MSM_GPIO_PINS(59); 393DECLARE_MSM_GPIO_PINS(60); 394DECLARE_MSM_GPIO_PINS(61); 395DECLARE_MSM_GPIO_PINS(62); 396DECLARE_MSM_GPIO_PINS(63); 397DECLARE_MSM_GPIO_PINS(64); 398DECLARE_MSM_GPIO_PINS(65); 399DECLARE_MSM_GPIO_PINS(66); 400DECLARE_MSM_GPIO_PINS(67); 401DECLARE_MSM_GPIO_PINS(68); 402DECLARE_MSM_GPIO_PINS(69); 403DECLARE_MSM_GPIO_PINS(70); 404DECLARE_MSM_GPIO_PINS(71); 405DECLARE_MSM_GPIO_PINS(72); 406DECLARE_MSM_GPIO_PINS(73); 407DECLARE_MSM_GPIO_PINS(74); 408DECLARE_MSM_GPIO_PINS(75); 409DECLARE_MSM_GPIO_PINS(76); 410DECLARE_MSM_GPIO_PINS(77); 411DECLARE_MSM_GPIO_PINS(78); 412DECLARE_MSM_GPIO_PINS(79); 413DECLARE_MSM_GPIO_PINS(80); 414DECLARE_MSM_GPIO_PINS(81); 415DECLARE_MSM_GPIO_PINS(82); 416DECLARE_MSM_GPIO_PINS(83); 417DECLARE_MSM_GPIO_PINS(84); 418DECLARE_MSM_GPIO_PINS(85); 419DECLARE_MSM_GPIO_PINS(86); 420DECLARE_MSM_GPIO_PINS(87); 421DECLARE_MSM_GPIO_PINS(88); 422DECLARE_MSM_GPIO_PINS(89); 423DECLARE_MSM_GPIO_PINS(90); 424DECLARE_MSM_GPIO_PINS(91); 425DECLARE_MSM_GPIO_PINS(92); 426DECLARE_MSM_GPIO_PINS(93); 427DECLARE_MSM_GPIO_PINS(94); 428DECLARE_MSM_GPIO_PINS(95); 429DECLARE_MSM_GPIO_PINS(96); 430DECLARE_MSM_GPIO_PINS(97); 431DECLARE_MSM_GPIO_PINS(98); 432DECLARE_MSM_GPIO_PINS(99); 433DECLARE_MSM_GPIO_PINS(100); 434DECLARE_MSM_GPIO_PINS(101); 435DECLARE_MSM_GPIO_PINS(102); 436DECLARE_MSM_GPIO_PINS(103); 437DECLARE_MSM_GPIO_PINS(104); 438DECLARE_MSM_GPIO_PINS(105); 439DECLARE_MSM_GPIO_PINS(106); 440DECLARE_MSM_GPIO_PINS(107); 441DECLARE_MSM_GPIO_PINS(108); 442DECLARE_MSM_GPIO_PINS(109); 443DECLARE_MSM_GPIO_PINS(110); 444DECLARE_MSM_GPIO_PINS(111); 445DECLARE_MSM_GPIO_PINS(112); 446DECLARE_MSM_GPIO_PINS(113); 447DECLARE_MSM_GPIO_PINS(114); 448DECLARE_MSM_GPIO_PINS(115); 449DECLARE_MSM_GPIO_PINS(116); 450DECLARE_MSM_GPIO_PINS(117); 451DECLARE_MSM_GPIO_PINS(118); 452DECLARE_MSM_GPIO_PINS(119); 453DECLARE_MSM_GPIO_PINS(120); 454DECLARE_MSM_GPIO_PINS(121); 455DECLARE_MSM_GPIO_PINS(122); 456DECLARE_MSM_GPIO_PINS(123); 457DECLARE_MSM_GPIO_PINS(124); 458DECLARE_MSM_GPIO_PINS(125); 459DECLARE_MSM_GPIO_PINS(126); 460DECLARE_MSM_GPIO_PINS(127); 461DECLARE_MSM_GPIO_PINS(128); 462DECLARE_MSM_GPIO_PINS(129); 463DECLARE_MSM_GPIO_PINS(130); 464DECLARE_MSM_GPIO_PINS(131); 465DECLARE_MSM_GPIO_PINS(132); 466DECLARE_MSM_GPIO_PINS(133); 467DECLARE_MSM_GPIO_PINS(134); 468DECLARE_MSM_GPIO_PINS(135); 469DECLARE_MSM_GPIO_PINS(136); 470DECLARE_MSM_GPIO_PINS(137); 471DECLARE_MSM_GPIO_PINS(138); 472DECLARE_MSM_GPIO_PINS(139); 473DECLARE_MSM_GPIO_PINS(140); 474DECLARE_MSM_GPIO_PINS(141); 475DECLARE_MSM_GPIO_PINS(142); 476DECLARE_MSM_GPIO_PINS(143); 477DECLARE_MSM_GPIO_PINS(144); 478DECLARE_MSM_GPIO_PINS(145); 479DECLARE_MSM_GPIO_PINS(146); 480DECLARE_MSM_GPIO_PINS(147); 481DECLARE_MSM_GPIO_PINS(148); 482DECLARE_MSM_GPIO_PINS(149); 483DECLARE_MSM_GPIO_PINS(150); 484DECLARE_MSM_GPIO_PINS(151); 485DECLARE_MSM_GPIO_PINS(152); 486DECLARE_MSM_GPIO_PINS(153); 487DECLARE_MSM_GPIO_PINS(154); 488DECLARE_MSM_GPIO_PINS(155); 489DECLARE_MSM_GPIO_PINS(156); 490DECLARE_MSM_GPIO_PINS(157); 491DECLARE_MSM_GPIO_PINS(158); 492DECLARE_MSM_GPIO_PINS(159); 493DECLARE_MSM_GPIO_PINS(160); 494DECLARE_MSM_GPIO_PINS(161); 495DECLARE_MSM_GPIO_PINS(162); 496DECLARE_MSM_GPIO_PINS(163); 497DECLARE_MSM_GPIO_PINS(164); 498DECLARE_MSM_GPIO_PINS(165); 499DECLARE_MSM_GPIO_PINS(166); 500DECLARE_MSM_GPIO_PINS(167); 501DECLARE_MSM_GPIO_PINS(168); 502DECLARE_MSM_GPIO_PINS(169); 503DECLARE_MSM_GPIO_PINS(170); 504DECLARE_MSM_GPIO_PINS(171); 505DECLARE_MSM_GPIO_PINS(172); 506DECLARE_MSM_GPIO_PINS(173); 507DECLARE_MSM_GPIO_PINS(174); 508DECLARE_MSM_GPIO_PINS(175); 509DECLARE_MSM_GPIO_PINS(176); 510DECLARE_MSM_GPIO_PINS(177); 511DECLARE_MSM_GPIO_PINS(178); 512DECLARE_MSM_GPIO_PINS(179); 513DECLARE_MSM_GPIO_PINS(180); 514DECLARE_MSM_GPIO_PINS(181); 515DECLARE_MSM_GPIO_PINS(182); 516DECLARE_MSM_GPIO_PINS(183); 517DECLARE_MSM_GPIO_PINS(184); 518DECLARE_MSM_GPIO_PINS(185); 519DECLARE_MSM_GPIO_PINS(186); 520DECLARE_MSM_GPIO_PINS(187); 521DECLARE_MSM_GPIO_PINS(188); 522DECLARE_MSM_GPIO_PINS(189); 523DECLARE_MSM_GPIO_PINS(190); 524DECLARE_MSM_GPIO_PINS(191); 525DECLARE_MSM_GPIO_PINS(192); 526DECLARE_MSM_GPIO_PINS(193); 527DECLARE_MSM_GPIO_PINS(194); 528DECLARE_MSM_GPIO_PINS(195); 529DECLARE_MSM_GPIO_PINS(196); 530DECLARE_MSM_GPIO_PINS(197); 531DECLARE_MSM_GPIO_PINS(198); 532DECLARE_MSM_GPIO_PINS(199); 533DECLARE_MSM_GPIO_PINS(200); 534DECLARE_MSM_GPIO_PINS(201); 535DECLARE_MSM_GPIO_PINS(202); 536DECLARE_MSM_GPIO_PINS(203); 537DECLARE_MSM_GPIO_PINS(204); 538DECLARE_MSM_GPIO_PINS(205); 539DECLARE_MSM_GPIO_PINS(206); 540DECLARE_MSM_GPIO_PINS(207); 541DECLARE_MSM_GPIO_PINS(208); 542DECLARE_MSM_GPIO_PINS(209); 543DECLARE_MSM_GPIO_PINS(210); 544DECLARE_MSM_GPIO_PINS(211); 545DECLARE_MSM_GPIO_PINS(212); 546DECLARE_MSM_GPIO_PINS(213); 547DECLARE_MSM_GPIO_PINS(214); 548 549static const unsigned int ufs_reset_pins[] = { 215 }; 550static const unsigned int sdc2_clk_pins[] = { 216 }; 551static const unsigned int sdc2_cmd_pins[] = { 217 }; 552static const unsigned int sdc2_data_pins[] = { 218 }; 553 554enum sm8750_functions { 555 msm_mux_gpio, 556 msm_mux_aoss_cti, 557 msm_mux_atest_char, 558 msm_mux_atest_usb, 559 msm_mux_audio_ext_mclk0, 560 msm_mux_audio_ext_mclk1, 561 msm_mux_audio_ref_clk, 562 msm_mux_cam_aon_mclk2, 563 msm_mux_cam_aon_mclk4, 564 msm_mux_cam_mclk, 565 msm_mux_cci_async_in, 566 msm_mux_cci_i2c_scl, 567 msm_mux_cci_i2c_sda, 568 msm_mux_cci_timer, 569 msm_mux_cmu_rng, 570 msm_mux_coex_uart1_rx, 571 msm_mux_coex_uart1_tx, 572 msm_mux_coex_uart2_rx, 573 msm_mux_coex_uart2_tx, 574 msm_mux_dbg_out_clk, 575 msm_mux_ddr_bist_complete, 576 msm_mux_ddr_bist_fail, 577 msm_mux_ddr_bist_start, 578 msm_mux_ddr_bist_stop, 579 msm_mux_ddr_pxi0, 580 msm_mux_ddr_pxi1, 581 msm_mux_ddr_pxi2, 582 msm_mux_ddr_pxi3, 583 msm_mux_dp_hot, 584 msm_mux_egpio, 585 msm_mux_gcc_gp1, 586 msm_mux_gcc_gp2, 587 msm_mux_gcc_gp3, 588 msm_mux_gnss_adc0, 589 msm_mux_gnss_adc1, 590 msm_mux_i2chub0_se0, 591 msm_mux_i2chub0_se1, 592 msm_mux_i2chub0_se2, 593 msm_mux_i2chub0_se3, 594 msm_mux_i2chub0_se4, 595 msm_mux_i2chub0_se5, 596 msm_mux_i2chub0_se6, 597 msm_mux_i2chub0_se7, 598 msm_mux_i2chub0_se8, 599 msm_mux_i2chub0_se9, 600 msm_mux_i2s0_data0, 601 msm_mux_i2s0_data1, 602 msm_mux_i2s0_sck, 603 msm_mux_i2s0_ws, 604 msm_mux_i2s1_data0, 605 msm_mux_i2s1_data1, 606 msm_mux_i2s1_sck, 607 msm_mux_i2s1_ws, 608 msm_mux_ibi_i3c, 609 msm_mux_jitter_bist, 610 msm_mux_mdp_esync0_out, 611 msm_mux_mdp_esync1_out, 612 msm_mux_mdp_vsync, 613 msm_mux_mdp_vsync0_out, 614 msm_mux_mdp_vsync1_out, 615 msm_mux_mdp_vsync2_out, 616 msm_mux_mdp_vsync3_out, 617 msm_mux_mdp_vsync5_out, 618 msm_mux_mdp_vsync_e, 619 msm_mux_nav_gpio0, 620 msm_mux_nav_gpio1, 621 msm_mux_nav_gpio2, 622 msm_mux_nav_gpio3, 623 msm_mux_pcie0_clk_req_n, 624 msm_mux_phase_flag, 625 msm_mux_pll_bist_sync, 626 msm_mux_pll_clk_aux, 627 msm_mux_prng_rosc0, 628 msm_mux_prng_rosc1, 629 msm_mux_prng_rosc2, 630 msm_mux_prng_rosc3, 631 msm_mux_qdss_cti, 632 msm_mux_qlink_big_enable, 633 msm_mux_qlink_big_request, 634 msm_mux_qlink_little_enable, 635 msm_mux_qlink_little_request, 636 msm_mux_qlink_wmss, 637 msm_mux_qspi0, 638 msm_mux_qspi1, 639 msm_mux_qspi2, 640 msm_mux_qspi3, 641 msm_mux_qspi_clk, 642 msm_mux_qspi_cs, 643 msm_mux_qup1_se0, 644 msm_mux_qup1_se1, 645 msm_mux_qup1_se2, 646 msm_mux_qup1_se3, 647 msm_mux_qup1_se4, 648 msm_mux_qup1_se5, 649 msm_mux_qup1_se6, 650 msm_mux_qup1_se7, 651 msm_mux_qup2_se0, 652 msm_mux_qup2_se1, 653 msm_mux_qup2_se2, 654 msm_mux_qup2_se3, 655 msm_mux_qup2_se4, 656 msm_mux_qup2_se5, 657 msm_mux_qup2_se6, 658 msm_mux_qup2_se7, 659 msm_mux_sd_write_protect, 660 msm_mux_sdc40, 661 msm_mux_sdc41, 662 msm_mux_sdc42, 663 msm_mux_sdc43, 664 msm_mux_sdc4_clk, 665 msm_mux_sdc4_cmd, 666 msm_mux_tb_trig_sdc2, 667 msm_mux_tb_trig_sdc4, 668 msm_mux_tmess_prng0, 669 msm_mux_tmess_prng1, 670 msm_mux_tmess_prng2, 671 msm_mux_tmess_prng3, 672 msm_mux_tsense_pwm1, 673 msm_mux_tsense_pwm2, 674 msm_mux_tsense_pwm3, 675 msm_mux_tsense_pwm4, 676 msm_mux_uim0_clk, 677 msm_mux_uim0_data, 678 msm_mux_uim0_present, 679 msm_mux_uim0_reset, 680 msm_mux_uim1_clk, 681 msm_mux_uim1_data, 682 msm_mux_uim1_present, 683 msm_mux_uim1_reset, 684 msm_mux_usb1_hs, 685 msm_mux_usb_phy, 686 msm_mux_vfr_0, 687 msm_mux_vfr_1, 688 msm_mux_vsense_trigger_mirnat, 689 msm_mux_wcn_sw, 690 msm_mux_wcn_sw_ctrl, 691 msm_mux__, 692}; 693 694static const char *const gpio_groups[] = { 695 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 696 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 697 "gpio12", "gpio13", "gpio14", "gpio15", "gpio16", "gpio17", 698 "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", 699 "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", 700 "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", 701 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", 702 "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", 703 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 704 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 705 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 706 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 707 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 708 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", 709 "gpio84", "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", 710 "gpio90", "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", 711 "gpio96", "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", 712 "gpio102", "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", 713 "gpio108", "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", 714 "gpio114", "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", 715 "gpio120", "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", 716 "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", 717 "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137", 718 "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143", 719 "gpio144", "gpio145", "gpio146", "gpio147", "gpio148", "gpio149", 720 "gpio150", "gpio151", "gpio152", "gpio153", "gpio154", "gpio155", 721 "gpio156", "gpio157", "gpio158", "gpio159", "gpio160", "gpio161", 722 "gpio162", "gpio163", "gpio164", "gpio165", "gpio166", "gpio167", 723 "gpio168", "gpio169", "gpio170", "gpio171", "gpio172", "gpio173", 724 "gpio174", "gpio175", "gpio176", "gpio177", "gpio178", "gpio179", 725 "gpio180", "gpio181", "gpio182", "gpio183", "gpio184", "gpio185", 726 "gpio186", "gpio187", "gpio188", "gpio189", "gpio190", "gpio191", 727 "gpio192", "gpio193", "gpio194", "gpio195", "gpio196", "gpio197", 728 "gpio198", "gpio199", "gpio200", "gpio201", "gpio202", "gpio203", 729 "gpio204", "gpio205", "gpio206", "gpio207", "gpio208", "gpio209", 730 "gpio210", "gpio211", "gpio212", "gpio213", "gpio214", 731}; 732 733static const char *const egpio_groups[] = { 734 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 735 "gpio6", "gpio7", "gpio32", "gpio33", "gpio34", "gpio35", 736 "gpio36", "gpio37", "gpio105", "gpio106", "gpio107", "gpio108", 737 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 738 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 739 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 740 "gpio183", "gpio184", "gpio185", "gpio186", "gpio187", "gpio188", 741 "gpio189", "gpio190", "gpio191", "gpio192", "gpio193", "gpio194", 742 "gpio195", "gpio196", "gpio197", "gpio198", "gpio199", "gpio200", 743 "gpio201", "gpio202", "gpio203", "gpio204", "gpio205", "gpio206", 744 "gpio207", "gpio208", "gpio209", "gpio210", "gpio211", "gpio212", 745 "gpio213", "gpio214", 746}; 747 748static const char *const aoss_cti_groups[] = { 749 "gpio50", "gpio51", "gpio60", "gpio61", 750}; 751 752static const char *const atest_char_groups[] = { 753 "gpio130", "gpio131", "gpio132", "gpio133", "gpio137", 754}; 755 756static const char *const atest_usb_groups[] = { 757 "gpio70", "gpio71", "gpio72", "gpio73", "gpio76", 758}; 759 760static const char *const audio_ext_mclk0_groups[] = { 761 "gpio125", 762}; 763 764static const char *const audio_ext_mclk1_groups[] = { 765 "gpio124", 766}; 767 768static const char *const audio_ref_clk_groups[] = { 769 "gpio124", 770}; 771 772static const char *const cam_aon_mclk2_groups[] = { 773 "gpio91", 774}; 775 776static const char *const cam_aon_mclk4_groups[] = { 777 "gpio93", 778}; 779 780static const char *const cam_mclk_groups[] = { 781 "gpio89", "gpio90", "gpio92", "gpio94", "gpio95", "gpio96", 782}; 783 784static const char *const cci_async_in_groups[] = { 785 "gpio10", "gpio11", "gpio15", 786}; 787 788static const char *const cci_i2c_scl_groups[] = { 789 "gpio114", "gpio116", "gpio118", "gpio120", "gpio153", "gpio164", 790}; 791 792static const char *const cci_i2c_sda_groups[] = { 793 "gpio111", "gpio112", "gpio113", "gpio115", "gpio117", "gpio119", 794}; 795 796static const char *const cci_timer_groups[] = { 797 "gpio109", "gpio110", "gpio111", "gpio163", "gpio164", 798}; 799 800static const char *const cmu_rng_groups[] = { 801 "gpio40", "gpio41", "gpio41", "gpio43", "gpio148", "gpio149", 802 "gpio150", "gpio151", 803}; 804 805static const char *const coex_uart1_rx_groups[] = { 806 "gpio148", 807}; 808 809static const char *const coex_uart1_tx_groups[] = { 810 "gpio149", 811}; 812 813static const char *const coex_uart2_rx_groups[] = { 814 "gpio150", 815}; 816 817static const char *const coex_uart2_tx_groups[] = { 818 "gpio151", 819}; 820 821static const char *const dbg_out_clk_groups[] = { 822 "gpio78", 823}; 824 825static const char *const ddr_bist_complete_groups[] = { 826 "gpio44", 827}; 828 829static const char *const ddr_bist_fail_groups[] = { 830 "gpio40", 831}; 832 833static const char *const ddr_bist_start_groups[] = { 834 "gpio41", 835}; 836 837static const char *const ddr_bist_stop_groups[] = { 838 "gpio45", 839}; 840 841static const char *const ddr_pxi0_groups[] = { 842 "gpio54", "gpio55", 843}; 844 845static const char *const ddr_pxi1_groups[] = { 846 "gpio44", "gpio45", 847}; 848 849static const char *const ddr_pxi2_groups[] = { 850 "gpio43", "gpio52", 851}; 852 853static const char *const ddr_pxi3_groups[] = { 854 "gpio46", "gpio53", 855}; 856 857static const char *const dp_hot_groups[] = { 858 "gpio47", 859}; 860 861static const char *const gcc_gp1_groups[] = { 862 "gpio86", "gpio134", 863}; 864 865static const char *const gcc_gp2_groups[] = { 866 "gpio87", "gpio135", 867}; 868 869static const char *const gcc_gp3_groups[] = { 870 "gpio88", "gpio136", 871}; 872 873static const char *const gnss_adc0_groups[] = { 874 "gpio78", "gpio79", 875}; 876 877static const char *const gnss_adc1_groups[] = { 878 "gpio77", "gpio99", 879}; 880 881static const char *const i2chub0_se0_groups[] = { 882 "gpio64", "gpio65", 883}; 884 885static const char *const i2chub0_se1_groups[] = { 886 "gpio66", "gpio67", 887}; 888 889static const char *const i2chub0_se2_groups[] = { 890 "gpio68", "gpio69", 891}; 892 893static const char *const i2chub0_se3_groups[] = { 894 "gpio70", "gpio71", 895}; 896 897static const char *const i2chub0_se4_groups[] = { 898 "gpio72", "gpio73", 899}; 900 901static const char *const i2chub0_se5_groups[] = { 902 "gpio74", "gpio75", 903}; 904 905static const char *const i2chub0_se6_groups[] = { 906 "gpio76", "gpio77", 907}; 908 909static const char *const i2chub0_se7_groups[] = { 910 "gpio82", "gpio83", 911}; 912 913static const char *const i2chub0_se8_groups[] = { 914 "gpio206", "gpio207", 915}; 916 917static const char *const i2chub0_se9_groups[] = { 918 "gpio80", "gpio81", 919}; 920 921static const char *const i2s0_data0_groups[] = { 922 "gpio127", 923}; 924 925static const char *const i2s0_data1_groups[] = { 926 "gpio128", 927}; 928 929static const char *const i2s0_sck_groups[] = { 930 "gpio126", 931}; 932 933static const char *const i2s0_ws_groups[] = { 934 "gpio129", 935}; 936 937static const char *const i2s1_data0_groups[] = { 938 "gpio122", 939}; 940 941static const char *const i2s1_data1_groups[] = { 942 "gpio124", 943}; 944 945static const char *const i2s1_sck_groups[] = { 946 "gpio121", 947}; 948 949static const char *const i2s1_ws_groups[] = { 950 "gpio123", 951}; 952 953static const char *const ibi_i3c_groups[] = { 954 "gpio0", "gpio1", "gpio4", "gpio5", "gpio8", "gpio9", 955 "gpio12", "gpio13", "gpio28", "gpio29", "gpio32", "gpio33", 956 "gpio36", "gpio37", "gpio48", "gpio49", 957}; 958 959static const char *const jitter_bist_groups[] = { 960 "gpio73", 961}; 962 963static const char *const mdp_esync0_out_groups[] = { 964 "gpio88", 965}; 966 967static const char *const mdp_esync1_out_groups[] = { 968 "gpio100", 969}; 970 971static const char *const mdp_vsync_groups[] = { 972 "gpio86", "gpio87", "gpio97", "gpio98", 973}; 974 975static const char *const mdp_vsync0_out_groups[] = { 976 "gpio86", 977}; 978 979static const char *const mdp_vsync1_out_groups[] = { 980 "gpio86", 981}; 982 983static const char *const mdp_vsync2_out_groups[] = { 984 "gpio87", 985}; 986 987static const char *const mdp_vsync3_out_groups[] = { 988 "gpio87", 989}; 990 991static const char *const mdp_vsync5_out_groups[] = { 992 "gpio87", 993}; 994 995static const char *const mdp_vsync_e_groups[] = { 996 "gpio88", 997}; 998 999static const char *const nav_gpio0_groups[] = { 1000 "gpio154", 1001}; 1002 1003static const char *const nav_gpio1_groups[] = { 1004 "gpio155", 1005}; 1006 1007static const char *const nav_gpio2_groups[] = { 1008 "gpio152", 1009}; 1010 1011static const char *const nav_gpio3_groups[] = { 1012 "gpio154", 1013}; 1014 1015static const char *const pcie0_clk_req_n_groups[] = { 1016 "gpio103", 1017}; 1018 1019static const char *const phase_flag_groups[] = { 1020 "gpio10", "gpio11", "gpio14", "gpio15", "gpio16", "gpio17", "gpio18", 1021 "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", "gpio24", "gpio25", 1022 "gpio26", "gpio27", "gpio28", "gpio29", "gpio31", "gpio64", "gpio65", 1023 "gpio66", "gpio67", "gpio68", "gpio69", "gpio82", "gpio83", "gpio85", 1024 "gpio101", "gpio102", "gpio103", "gpio104", 1025}; 1026 1027static const char *const pll_bist_sync_groups[] = { 1028 "gpio104", 1029}; 1030 1031static const char *const pll_clk_aux_groups[] = { 1032 "gpio95", 1033}; 1034 1035static const char *const prng_rosc0_groups[] = { 1036 "gpio85", 1037}; 1038 1039static const char *const prng_rosc1_groups[] = { 1040 "gpio64", 1041}; 1042 1043static const char *const prng_rosc2_groups[] = { 1044 "gpio65", 1045}; 1046 1047static const char *const prng_rosc3_groups[] = { 1048 "gpio66", 1049}; 1050 1051static const char *const qdss_cti_groups[] = { 1052 "gpio27", "gpio31", "gpio72", "gpio73", "gpio82", "gpio83", "gpio159", 1053 "gpio162", 1054}; 1055 1056static const char *const qlink_big_enable_groups[] = { 1057 "gpio160", 1058}; 1059 1060static const char *const qlink_big_request_groups[] = { 1061 "gpio159", 1062}; 1063 1064static const char *const qlink_little_enable_groups[] = { 1065 "gpio157", 1066}; 1067 1068static const char *const qlink_little_request_groups[] = { 1069 "gpio156", 1070}; 1071 1072static const char *const qlink_wmss_groups[] = { 1073 "gpio158", 1074}; 1075 1076static const char *const qspi0_groups[] = { 1077 "gpio52", 1078}; 1079 1080static const char *const qspi1_groups[] = { 1081 "gpio53", 1082}; 1083 1084static const char *const qspi2_groups[] = { 1085 "gpio55", 1086}; 1087 1088static const char *const qspi3_groups[] = { 1089 "gpio56", 1090}; 1091 1092static const char *const qspi_clk_groups[] = { 1093 "gpio54", 1094}; 1095 1096static const char *const qspi_cs_groups[] = { 1097 "gpio57", "gpio58", 1098}; 1099 1100static const char *const qup1_se0_groups[] = { 1101 "gpio32", "gpio33", "gpio34", "gpio35", 1102}; 1103 1104static const char *const qup1_se1_groups[] = { 1105 "gpio36", "gpio37", "gpio38", "gpio39", 1106}; 1107 1108static const char *const qup1_se2_groups[] = { 1109 "gpio40", "gpio41", "gpio42", "gpio43", "gpio134", "gpio135", "gpio136", 1110}; 1111 1112static const char *const qup1_se3_groups[] = { 1113 "gpio44", "gpio45", "gpio46", "gpio47", 1114}; 1115 1116static const char *const qup1_se4_groups[] = { 1117 "gpio48", "gpio49", "gpio50", "gpio51", 1118}; 1119 1120static const char *const qup1_se5_groups[] = { 1121 "gpio52", "gpio53", "gpio54", "gpio55", 1122}; 1123 1124static const char *const qup1_se6_groups[] = { 1125 "gpio56", "gpio57", "gpio58", "gpio59", 1126}; 1127 1128static const char *const qup1_se7_groups[] = { 1129 "gpio60", "gpio61", "gpio62", "gpio63", 1130}; 1131 1132static const char *const qup2_se0_groups[] = { 1133 "gpio0", "gpio1", "gpio2", "gpio3", 1134}; 1135 1136static const char *const qup2_se1_groups[] = { 1137 "gpio4", "gpio5", "gpio6", "gpio7", 1138}; 1139 1140static const char *const qup2_se2_groups[] = { 1141 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio15", 1142}; 1143 1144static const char *const qup2_se3_groups[] = { 1145 "gpio12", "gpio13", "gpio14", "gpio15", 1146}; 1147 1148static const char *const qup2_se4_groups[] = { 1149 "gpio16", "gpio17", "gpio18", "gpio19", 1150}; 1151 1152static const char *const qup2_se5_groups[] = { 1153 "gpio20", "gpio21", "gpio22", "gpio23", 1154}; 1155 1156static const char *const qup2_se6_groups[] = { 1157 "gpio24", "gpio25", "gpio26", "gpio27", 1158}; 1159 1160static const char *const qup2_se7_groups[] = { 1161 "gpio28", "gpio29", "gpio30", "gpio31", 1162}; 1163 1164static const char *const sd_write_protect_groups[] = { 1165 "gpio85", 1166}; 1167 1168static const char *const sdc40_groups[] = { 1169 "gpio36", "gpio49", 1170}; 1171 1172static const char *const sdc41_groups[] = { 1173 "gpio37", "gpio51", 1174}; 1175 1176static const char *const sdc42_groups[] = { 1177 "gpio38", "gpio60", 1178}; 1179 1180static const char *const sdc43_groups[] = { 1181 "gpio39", "gpio61", 1182}; 1183 1184static const char *const sdc4_clk_groups[] = { 1185 "gpio50", "gpio150", 1186}; 1187 1188static const char *const sdc4_cmd_groups[] = { 1189 "gpio48", "gpio151", 1190}; 1191 1192static const char *const tb_trig_sdc2_groups[] = { 1193 "gpio89", 1194}; 1195 1196static const char *const tb_trig_sdc4_groups[] = { 1197 "gpio147", 1198}; 1199 1200static const char *const tmess_prng0_groups[] = { 1201 "gpio85", 1202}; 1203 1204static const char *const tmess_prng1_groups[] = { 1205 "gpio64", 1206}; 1207 1208static const char *const tmess_prng2_groups[] = { 1209 "gpio65", 1210}; 1211 1212static const char *const tmess_prng3_groups[] = { 1213 "gpio66", 1214}; 1215 1216static const char *const tsense_pwm1_groups[] = { 1217 "gpio57", 1218}; 1219 1220static const char *const tsense_pwm2_groups[] = { 1221 "gpio57", 1222}; 1223 1224static const char *const tsense_pwm3_groups[] = { 1225 "gpio57", 1226}; 1227 1228static const char *const tsense_pwm4_groups[] = { 1229 "gpio57", 1230}; 1231 1232static const char *const uim0_clk_groups[] = { 1233 "gpio131", 1234}; 1235 1236static const char *const uim0_data_groups[] = { 1237 "gpio130", 1238}; 1239 1240static const char *const uim0_present_groups[] = { 1241 "gpio133", 1242}; 1243 1244static const char *const uim0_reset_groups[] = { 1245 "gpio132", 1246}; 1247 1248static const char *const uim1_clk_groups[] = { 1249 "gpio37", "gpio55", "gpio71", "gpio135", 1250}; 1251 1252static const char *const uim1_data_groups[] = { 1253 "gpio134", "gpio36", "gpio54", "gpio70", 1254}; 1255 1256static const char *const uim1_present_groups[] = { 1257 "gpio137", 1258}; 1259 1260static const char *const uim1_reset_groups[] = { 1261 "gpio39", "gpio56", "gpio72", "gpio136", 1262}; 1263 1264static const char *const usb1_hs_groups[] = { 1265 "gpio79", 1266}; 1267 1268static const char *const usb_phy_groups[] = { 1269 "gpio59", "gpio61", 1270}; 1271 1272static const char *const vfr_0_groups[] = { 1273 "gpio150", 1274}; 1275 1276static const char *const vfr_1_groups[] = { 1277 "gpio155", 1278}; 1279 1280static const char *const vsense_trigger_mirnat_groups[] = { 1281 "gpio59", 1282}; 1283 1284static const char *const wcn_sw_groups[] = { 1285 "gpio19", 1286}; 1287 1288static const char *const wcn_sw_ctrl_groups[] = { 1289 "gpio18", 1290}; 1291 1292static const struct pinfunction sm8750_functions[] = { 1293 MSM_GPIO_PIN_FUNCTION(gpio), 1294 MSM_PIN_FUNCTION(aoss_cti), 1295 MSM_PIN_FUNCTION(atest_char), 1296 MSM_PIN_FUNCTION(atest_usb), 1297 MSM_PIN_FUNCTION(audio_ext_mclk0), 1298 MSM_PIN_FUNCTION(audio_ext_mclk1), 1299 MSM_PIN_FUNCTION(audio_ref_clk), 1300 MSM_PIN_FUNCTION(cam_aon_mclk2), 1301 MSM_PIN_FUNCTION(cam_aon_mclk4), 1302 MSM_PIN_FUNCTION(cam_mclk), 1303 MSM_PIN_FUNCTION(cci_async_in), 1304 MSM_PIN_FUNCTION(cci_i2c_scl), 1305 MSM_PIN_FUNCTION(cci_i2c_sda), 1306 MSM_PIN_FUNCTION(cci_timer), 1307 MSM_PIN_FUNCTION(cmu_rng), 1308 MSM_PIN_FUNCTION(coex_uart1_rx), 1309 MSM_PIN_FUNCTION(coex_uart1_tx), 1310 MSM_PIN_FUNCTION(coex_uart2_rx), 1311 MSM_PIN_FUNCTION(coex_uart2_tx), 1312 MSM_PIN_FUNCTION(dbg_out_clk), 1313 MSM_PIN_FUNCTION(ddr_bist_complete), 1314 MSM_PIN_FUNCTION(ddr_bist_fail), 1315 MSM_PIN_FUNCTION(ddr_bist_start), 1316 MSM_PIN_FUNCTION(ddr_bist_stop), 1317 MSM_PIN_FUNCTION(ddr_pxi0), 1318 MSM_PIN_FUNCTION(ddr_pxi1), 1319 MSM_PIN_FUNCTION(ddr_pxi2), 1320 MSM_PIN_FUNCTION(ddr_pxi3), 1321 MSM_PIN_FUNCTION(dp_hot), 1322 MSM_GPIO_PIN_FUNCTION(egpio), 1323 MSM_PIN_FUNCTION(gcc_gp1), 1324 MSM_PIN_FUNCTION(gcc_gp2), 1325 MSM_PIN_FUNCTION(gcc_gp3), 1326 MSM_PIN_FUNCTION(gnss_adc0), 1327 MSM_PIN_FUNCTION(gnss_adc1), 1328 MSM_PIN_FUNCTION(i2chub0_se0), 1329 MSM_PIN_FUNCTION(i2chub0_se1), 1330 MSM_PIN_FUNCTION(i2chub0_se2), 1331 MSM_PIN_FUNCTION(i2chub0_se3), 1332 MSM_PIN_FUNCTION(i2chub0_se4), 1333 MSM_PIN_FUNCTION(i2chub0_se5), 1334 MSM_PIN_FUNCTION(i2chub0_se6), 1335 MSM_PIN_FUNCTION(i2chub0_se7), 1336 MSM_PIN_FUNCTION(i2chub0_se8), 1337 MSM_PIN_FUNCTION(i2chub0_se9), 1338 MSM_PIN_FUNCTION(i2s0_data0), 1339 MSM_PIN_FUNCTION(i2s0_data1), 1340 MSM_PIN_FUNCTION(i2s0_sck), 1341 MSM_PIN_FUNCTION(i2s0_ws), 1342 MSM_PIN_FUNCTION(i2s1_data0), 1343 MSM_PIN_FUNCTION(i2s1_data1), 1344 MSM_PIN_FUNCTION(i2s1_sck), 1345 MSM_PIN_FUNCTION(i2s1_ws), 1346 MSM_PIN_FUNCTION(ibi_i3c), 1347 MSM_PIN_FUNCTION(jitter_bist), 1348 MSM_PIN_FUNCTION(mdp_esync0_out), 1349 MSM_PIN_FUNCTION(mdp_esync1_out), 1350 MSM_PIN_FUNCTION(mdp_vsync), 1351 MSM_PIN_FUNCTION(mdp_vsync0_out), 1352 MSM_PIN_FUNCTION(mdp_vsync1_out), 1353 MSM_PIN_FUNCTION(mdp_vsync2_out), 1354 MSM_PIN_FUNCTION(mdp_vsync3_out), 1355 MSM_PIN_FUNCTION(mdp_vsync5_out), 1356 MSM_PIN_FUNCTION(mdp_vsync_e), 1357 MSM_PIN_FUNCTION(nav_gpio0), 1358 MSM_PIN_FUNCTION(nav_gpio1), 1359 MSM_PIN_FUNCTION(nav_gpio2), 1360 MSM_PIN_FUNCTION(nav_gpio3), 1361 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1362 MSM_PIN_FUNCTION(phase_flag), 1363 MSM_PIN_FUNCTION(pll_bist_sync), 1364 MSM_PIN_FUNCTION(pll_clk_aux), 1365 MSM_PIN_FUNCTION(prng_rosc0), 1366 MSM_PIN_FUNCTION(prng_rosc1), 1367 MSM_PIN_FUNCTION(prng_rosc2), 1368 MSM_PIN_FUNCTION(prng_rosc3), 1369 MSM_PIN_FUNCTION(qdss_cti), 1370 MSM_PIN_FUNCTION(qlink_big_enable), 1371 MSM_PIN_FUNCTION(qlink_big_request), 1372 MSM_PIN_FUNCTION(qlink_little_enable), 1373 MSM_PIN_FUNCTION(qlink_little_request), 1374 MSM_PIN_FUNCTION(qlink_wmss), 1375 MSM_PIN_FUNCTION(qspi0), 1376 MSM_PIN_FUNCTION(qspi1), 1377 MSM_PIN_FUNCTION(qspi2), 1378 MSM_PIN_FUNCTION(qspi3), 1379 MSM_PIN_FUNCTION(qspi_clk), 1380 MSM_PIN_FUNCTION(qspi_cs), 1381 MSM_PIN_FUNCTION(qup1_se0), 1382 MSM_PIN_FUNCTION(qup1_se1), 1383 MSM_PIN_FUNCTION(qup1_se2), 1384 MSM_PIN_FUNCTION(qup1_se3), 1385 MSM_PIN_FUNCTION(qup1_se4), 1386 MSM_PIN_FUNCTION(qup1_se5), 1387 MSM_PIN_FUNCTION(qup1_se6), 1388 MSM_PIN_FUNCTION(qup1_se7), 1389 MSM_PIN_FUNCTION(qup2_se0), 1390 MSM_PIN_FUNCTION(qup2_se1), 1391 MSM_PIN_FUNCTION(qup2_se2), 1392 MSM_PIN_FUNCTION(qup2_se3), 1393 MSM_PIN_FUNCTION(qup2_se4), 1394 MSM_PIN_FUNCTION(qup2_se5), 1395 MSM_PIN_FUNCTION(qup2_se6), 1396 MSM_PIN_FUNCTION(qup2_se7), 1397 MSM_PIN_FUNCTION(sd_write_protect), 1398 MSM_PIN_FUNCTION(sdc40), 1399 MSM_PIN_FUNCTION(sdc41), 1400 MSM_PIN_FUNCTION(sdc42), 1401 MSM_PIN_FUNCTION(sdc43), 1402 MSM_PIN_FUNCTION(sdc4_clk), 1403 MSM_PIN_FUNCTION(sdc4_cmd), 1404 MSM_PIN_FUNCTION(tb_trig_sdc2), 1405 MSM_PIN_FUNCTION(tb_trig_sdc4), 1406 MSM_PIN_FUNCTION(tmess_prng0), 1407 MSM_PIN_FUNCTION(tmess_prng1), 1408 MSM_PIN_FUNCTION(tmess_prng2), 1409 MSM_PIN_FUNCTION(tmess_prng3), 1410 MSM_PIN_FUNCTION(tsense_pwm1), 1411 MSM_PIN_FUNCTION(tsense_pwm2), 1412 MSM_PIN_FUNCTION(tsense_pwm3), 1413 MSM_PIN_FUNCTION(tsense_pwm4), 1414 MSM_PIN_FUNCTION(uim0_clk), 1415 MSM_PIN_FUNCTION(uim0_data), 1416 MSM_PIN_FUNCTION(uim0_present), 1417 MSM_PIN_FUNCTION(uim0_reset), 1418 MSM_PIN_FUNCTION(uim1_clk), 1419 MSM_PIN_FUNCTION(uim1_data), 1420 MSM_PIN_FUNCTION(uim1_present), 1421 MSM_PIN_FUNCTION(uim1_reset), 1422 MSM_PIN_FUNCTION(usb1_hs), 1423 MSM_PIN_FUNCTION(usb_phy), 1424 MSM_PIN_FUNCTION(vfr_0), 1425 MSM_PIN_FUNCTION(vfr_1), 1426 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1427 MSM_PIN_FUNCTION(wcn_sw), 1428 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1429}; 1430 1431/* 1432 * Every pin is maintained as a single group, and missing or non-existing pin 1433 * would be maintained as dummy group to synchronize pin group index with 1434 * pin descriptor registered with pinctrl core. 1435 * Clients would not be able to request these dummy pin groups. 1436 */ 1437static const struct msm_pingroup sm8750_groups[] = { 1438 [0] = PINGROUP(0, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1439 [1] = PINGROUP(1, qup2_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1440 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1441 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, egpio), 1442 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1443 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1444 [6] = PINGROUP(6, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1445 [7] = PINGROUP(7, qup2_se1, _, _, _, _, _, _, _, _, _, egpio), 1446 [8] = PINGROUP(8, qup2_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1447 [9] = PINGROUP(9, qup2_se2, ibi_i3c, _, _, _, _, _, _, _, _, _), 1448 [10] = PINGROUP(10, qup2_se2, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1449 [11] = PINGROUP(11, qup2_se2, cci_async_in, phase_flag, _, _, _, _, _, _, _, _), 1450 [12] = PINGROUP(12, qup2_se3, ibi_i3c, qup2_se2, _, _, _, _, _, _, _, _), 1451 [13] = PINGROUP(13, qup2_se3, ibi_i3c, qup2_se2, _, _, _, _, _, _, _, _), 1452 [14] = PINGROUP(14, qup2_se3, phase_flag, _, _, _, _, _, _, _, _, _), 1453 [15] = PINGROUP(15, qup2_se3, cci_async_in, qup2_se2, phase_flag, _, _, _, _, _, _, _), 1454 [16] = PINGROUP(16, qup2_se4, phase_flag, _, _, _, _, _, _, _, _, _), 1455 [17] = PINGROUP(17, qup2_se4, phase_flag, _, _, _, _, _, _, _, _, _), 1456 [18] = PINGROUP(18, wcn_sw_ctrl, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1457 [19] = PINGROUP(19, wcn_sw, qup2_se4, phase_flag, _, _, _, _, _, _, _, _), 1458 [20] = PINGROUP(20, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1459 [21] = PINGROUP(21, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1460 [22] = PINGROUP(22, qup2_se5, phase_flag, _, _, _, _, _, _, _, _, _), 1461 [23] = PINGROUP(23, qup2_se5, qup2_se5, phase_flag, _, _, _, _, _, _, _, _), 1462 [24] = PINGROUP(24, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1463 [25] = PINGROUP(25, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1464 [26] = PINGROUP(26, qup2_se6, phase_flag, _, _, _, _, _, _, _, _, _), 1465 [27] = PINGROUP(27, qup2_se6, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1466 [28] = PINGROUP(28, qup2_se7, ibi_i3c, phase_flag, _, _, _, _, _, _, _, _), 1467 [29] = PINGROUP(29, qup2_se7, ibi_i3c, phase_flag, _, _, _, _, _, _, _, _), 1468 [30] = PINGROUP(30, qup2_se7, _, _, _, _, _, _, _, _, _, _), 1469 [31] = PINGROUP(31, qup2_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1470 [32] = PINGROUP(32, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1471 [33] = PINGROUP(33, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1472 [34] = PINGROUP(34, qup1_se0, _, _, _, _, _, _, _, _, _, egpio), 1473 [35] = PINGROUP(35, qup1_se0, _, _, _, _, _, _, _, _, _, egpio), 1474 [36] = PINGROUP(36, qup1_se1, uim1_data, ibi_i3c, sdc40, _, _, _, _, _, _, egpio), 1475 [37] = PINGROUP(37, qup1_se1, uim1_clk, ibi_i3c, sdc41, _, _, _, _, _, _, egpio), 1476 [38] = PINGROUP(38, qup1_se1, sdc42, _, _, _, _, _, _, _, _, _), 1477 [39] = PINGROUP(39, qup1_se1, uim1_reset, sdc43, _, _, _, _, _, _, _, _), 1478 [40] = PINGROUP(40, qup1_se2, cmu_rng, ddr_bist_fail, _, _, _, _, _, _, _, _), 1479 [41] = PINGROUP(41, qup1_se2, cmu_rng, ddr_bist_start, _, _, _, _, _, _, _, _), 1480 [42] = PINGROUP(42, qup1_se2, cmu_rng, _, _, _, _, _, _, _, _, _), 1481 [43] = PINGROUP(43, qup1_se2, cmu_rng, _, ddr_pxi2, _, _, _, _, _, _, _), 1482 [44] = PINGROUP(44, qup1_se3, ddr_bist_complete, ddr_pxi1, _, _, _, _, _, _, _, _), 1483 [45] = PINGROUP(45, qup1_se3, ddr_bist_stop, ddr_pxi1, _, _, _, _, _, _, _, _), 1484 [46] = PINGROUP(46, qup1_se3, ddr_pxi3, _, _, _, _, _, _, _, _, _), 1485 [47] = PINGROUP(47, qup1_se3, dp_hot, _, _, _, _, _, _, _, _, _), 1486 [48] = PINGROUP(48, qup1_se4, ibi_i3c, sdc4_cmd, _, _, _, _, _, _, _, _), 1487 [49] = PINGROUP(49, qup1_se4, ibi_i3c, sdc40, _, _, _, _, _, _, _, _), 1488 [50] = PINGROUP(50, qup1_se4, aoss_cti, sdc4_clk, _, _, _, _, _, _, _, _), 1489 [51] = PINGROUP(51, qup1_se4, aoss_cti, sdc41, _, _, _, _, _, _, _, _), 1490 [52] = PINGROUP(52, qup1_se5, qspi0, ddr_pxi2, _, _, _, _, _, _, _, _), 1491 [53] = PINGROUP(53, qup1_se5, qspi1, _, ddr_pxi3, _, _, _, _, _, _, _), 1492 [54] = PINGROUP(54, qup1_se5, qspi_clk, uim1_data, ddr_pxi0, _, _, _, _, _, _, _), 1493 [55] = PINGROUP(55, qup1_se5, qspi2, uim1_clk, ddr_pxi0, _, _, _, _, _, _, _), 1494 [56] = PINGROUP(56, qup1_se6, qspi3, uim1_reset, _, _, _, _, _, _, _, _), 1495 [57] = PINGROUP(57, qup1_se6, qspi_cs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, 1496 _, _, _, _, _), 1497 [58] = PINGROUP(58, qup1_se6, qspi_cs, _, _, _, _, _, _, _, _, _), 1498 [59] = PINGROUP(59, qup1_se6, usb_phy, vsense_trigger_mirnat, _, _, _, _, _, _, _, _), 1499 [60] = PINGROUP(60, qup1_se7, aoss_cti, sdc42, _, _, _, _, _, _, _, _), 1500 [61] = PINGROUP(61, qup1_se7, usb_phy, aoss_cti, sdc43, _, _, _, _, _, _, _), 1501 [62] = PINGROUP(62, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1502 [63] = PINGROUP(63, qup1_se7, _, _, _, _, _, _, _, _, _, _), 1503 [64] = PINGROUP(64, i2chub0_se0, prng_rosc1, tmess_prng1, phase_flag, _, _, _, _, _, _, _), 1504 [65] = PINGROUP(65, i2chub0_se0, prng_rosc2, tmess_prng2, phase_flag, _, _, _, _, _, _, _), 1505 [66] = PINGROUP(66, i2chub0_se1, prng_rosc3, tmess_prng3, phase_flag, _, _, _, _, _, _, _), 1506 [67] = PINGROUP(67, i2chub0_se1, phase_flag, _, _, _, _, _, _, _, _, _), 1507 [68] = PINGROUP(68, i2chub0_se2, phase_flag, _, _, _, _, _, _, _, _, _), 1508 [69] = PINGROUP(69, i2chub0_se2, phase_flag, _, _, _, _, _, _, _, _, _), 1509 [70] = PINGROUP(70, i2chub0_se3, uim1_data, _, atest_usb, _, _, _, _, _, _, _), 1510 [71] = PINGROUP(71, i2chub0_se3, uim1_clk, _, atest_usb, _, _, _, _, _, _, _), 1511 [72] = PINGROUP(72, i2chub0_se4, uim1_reset, qdss_cti, _, atest_usb, _, _, _, _, _, _), 1512 [73] = PINGROUP(73, i2chub0_se4, qdss_cti, jitter_bist, atest_usb, _, _, _, _, _, _, _), 1513 [74] = PINGROUP(74, i2chub0_se5, _, _, _, _, _, _, _, _, _, _), 1514 [75] = PINGROUP(75, i2chub0_se5, _, _, _, _, _, _, _, _, _, _), 1515 [76] = PINGROUP(76, i2chub0_se6, atest_usb, _, _, _, _, _, _, _, _, _), 1516 [77] = PINGROUP(77, i2chub0_se6, gnss_adc1, _, _, _, _, _, _, _, _, _), 1517 [78] = PINGROUP(78, dbg_out_clk, gnss_adc0, _, _, _, _, _, _, _, _, _), 1518 [79] = PINGROUP(79, usb1_hs, gnss_adc0, _, _, _, _, _, _, _, _, _), 1519 [80] = PINGROUP(80, i2chub0_se9, _, _, _, _, _, _, _, _, _, _), 1520 [81] = PINGROUP(81, i2chub0_se9, _, _, _, _, _, _, _, _, _, _), 1521 [82] = PINGROUP(82, i2chub0_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1522 [83] = PINGROUP(83, i2chub0_se7, qdss_cti, phase_flag, _, _, _, _, _, _, _, _), 1523 [84] = PINGROUP(84, _, _, _, _, _, _, _, _, _, _, _), 1524 [85] = PINGROUP(85, sd_write_protect, prng_rosc0, tmess_prng0, phase_flag, _, _, _, _, _, 1525 _, _), 1526 [86] = PINGROUP(86, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, gcc_gp1, _, _, _, _, _, _, 1527 _), 1528 [87] = PINGROUP(87, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, mdp_vsync5_out, gcc_gp2, _, 1529 _, _, _, _, _), 1530 [88] = PINGROUP(88, mdp_vsync_e, mdp_esync0_out, gcc_gp3, _, _, _, _, _, _, _, _), 1531 [89] = PINGROUP(89, cam_mclk, tb_trig_sdc2, _, _, _, _, _, _, _, _, _), 1532 [90] = PINGROUP(90, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1533 [91] = PINGROUP(91, cam_aon_mclk2, _, _, _, _, _, _, _, _, _, _), 1534 [92] = PINGROUP(92, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1535 [93] = PINGROUP(93, cam_aon_mclk4, _, _, _, _, _, _, _, _, _, _), 1536 [94] = PINGROUP(94, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1537 [95] = PINGROUP(95, cam_mclk, pll_clk_aux, _, _, _, _, _, _, _, _, _), 1538 [96] = PINGROUP(96, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1539 [97] = PINGROUP(97, mdp_vsync, _, _, _, _, _, _, _, _, _, _), 1540 [98] = PINGROUP(98, mdp_vsync, _, _, _, _, _, _, _, _, _, _), 1541 [99] = PINGROUP(99, gnss_adc1, _, _, _, _, _, _, _, _, _, _), 1542 [100] = PINGROUP(100, mdp_esync1_out, _, _, _, _, _, _, _, _, _, _), 1543 [101] = PINGROUP(101, phase_flag, _, _, _, _, _, _, _, _, _, _), 1544 [102] = PINGROUP(102, phase_flag, _, _, _, _, _, _, _, _, _, _), 1545 [103] = PINGROUP(103, pcie0_clk_req_n, phase_flag, _, _, _, _, _, _, _, _, _), 1546 [104] = PINGROUP(104, pll_bist_sync, phase_flag, _, _, _, _, _, _, _, _, _), 1547 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _, _, egpio), 1548 [106] = PINGROUP(106, _, _, _, _, _, _, _, _, _, _, egpio), 1549 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _, egpio), 1550 [108] = PINGROUP(108, _, _, _, _, _, _, _, _, _, _, egpio), 1551 [109] = PINGROUP(109, cci_timer, _, _, _, _, _, _, _, _, _, _), 1552 [110] = PINGROUP(110, cci_timer, _, _, _, _, _, _, _, _, _, _), 1553 [111] = PINGROUP(111, cci_timer, cci_i2c_sda, _, _, _, _, _, _, _, _, _), 1554 [112] = PINGROUP(112, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1555 [113] = PINGROUP(113, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1556 [114] = PINGROUP(114, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1557 [115] = PINGROUP(115, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1558 [116] = PINGROUP(116, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1559 [117] = PINGROUP(117, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1560 [118] = PINGROUP(118, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1561 [119] = PINGROUP(119, cci_i2c_sda, _, _, _, _, _, _, _, _, _, _), 1562 [120] = PINGROUP(120, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1563 [121] = PINGROUP(121, i2s1_sck, _, _, _, _, _, _, _, _, _, _), 1564 [122] = PINGROUP(122, i2s1_data0, _, _, _, _, _, _, _, _, _, _), 1565 [123] = PINGROUP(123, i2s1_ws, _, _, _, _, _, _, _, _, _, _), 1566 [124] = PINGROUP(124, i2s1_data1, audio_ext_mclk1, audio_ref_clk, _, _, _, _, _, _, _, _), 1567 [125] = PINGROUP(125, audio_ext_mclk0, _, _, _, _, _, _, _, _, _, _), 1568 [126] = PINGROUP(126, i2s0_sck, _, _, _, _, _, _, _, _, _, _), 1569 [127] = PINGROUP(127, i2s0_data0, _, _, _, _, _, _, _, _, _, _), 1570 [128] = PINGROUP(128, i2s0_data1, _, _, _, _, _, _, _, _, _, _), 1571 [129] = PINGROUP(129, i2s0_ws, _, _, _, _, _, _, _, _, _, _), 1572 [130] = PINGROUP(130, uim0_data, atest_char, _, _, _, _, _, _, _, _, _), 1573 [131] = PINGROUP(131, uim0_clk, atest_char, _, _, _, _, _, _, _, _, _), 1574 [132] = PINGROUP(132, uim0_reset, atest_char, _, _, _, _, _, _, _, _, _), 1575 [133] = PINGROUP(133, uim0_present, atest_char, _, _, _, _, _, _, _, _, _), 1576 [134] = PINGROUP(134, uim1_data, qup1_se2, gcc_gp1, _, _, _, _, _, _, _, _), 1577 [135] = PINGROUP(135, uim1_clk, qup1_se2, gcc_gp2, _, _, _, _, _, _, _, _), 1578 [136] = PINGROUP(136, uim1_reset, qup1_se2, gcc_gp3, _, _, _, _, _, _, _, _), 1579 [137] = PINGROUP(137, uim1_present, atest_char, _, _, _, _, _, _, _, _, _), 1580 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _, _), 1581 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _, _), 1582 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, _), 1583 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, _), 1584 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, _), 1585 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, _), 1586 [144] = PINGROUP(144, _, _, _, _, _, _, _, _, _, _, _), 1587 [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _, _, _), 1588 [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _, _, _), 1589 [147] = PINGROUP(147, _, tb_trig_sdc4, _, _, _, _, _, _, _, _, _), 1590 [148] = PINGROUP(148, coex_uart1_rx, cmu_rng, _, _, _, _, _, _, _, _, _), 1591 [149] = PINGROUP(149, coex_uart1_tx, cmu_rng, _, _, _, _, _, _, _, _, _), 1592 [150] = PINGROUP(150, _, vfr_0, coex_uart2_rx, cmu_rng, sdc4_clk, _, _, _, _, _, _), 1593 [151] = PINGROUP(151, _, coex_uart2_tx, cmu_rng, sdc4_cmd, _, _, _, _, _, _, _), 1594 [152] = PINGROUP(152, nav_gpio2, _, _, _, _, _, _, _, _, _, _), 1595 [153] = PINGROUP(153, cci_i2c_scl, _, _, _, _, _, _, _, _, _, _), 1596 [154] = PINGROUP(154, nav_gpio0, nav_gpio3, _, _, _, _, _, _, _, _, _), 1597 [155] = PINGROUP(155, nav_gpio1, vfr_1, _, _, _, _, _, _, _, _, _), 1598 [156] = PINGROUP(156, qlink_little_request, _, _, _, _, _, _, _, _, _, _), 1599 [157] = PINGROUP(157, qlink_little_enable, _, _, _, _, _, _, _, _, _, _), 1600 [158] = PINGROUP(158, qlink_wmss, _, _, _, _, _, _, _, _, _, _), 1601 [159] = PINGROUP(159, qlink_big_request, qdss_cti, _, _, _, _, _, _, _, _, _), 1602 [160] = PINGROUP(160, qlink_big_enable, _, _, _, _, _, _, _, _, _, _), 1603 [161] = PINGROUP(161, _, _, _, _, _, _, _, _, _, _, _), 1604 [162] = PINGROUP(162, qdss_cti, _, _, _, _, _, _, _, _, _, _), 1605 [163] = PINGROUP(163, cci_timer, _, _, _, _, _, _, _, _, _, _), 1606 [164] = PINGROUP(164, cci_timer, cci_i2c_scl, _, _, _, _, _, _, _, _, _), 1607 [165] = PINGROUP(165, _, _, _, _, _, _, _, _, _, _, egpio), 1608 [166] = PINGROUP(166, _, _, _, _, _, _, _, _, _, _, egpio), 1609 [167] = PINGROUP(167, _, _, _, _, _, _, _, _, _, _, egpio), 1610 [168] = PINGROUP(168, _, _, _, _, _, _, _, _, _, _, egpio), 1611 [169] = PINGROUP(169, _, _, _, _, _, _, _, _, _, _, egpio), 1612 [170] = PINGROUP(170, _, _, _, _, _, _, _, _, _, _, egpio), 1613 [171] = PINGROUP(171, _, _, _, _, _, _, _, _, _, _, egpio), 1614 [172] = PINGROUP(172, _, _, _, _, _, _, _, _, _, _, egpio), 1615 [173] = PINGROUP(173, _, _, _, _, _, _, _, _, _, _, egpio), 1616 [174] = PINGROUP(174, _, _, _, _, _, _, _, _, _, _, egpio), 1617 [175] = PINGROUP(175, _, _, _, _, _, _, _, _, _, _, egpio), 1618 [176] = PINGROUP(176, _, _, _, _, _, _, _, _, _, _, egpio), 1619 [177] = PINGROUP(177, _, _, _, _, _, _, _, _, _, _, egpio), 1620 [178] = PINGROUP(178, _, _, _, _, _, _, _, _, _, _, egpio), 1621 [179] = PINGROUP(179, _, _, _, _, _, _, _, _, _, _, egpio), 1622 [180] = PINGROUP(180, _, _, _, _, _, _, _, _, _, _, egpio), 1623 [181] = PINGROUP(181, _, _, _, _, _, _, _, _, _, _, egpio), 1624 [182] = PINGROUP(182, _, _, _, _, _, _, _, _, _, _, egpio), 1625 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, egpio), 1626 [184] = PINGROUP(184, _, _, _, _, _, _, _, _, _, _, egpio), 1627 [185] = PINGROUP(185, _, _, _, _, _, _, _, _, _, _, egpio), 1628 [186] = PINGROUP(186, _, _, _, _, _, _, _, _, _, _, egpio), 1629 [187] = PINGROUP(187, _, _, _, _, _, _, _, _, _, _, egpio), 1630 [188] = PINGROUP(188, _, _, _, _, _, _, _, _, _, _, egpio), 1631 [189] = PINGROUP(189, _, _, _, _, _, _, _, _, _, _, egpio), 1632 [190] = PINGROUP(190, _, _, _, _, _, _, _, _, _, _, egpio), 1633 [191] = PINGROUP(191, _, _, _, _, _, _, _, _, _, _, egpio), 1634 [192] = PINGROUP(192, _, _, _, _, _, _, _, _, _, _, egpio), 1635 [193] = PINGROUP(193, _, _, _, _, _, _, _, _, _, _, egpio), 1636 [194] = PINGROUP(194, _, _, _, _, _, _, _, _, _, _, egpio), 1637 [195] = PINGROUP(195, _, _, _, _, _, _, _, _, _, _, egpio), 1638 [196] = PINGROUP(196, _, _, _, _, _, _, _, _, _, _, egpio), 1639 [197] = PINGROUP(197, _, _, _, _, _, _, _, _, _, _, egpio), 1640 [198] = PINGROUP(198, _, _, _, _, _, _, _, _, _, _, egpio), 1641 [199] = PINGROUP(199, _, _, _, _, _, _, _, _, _, _, egpio), 1642 [200] = PINGROUP(200, _, _, _, _, _, _, _, _, _, _, egpio), 1643 [201] = PINGROUP(201, _, _, _, _, _, _, _, _, _, _, egpio), 1644 [202] = PINGROUP(202, _, _, _, _, _, _, _, _, _, _, egpio), 1645 [203] = PINGROUP(203, _, _, _, _, _, _, _, _, _, _, egpio), 1646 [204] = PINGROUP(204, _, _, _, _, _, _, _, _, _, _, egpio), 1647 [205] = PINGROUP(205, _, _, _, _, _, _, _, _, _, _, egpio), 1648 [206] = PINGROUP(206, i2chub0_se8, _, _, _, _, _, _, _, _, _, egpio), 1649 [207] = PINGROUP(207, i2chub0_se8, _, _, _, _, _, _, _, _, _, egpio), 1650 [208] = PINGROUP(208, _, _, _, _, _, _, _, _, _, _, egpio), 1651 [209] = PINGROUP(209, _, _, _, _, _, _, _, _, _, _, egpio), 1652 [210] = PINGROUP(210, _, _, _, _, _, _, _, _, _, _, egpio), 1653 [211] = PINGROUP(211, _, _, _, _, _, _, _, _, _, _, egpio), 1654 [212] = PINGROUP(212, _, _, _, _, _, _, _, _, _, _, egpio), 1655 [213] = PINGROUP(213, _, _, _, _, _, _, _, _, _, _, egpio), 1656 [214] = PINGROUP(214, _, _, _, _, _, _, _, _, _, _, egpio), 1657 [215] = UFS_RESET(ufs_reset, 0xe2004, 0xe3000), 1658 [216] = SDC_QDSD_PINGROUP(sdc2_clk, 0xdb000, 14, 6), 1659 [217] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xdb000, 11, 3), 1660 [218] = SDC_QDSD_PINGROUP(sdc2_data, 0xdb000, 9, 0), 1661}; 1662 1663static const struct msm_gpio_wakeirq_map sm8750_pdc_map[] = { 1664 { 0, 72 }, { 3, 80 }, { 4, 73 }, { 7, 74 }, { 8, 75 }, 1665 { 11, 76 }, { 12, 87 }, { 15, 98 }, { 18, 110 }, { 19, 79 }, 1666 { 23, 82 }, { 24, 83 }, { 27, 84 }, { 28, 85 }, { 31, 86 }, 1667 { 32, 92 }, { 35, 68 }, { 36, 93 }, { 39, 94 }, { 43, 95 }, 1668 { 46, 96 }, { 47, 121 }, { 48, 97 }, { 51, 118 }, { 54, 102 }, 1669 { 55, 71 }, { 56, 103 }, { 57, 104 }, { 59, 105 }, { 61, 81 }, 1670 { 63, 91 }, { 64, 77 }, { 65, 90 }, { 66, 106 }, { 67, 99 }, 1671 { 68, 112 }, { 69, 113 }, { 75, 114 }, { 78, 115 }, { 79, 116 }, 1672 { 80, 122 }, { 81, 123 }, { 84, 101 }, { 85, 124 }, { 86, 125 }, 1673 { 87, 126 }, { 88, 127 }, { 95, 128 }, { 96, 129 }, { 97, 100 }, 1674 { 98, 117 }, { 99, 78 }, { 102, 130 }, { 103, 131 }, { 104, 132 }, 1675 { 108, 133 }, { 133, 134 }, { 137, 67 }, { 148, 135 }, { 150, 136 }, 1676 { 152, 137 }, { 154, 138 }, { 155, 89 }, { 156, 139 }, { 159, 140 }, 1677 { 162, 109 }, { 163, 108 }, { 166, 141 }, { 169, 142 }, { 171, 143 }, 1678 { 172, 144 }, { 174, 145 }, { 176, 146 }, { 177, 120 }, { 181, 147 }, 1679 { 182, 148 }, { 185, 149 }, { 188, 111 }, { 190, 88 }, { 191, 150 }, 1680 { 192, 151 }, { 193, 152 }, { 196, 153 }, { 197, 154 }, { 198, 70 }, 1681 { 199, 119 }, { 200, 69 }, { 201, 155 }, { 202, 156 }, { 203, 157 }, 1682 { 204, 158 }, { 205, 107 }, { 209, 159 }, 1683}; 1684 1685static const struct msm_pinctrl_soc_data sm8750_tlmm = { 1686 .pins = sm8750_pins, 1687 .npins = ARRAY_SIZE(sm8750_pins), 1688 .functions = sm8750_functions, 1689 .nfunctions = ARRAY_SIZE(sm8750_functions), 1690 .groups = sm8750_groups, 1691 .ngroups = ARRAY_SIZE(sm8750_groups), 1692 .ngpios = 216, 1693 .wakeirq_map = sm8750_pdc_map, 1694 .nwakeirq_map = ARRAY_SIZE(sm8750_pdc_map), 1695 .egpio_func = 11, 1696}; 1697 1698static int sm8750_tlmm_probe(struct platform_device *pdev) 1699{ 1700 return msm_pinctrl_probe(pdev, &sm8750_tlmm); 1701} 1702 1703static const struct of_device_id sm8750_tlmm_of_match[] = { 1704 { .compatible = "qcom,sm8750-tlmm", }, 1705 {}, 1706}; 1707 1708static struct platform_driver sm8750_tlmm_driver = { 1709 .driver = { 1710 .name = "sm8750-tlmm", 1711 .of_match_table = sm8750_tlmm_of_match, 1712 }, 1713 .probe = sm8750_tlmm_probe, 1714}; 1715 1716static int __init sm8750_tlmm_init(void) 1717{ 1718 return platform_driver_register(&sm8750_tlmm_driver); 1719} 1720arch_initcall(sm8750_tlmm_init); 1721 1722static void __exit sm8750_tlmm_exit(void) 1723{ 1724 platform_driver_unregister(&sm8750_tlmm_driver); 1725} 1726module_exit(sm8750_tlmm_exit); 1727 1728MODULE_DESCRIPTION("QTI SM8750 TLMM driver"); 1729MODULE_LICENSE("GPL"); 1730MODULE_DEVICE_TABLE(of, sm8750_tlmm_of_match);