Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/sprd,sc9860-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Spreadtrum SC9860 Pin Controller
8
9maintainers:
10 - Baolin Wang <baolin.wang@linux.alibaba.com>
11
12description: >
13 The Spreadtrum pin controller are organized in 3 blocks (types).
14
15 The first block comprises some global control registers, and each
16 register contains several bit fields with one bit or several bits
17 to configure for some global common configuration, such as domain
18 pad driving level, system control select and so on ("domain pad
19 driving level": One pin can output 3.0v or 1.8v, depending on the
20 related domain pad driving selection, if the related domain pad
21 select 3.0v, then the pin can output 3.0v. "system control" is used
22 to choose one function (like: UART0) for which system, since we
23 have several systems (AP/CP/CM4) on one SoC.).
24
25 There are too much various configuration that we can not list all
26 of them, so we can not make every Spreadtrum-special configuration
27 as one generic configuration, and maybe it will add more strange
28 global configuration in future. Then we add one "sprd,control" to
29 set these various global control configuration, and we need use
30 magic number for this property.
31
32 Moreover we recognize every fields comprising one bit or several
33 bits in one global control register as one pin, thus we should
34 record every pin's bit offset, bit width and register offset to
35 configure this field (pin).
36
37 The second block comprises some common registers which have unified
38 register definition, and each register described one pin is used
39 to configure the pin sleep mode, function select and sleep related
40 configuration.
41
42 Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
43 PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
44 related configuration are:
45 - input-enable
46 - input-disable
47 - output-high
48 - output-low
49 - bias-pull-up
50 - bias-pull-down
51
52 In some situation we need set the pin sleep mode and pin sleep related
53 configuration, to set the pin sleep related configuration automatically
54 by hardware when the system specified by sleep mode goes into deep
55 sleep mode. For example, if we set the pin sleep mode as PUBCP_SLEEP
56 and set the pin sleep related configuration as "input-enable", which
57 means when PUBCP system goes into deep sleep mode, this pin will be set
58 input enable automatically.
59
60 Moreover we can not use the "sleep" state, since some systems (like:
61 PUBCP system) do not run linux kernel OS (only AP system run linux
62 kernel on SC9860 platform), then we can not select "sleep" state
63 when the PUBCP system goes into deep sleep mode. Thus we introduce
64 "sprd,sleep-mode" property to set pin sleep mode.
65
66 The last block comprises some misc registers which also have unified
67 register definition, and each register described one pin is used to
68 configure drive strength, pull up/down and so on. Especially for pull
69 up, we have two kind pull up resistor: 20K and 4.7K.
70
71properties:
72 compatible:
73 const: sprd,sc9860-pinctrl
74
75 reg:
76 maxItems: 1
77
78additionalProperties:
79 $ref: '#/$defs/pin-node'
80 unevaluatedProperties: false
81
82 properties:
83 function:
84 description: Function to assign to the pins.
85 enum:
86 - func1
87 - func2
88 - func3
89 - func4
90
91 drive-strength:
92 description: Drive strength in mA.
93 $ref: /schemas/types.yaml#/definitions/uint32
94 enum: [2, 4, 6, 8, 10, 12, 14, 16, 20, 21, 24, 25, 27, 29, 31, 33]
95
96 input-schmitt-disable: true
97
98 input-schmitt-enable: true
99
100 bias-pull-up:
101 enum: [20000, 4700]
102
103 sprd,sleep-mode:
104 description: Pin sleep mode selection.
105 $ref: /schemas/types.yaml#/definitions/uint32
106 maximum: 0x1f
107
108 sprd,control:
109 description: Control values referring to databook for global control pins.
110 $ref: /schemas/types.yaml#/definitions/uint32
111
112 patternProperties:
113 'sleep$':
114 $ref: '#/$defs/pin-node'
115 unevaluatedProperties: false
116
117 properties:
118 bias-pull-up:
119 type: boolean
120
121 sleep-hardware-state:
122 description: Indicate these configs in sleep related state.
123 type: boolean
124
125$defs:
126 pin-node:
127 type: object
128 allOf:
129 - $ref: /schemas/pinctrl/pincfg-node.yaml#
130 - $ref: /schemas/pinctrl/pinmux-node.yaml#
131
132 properties:
133 pins:
134 description: Names of pins to configure.
135 $ref: /schemas/types.yaml#/definitions/string-array
136
137 bias-disable:
138 description: Disable pin bias.
139 type: boolean
140
141 bias-pull-down:
142 description: Pull down on pin.
143 type: boolean
144
145 bias-pull-up: true
146
147 input-enable:
148 description: Enable pin input.
149 type: boolean
150
151 input-disable:
152 description: Enable pin output.
153 type: boolean
154
155 output-high:
156 description: Set the pin as an output level high.
157 type: boolean
158
159 output-low:
160 description: Set the pin as an output level low.
161 type: boolean
162
163required:
164 - compatible
165 - reg
166
167examples:
168 - |
169 pin_controller: pinctrl@402a0000 {
170 compatible = "sprd,sc9860-pinctrl";
171 reg = <0x402a0000 0x10000>;
172
173 grp1: sd0 {
174 pins = "SC9860_VIO_SD2_IRTE", "SC9860_VIO_SD0_IRTE";
175 sprd,control = <0x1>;
176 };
177
178 grp2: rfctl_33 {
179 pins = "SC9860_RFCTL33";
180 function = "func2";
181 sprd,sleep-mode = <3>;
182 grp2_sleep_mode: rfctl_33_sleep {
183 pins = "SC9860_RFCTL33";
184 sleep-hardware-state;
185 output-low;
186 };
187 };
188
189 grp3: rfctl_misc_20 {
190 pins = "SC9860_RFCTL20_MISC";
191 drive-strength = <10>;
192 bias-pull-up = <4700>;
193 grp3_sleep_mode: rfctl_misc_sleep {
194 pins = "SC9860_RFCTL20_MISC";
195 sleep-hardware-state;
196 bias-pull-up;
197 };
198 };
199 };