tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/amd,xgbe-seattle-v1a.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: AMD XGBE Seattle v1a
8
9maintainers:
10 - Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
11
12allOf:
13 - $ref: /schemas/net/ethernet-controller.yaml#
14
15properties:
16 compatible:
17 const: amd,xgbe-seattle-v1a
18
19 reg:
20 items:
21 - description: MAC registers
22 - description: PCS registers
23 - description: SerDes Rx/Tx registers
24 - description: SerDes integration registers (1/2)
25 - description: SerDes integration registers (2/2)
26
27 interrupts:
28 description: Device interrupts. The first entry is the general device
29 interrupt. If amd,per-channel-interrupt is specified, each DMA channel
30 interrupt must be specified. The last entry is the PCS auto-negotiation
31 interrupt.
32 minItems: 2
33 maxItems: 6
34
35 clocks:
36 items:
37 - description: DMA clock for the device
38 - description: PTP clock for the device
39
40 clock-names:
41 items:
42 - const: dma_clk
43 - const: ptp_clk
44
45 iommus:
46 maxItems: 1
47
48 phy-mode: true
49
50 dma-coherent: true
51
52 amd,per-channel-interrupt:
53 description: Indicates that Rx and Tx complete will generate a unique
54 interrupt for each DMA channel.
55 type: boolean
56
57 amd,speed-set:
58 description: >
59 Speed capabilities of the device.
60 0 = 1GbE and 10GbE
61 1 = 2.5GbE and 10GbE
62 $ref: /schemas/types.yaml#/definitions/uint32
63 enum: [0, 1]
64
65 amd,serdes-blwc:
66 description: Baseline wandering correction enablement for each speed.
67 $ref: /schemas/types.yaml#/definitions/uint32-array
68 minItems: 3
69 maxItems: 3
70 items:
71 enum: [0, 1]
72
73 amd,serdes-cdr-rate:
74 description: CDR rate speed selection for each speed.
75 $ref: /schemas/types.yaml#/definitions/uint32-array
76 items:
77 - description: CDR rate for 1GbE
78 - description: CDR rate for 2.5GbE
79 - description: CDR rate for 10GbE
80
81 amd,serdes-pq-skew:
82 description: PQ data sampling skew for each speed.
83 $ref: /schemas/types.yaml#/definitions/uint32-array
84 items:
85 - description: PQ skew for 1GbE
86 - description: PQ skew for 2.5GbE
87 - description: PQ skew for 10GbE
88
89 amd,serdes-tx-amp:
90 description: TX amplitude boost for each speed.
91 $ref: /schemas/types.yaml#/definitions/uint32-array
92 items:
93 - description: TX amplitude for 1GbE
94 - description: TX amplitude for 2.5GbE
95 - description: TX amplitude for 10GbE
96
97 amd,serdes-dfe-tap-config:
98 description: DFE taps available to run for each speed.
99 $ref: /schemas/types.yaml#/definitions/uint32-array
100 items:
101 - description: DFE taps available for 1GbE
102 - description: DFE taps available for 2.5GbE
103 - description: DFE taps available for 10GbE
104
105 amd,serdes-dfe-tap-enable:
106 description: DFE taps to enable for each speed.
107 $ref: /schemas/types.yaml#/definitions/uint32-array
108 items:
109 - description: DFE taps to enable for 1GbE
110 - description: DFE taps to enable for 2.5GbE
111 - description: DFE taps to enable for 10GbE
112
113required:
114 - compatible
115 - reg
116 - interrupts
117 - clocks
118 - clock-names
119 - phy-mode
120
121unevaluatedProperties: false
122
123examples:
124 - |
125 ethernet@e0700000 {
126 compatible = "amd,xgbe-seattle-v1a";
127 reg = <0xe0700000 0x80000>,
128 <0xe0780000 0x80000>,
129 <0xe1240800 0x00400>,
130 <0xe1250000 0x00060>,
131 <0xe1250080 0x00004>;
132 interrupts = <0 325 4>,
133 <0 326 1>, <0 327 1>, <0 328 1>, <0 329 1>,
134 <0 323 4>;
135 amd,per-channel-interrupt;
136 clocks = <&xgbe_dma_clk>, <&xgbe_ptp_clk>;
137 clock-names = "dma_clk", "ptp_clk";
138 phy-mode = "xgmii";
139 mac-address = [ 02 a1 a2 a3 a4 a5 ];
140 amd,speed-set = <0>;
141 amd,serdes-blwc = <1>, <1>, <0>;
142 amd,serdes-cdr-rate = <2>, <2>, <7>;
143 amd,serdes-pq-skew = <10>, <10>, <30>;
144 amd,serdes-tx-amp = <15>, <15>, <10>;
145 amd,serdes-dfe-tap-config = <3>, <3>, <1>;
146 amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
147 };