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1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Synopsys Designware Mobile Storage Host Controller 8 9maintainers: 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 - Jisheng Zhang <Jisheng.Zhang@synaptics.com> 12 13properties: 14 compatible: 15 oneOf: 16 - items: 17 - enum: 18 - rockchip,rk3528-dwcmshc 19 - rockchip,rk3562-dwcmshc 20 - rockchip,rk3576-dwcmshc 21 - const: rockchip,rk3588-dwcmshc 22 - items: 23 - const: sophgo,sg2044-dwcmshc 24 - const: sophgo,sg2042-dwcmshc 25 - enum: 26 - rockchip,rk3568-dwcmshc 27 - rockchip,rk3588-dwcmshc 28 - snps,dwcmshc-sdhci 29 - sophgo,cv1800b-dwcmshc 30 - sophgo,sg2002-dwcmshc 31 - sophgo,sg2042-dwcmshc 32 - thead,th1520-dwcmshc 33 - eswin,eic7700-dwcmshc 34 35 reg: 36 maxItems: 1 37 38 interrupts: 39 maxItems: 1 40 41 clocks: 42 minItems: 1 43 maxItems: 5 44 45 clock-names: 46 minItems: 1 47 maxItems: 5 48 49 power-domains: 50 maxItems: 1 51 52 resets: 53 maxItems: 5 54 55 reset-names: 56 maxItems: 5 57 58 rockchip,txclk-tapnum: 59 description: Specify the number of delay for tx sampling. 60 $ref: /schemas/types.yaml#/definitions/uint8 61 62 eswin,hsp-sp-csr: 63 $ref: /schemas/types.yaml#/definitions/phandle-array 64 items: 65 - items: 66 - description: Phandle to HSP(High-Speed Peripheral) device 67 - description: Offset of the stability status register for internal 68 clock. 69 - description: Offset of the stability register for host regulator 70 voltage. 71 description: 72 HSP CSR is to control and get status of different high-speed peripherals 73 (such as Ethernet, USB, SATA, etc.) via register, which can tune 74 board-level's parameters of PHY, etc. 75 76 eswin,drive-impedance-ohms: 77 description: Specifies the drive impedance in Ohm. 78 enum: [33, 40, 50, 66, 100] 79 80required: 81 - compatible 82 - reg 83 - interrupts 84 - clocks 85 - clock-names 86 87allOf: 88 - $ref: mmc-controller.yaml# 89 90 - if: 91 properties: 92 compatible: 93 contains: 94 const: sophgo,sg2042-dwcmshc 95 96 then: 97 properties: 98 clocks: 99 items: 100 - description: core clock 101 - description: bus clock 102 - description: timer clock 103 clock-names: 104 items: 105 - const: core 106 - const: bus 107 - const: timer 108 else: 109 properties: 110 clocks: 111 minItems: 1 112 items: 113 - description: core clock 114 - description: bus clock for optional 115 - description: axi clock for rockchip specified 116 - description: block clock for rockchip specified 117 - description: timer clock for rockchip specified 118 clock-names: 119 minItems: 1 120 items: 121 - const: core 122 - const: bus 123 - const: axi 124 - const: block 125 - const: timer 126 127 - if: 128 properties: 129 compatible: 130 contains: 131 const: eswin,eic7700-dwcmshc 132 then: 133 properties: 134 resets: 135 minItems: 4 136 maxItems: 4 137 reset-names: 138 items: 139 - const: axi 140 - const: phy 141 - const: prstn 142 - const: txrx 143 required: 144 - eswin,hsp-sp-csr 145 - eswin,drive-impedance-ohms 146 else: 147 properties: 148 resets: 149 maxItems: 5 150 reset-names: 151 items: 152 - const: core 153 - const: bus 154 - const: axi 155 - const: block 156 - const: timer 157 158 - if: 159 properties: 160 compatible: 161 contains: 162 const: rockchip,rk3576-dwcmshc 163 164 then: 165 required: 166 - power-domains 167 168unevaluatedProperties: false 169 170examples: 171 - | 172 mmc@fe310000 { 173 compatible = "rockchip,rk3568-dwcmshc"; 174 reg = <0xfe310000 0x10000>; 175 interrupts = <0 25 0x4>; 176 clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; 177 clock-names = "core", "bus", "axi", "block", "timer"; 178 bus-width = <8>; 179 #address-cells = <1>; 180 #size-cells = <0>; 181 }; 182 - | 183 mmc@aa0000 { 184 compatible = "snps,dwcmshc-sdhci"; 185 reg = <0xaa000 0x1000>; 186 interrupts = <0 25 0x4>; 187 clocks = <&cru 17>, <&cru 18>; 188 clock-names = "core", "bus"; 189 bus-width = <8>; 190 #address-cells = <1>; 191 #size-cells = <0>; 192 }; 193 194...