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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/axis,artpec8-clock.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Axis ARTPEC-8 SoC clock controller
8
9maintainers:
10 - Jesper Nilsson <jesper.nilsson@axis.com>
11
12description: |
13 ARTPEC-8 clock controller is comprised of several CMU (Clock Management Unit)
14 units, generating clocks for different domains. Those CMU units are modeled
15 as separate device tree nodes, and might depend on each other.
16 The root clock in that root tree is an external clock: OSCCLK (25 MHz).
17 This external clock must be defined as a fixed-rate clock in dts.
18
19 CMU_CMU is a top-level CMU, where all base clocks are prepared using PLLs and
20 dividers; all other clocks of function blocks (other CMUs) are usually
21 derived from CMU_CMU.
22
23 Each clock is assigned an identifier and client nodes can use this identifier
24 to specify the clock which they consume. All clocks available for usage
25 in clock consumer nodes are defined as preprocessor macros in
26 'include/dt-bindings/clock/axis,artpec8-clk.h' header.
27
28properties:
29 compatible:
30 enum:
31 - axis,artpec8-cmu-cmu
32 - axis,artpec8-cmu-bus
33 - axis,artpec8-cmu-core
34 - axis,artpec8-cmu-cpucl
35 - axis,artpec8-cmu-fsys
36 - axis,artpec8-cmu-imem
37 - axis,artpec8-cmu-peri
38
39 reg:
40 maxItems: 1
41
42 clocks:
43 minItems: 1
44 maxItems: 5
45
46 clock-names:
47 minItems: 1
48 maxItems: 5
49
50 "#clock-cells":
51 const: 1
52
53required:
54 - compatible
55 - reg
56 - clocks
57 - clock-names
58 - "#clock-cells"
59
60allOf:
61 - if:
62 properties:
63 compatible:
64 const: axis,artpec8-cmu-cmu
65
66 then:
67 properties:
68 clocks:
69 items:
70 - description: External reference clock (25 MHz)
71
72 clock-names:
73 items:
74 - const: fin_pll
75
76 - if:
77 properties:
78 compatible:
79 const: axis,artpec8-cmu-bus
80
81 then:
82 properties:
83 clocks:
84 items:
85 - description: External reference clock (25 MHz)
86 - description: CMU_BUS BUS clock (from CMU_CMU)
87 - description: CMU_BUS DLP clock (from CMU_CMU)
88
89 clock-names:
90 items:
91 - const: fin_pll
92 - const: bus
93 - const: dlp
94
95 - if:
96 properties:
97 compatible:
98 const: axis,artpec8-cmu-core
99
100 then:
101 properties:
102 clocks:
103 items:
104 - description: External reference clock (25 MHz)
105 - description: CMU_CORE main clock (from CMU_CMU)
106 - description: CMU_CORE DLP clock (from CMU_CMU)
107
108 clock-names:
109 items:
110 - const: fin_pll
111 - const: main
112 - const: dlp
113
114 - if:
115 properties:
116 compatible:
117 const: axis,artpec8-cmu-cpucl
118
119 then:
120 properties:
121 clocks:
122 items:
123 - description: External reference clock (25 MHz)
124 - description: CMU_CPUCL switch clock (from CMU_CMU)
125
126 clock-names:
127 items:
128 - const: fin_pll
129 - const: switch
130
131 - if:
132 properties:
133 compatible:
134 const: axis,artpec8-cmu-fsys
135
136 then:
137 properties:
138 clocks:
139 items:
140 - description: External reference clock (25 MHz)
141 - description: CMU_FSYS SCAN0 clock (from CMU_CMU)
142 - description: CMU_FSYS SCAN1 clock (from CMU_CMU)
143 - description: CMU_FSYS BUS clock (from CMU_CMU)
144 - description: CMU_FSYS IP clock (from CMU_CMU)
145
146 clock-names:
147 items:
148 - const: fin_pll
149 - const: scan0
150 - const: scan1
151 - const: bus
152 - const: ip
153
154 - if:
155 properties:
156 compatible:
157 const: axis,artpec8-cmu-imem
158
159 then:
160 properties:
161 clocks:
162 items:
163 - description: External reference clock (25 MHz)
164 - description: CMU_IMEM ACLK clock (from CMU_CMU)
165 - description: CMU_IMEM JPEG clock (from CMU_CMU)
166
167 clock-names:
168 items:
169 - const: fin_pll
170 - const: aclk
171 - const: jpeg
172
173 - if:
174 properties:
175 compatible:
176 const: axis,artpec8-cmu-peri
177
178 then:
179 properties:
180 clocks:
181 items:
182 - description: External reference clock (25 MHz)
183 - description: CMU_PERI IP clock (from CMU_CMU)
184 - description: CMU_PERI AUDIO clock (from CMU_CMU)
185 - description: CMU_PERI DISP clock (from CMU_CMU)
186
187 clock-names:
188 items:
189 - const: fin_pll
190 - const: ip
191 - const: audio
192 - const: disp
193
194additionalProperties: false
195
196examples:
197 # Clock controller node for CMU_FSYS
198 - |
199 #include <dt-bindings/clock/axis,artpec8-clk.h>
200
201 cmu_fsys: clock-controller@16c10000 {
202 compatible = "axis,artpec8-cmu-fsys";
203 reg = <0x16c10000 0x4000>;
204 #clock-cells = <1>;
205 clocks = <&fin_pll>,
206 <&cmu_cmu CLK_DOUT_CMU_FSYS_SCAN0>,
207 <&cmu_cmu CLK_DOUT_CMU_FSYS_SCAN1>,
208 <&cmu_cmu CLK_DOUT_CMU_FSYS_BUS>,
209 <&cmu_cmu CLK_DOUT_CMU_FSYS_IP>;
210 clock-names = "fin_pll", "scan0", "scan1", "bus", "ip";
211 };
212
213...