tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1==========================
2CPU to ISA Version Mapping
3==========================
4
5Mapping of some CPU versions to relevant ISA versions.
6
7Note Power4 and Power4+ are not supported.
8
9========= ====================================================================
10CPU Architecture version
11========= ====================================================================
12Power10 Power ISA v3.1
13Power9 Power ISA v3.0B
14Power8 Power ISA v2.07
15e6500 Power ISA v2.06 with some exceptions
16e5500 Power ISA v2.06 with some exceptions, no Altivec
17Power7 Power ISA v2.06
18Power6 Power ISA v2.05
19PA6T Power ISA v2.04
20Cell PPU - Power ISA v2.02 with some minor exceptions
21 - Plus Altivec/VMX ~= 2.03
22Power5++ Power ISA v2.04 (no VMX)
23Power5+ Power ISA v2.03
24Power5 - PowerPC User Instruction Set Architecture Book I v2.02
25 - PowerPC Virtual Environment Architecture Book II v2.02
26 - PowerPC Operating Environment Architecture Book III v2.02
27PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
28 - PowerPC Virtual Environment Architecture Book II v2.01
29 - PowerPC Operating Environment Architecture Book III v2.01
30 - Plus Altivec/VMX ~= 2.03
31Power4+ - PowerPC User Instruction Set Architecture Book I v2.01
32 - PowerPC Virtual Environment Architecture Book II v2.01
33 - PowerPC Operating Environment Architecture Book III v2.01
34Power4 - PowerPC User Instruction Set Architecture Book I v2.00
35 - PowerPC Virtual Environment Architecture Book II v2.00
36 - PowerPC Operating Environment Architecture Book III v2.00
37========= ====================================================================
38
39
40Key Features
41------------
42
43========== ==================
44CPU VMX (aka. Altivec)
45========== ==================
46Power10 Yes
47Power9 Yes
48Power8 Yes
49e6500 Yes
50e5500 No
51Power7 Yes
52Power6 Yes
53PA6T Yes
54Cell PPU Yes
55Power5++ No
56Power5+ No
57Power5 No
58PPC970 Yes
59Power4+ No
60Power4 No
61========== ==================
62
63========== ====
64CPU VSX
65========== ====
66Power10 Yes
67Power9 Yes
68Power8 Yes
69e6500 No
70e5500 No
71Power7 Yes
72Power6 No
73PA6T No
74Cell PPU No
75Power5++ No
76Power5+ No
77Power5 No
78PPC970 No
79Power4+ No
80Power4 No
81========== ====
82
83========== ====================================
84CPU Transactional Memory
85========== ====================================
86Power10 No (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture")
87Power9 Yes (* see transactional_memory.txt)
88Power8 Yes
89e6500 No
90e5500 No
91Power7 No
92Power6 No
93PA6T No
94Cell PPU No
95Power5++ No
96Power5+ No
97Power5 No
98PPC970 No
99Power4+ No
100Power4 No
101========== ====================================