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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2024 Tomeu Vizoso
4 */
5#ifndef __DRM_UAPI_ROCKET_ACCEL_H__
6#define __DRM_UAPI_ROCKET_ACCEL_H__
7
8#include "drm.h"
9
10#if defined(__cplusplus)
11extern "C" {
12#endif
13
14#define DRM_ROCKET_CREATE_BO 0x00
15#define DRM_ROCKET_SUBMIT 0x01
16#define DRM_ROCKET_PREP_BO 0x02
17#define DRM_ROCKET_FINI_BO 0x03
18
19#define DRM_IOCTL_ROCKET_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKET_CREATE_BO, struct drm_rocket_create_bo)
20#define DRM_IOCTL_ROCKET_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_SUBMIT, struct drm_rocket_submit)
21#define DRM_IOCTL_ROCKET_PREP_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_PREP_BO, struct drm_rocket_prep_bo)
22#define DRM_IOCTL_ROCKET_FINI_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_FINI_BO, struct drm_rocket_fini_bo)
23
24/**
25 * struct drm_rocket_create_bo - ioctl argument for creating Rocket BOs.
26 *
27 */
28struct drm_rocket_create_bo {
29 /** Input: Size of the requested BO. */
30 __u32 size;
31
32 /** Output: GEM handle for the BO. */
33 __u32 handle;
34
35 /**
36 * Output: DMA address for the BO in the NPU address space. This address
37 * is private to the DRM fd and is valid for the lifetime of the GEM
38 * handle.
39 */
40 __u64 dma_address;
41
42 /** Output: Offset into the drm node to use for subsequent mmap call. */
43 __u64 offset;
44};
45
46/**
47 * struct drm_rocket_prep_bo - ioctl argument for starting CPU ownership of the BO.
48 *
49 * Takes care of waiting for any NPU jobs that might still use the NPU and performs cache
50 * synchronization.
51 */
52struct drm_rocket_prep_bo {
53 /** Input: GEM handle of the buffer object. */
54 __u32 handle;
55
56 /** Reserved, must be zero. */
57 __u32 reserved;
58
59 /** Input: Amount of time to wait for NPU jobs. */
60 __s64 timeout_ns;
61};
62
63/**
64 * struct drm_rocket_fini_bo - ioctl argument for finishing CPU ownership of the BO.
65 *
66 * Synchronize caches for NPU access.
67 */
68struct drm_rocket_fini_bo {
69 /** Input: GEM handle of the buffer object. */
70 __u32 handle;
71
72 /** Reserved, must be zero. */
73 __u32 reserved;
74};
75
76/**
77 * struct drm_rocket_task - A task to be run on the NPU
78 *
79 * A task is the smallest unit of work that can be run on the NPU.
80 */
81struct drm_rocket_task {
82 /** Input: DMA address to NPU mapping of register command buffer */
83 __u32 regcmd;
84
85 /** Input: Number of commands in the register command buffer */
86 __u32 regcmd_count;
87};
88
89/**
90 * struct drm_rocket_job - A job to be run on the NPU
91 *
92 * The kernel will schedule the execution of this job taking into account its
93 * dependencies with other jobs. All tasks in the same job will be executed
94 * sequentially on the same core, to benefit from memory residency in SRAM.
95 */
96struct drm_rocket_job {
97 /** Input: Pointer to an array of struct drm_rocket_task. */
98 __u64 tasks;
99
100 /** Input: Pointer to a u32 array of the BOs that are read by the job. */
101 __u64 in_bo_handles;
102
103 /** Input: Pointer to a u32 array of the BOs that are written to by the job. */
104 __u64 out_bo_handles;
105
106 /** Input: Number of tasks passed in. */
107 __u32 task_count;
108
109 /** Input: Size in bytes of the structs in the @tasks field. */
110 __u32 task_struct_size;
111
112 /** Input: Number of input BO handles passed in (size is that times 4). */
113 __u32 in_bo_handle_count;
114
115 /** Input: Number of output BO handles passed in (size is that times 4). */
116 __u32 out_bo_handle_count;
117};
118
119/**
120 * struct drm_rocket_submit - ioctl argument for submitting commands to the NPU.
121 *
122 * The kernel will schedule the execution of these jobs in dependency order.
123 */
124struct drm_rocket_submit {
125 /** Input: Pointer to an array of struct drm_rocket_job. */
126 __u64 jobs;
127
128 /** Input: Number of jobs passed in. */
129 __u32 job_count;
130
131 /** Input: Size in bytes of the structs in the @jobs field. */
132 __u32 job_struct_size;
133
134 /** Reserved, must be zero. */
135 __u64 reserved;
136};
137
138#if defined(__cplusplus)
139}
140#endif
141
142#endif /* __DRM_UAPI_ROCKET_ACCEL_H__ */