Linux kernel mirror (for testing)
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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright 2009-2010 Pengutronix
4 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
5 */
6#ifndef __LINUX_MFD_MC13XXX_H
7#define __LINUX_MFD_MC13XXX_H
8
9#include <linux/interrupt.h>
10
11struct mc13xxx;
12
13void mc13xxx_lock(struct mc13xxx *mc13xxx);
14void mc13xxx_unlock(struct mc13xxx *mc13xxx);
15
16int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val);
17int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val);
18int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset,
19 u32 mask, u32 val);
20
21int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq,
22 irq_handler_t handler, const char *name, void *dev);
23int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev);
24
25int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq,
26 int *enabled, int *pending);
27
28int mc13xxx_get_flags(struct mc13xxx *mc13xxx);
29
30int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx,
31 unsigned int mode, unsigned int channel,
32 u8 ato, bool atox, unsigned int *sample);
33
34static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq,
35 irq_handler_t handler,
36 const char *name, void *dev)
37{
38 return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev);
39}
40
41int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq);
42int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq);
43
44#define MC13783_AUDIO_RX0 36
45#define MC13783_AUDIO_RX1 37
46#define MC13783_AUDIO_TX 38
47#define MC13783_SSI_NETWORK 39
48#define MC13783_AUDIO_CODEC 40
49#define MC13783_AUDIO_DAC 41
50
51#define MC13XXX_IRQ_ADCDONE 0
52#define MC13XXX_IRQ_ADCBISDONE 1
53#define MC13XXX_IRQ_TS 2
54#define MC13XXX_IRQ_CHGDET 6
55#define MC13XXX_IRQ_CHGREV 8
56#define MC13XXX_IRQ_CHGSHORT 9
57#define MC13XXX_IRQ_CCCV 10
58#define MC13XXX_IRQ_CHGCURR 11
59#define MC13XXX_IRQ_BPON 12
60#define MC13XXX_IRQ_LOBATL 13
61#define MC13XXX_IRQ_LOBATH 14
62#define MC13XXX_IRQ_1HZ 24
63#define MC13XXX_IRQ_TODA 25
64#define MC13XXX_IRQ_SYSRST 30
65#define MC13XXX_IRQ_RTCRST 31
66#define MC13XXX_IRQ_PC 32
67#define MC13XXX_IRQ_WARM 33
68#define MC13XXX_IRQ_MEMHLD 34
69#define MC13XXX_IRQ_THWARNL 36
70#define MC13XXX_IRQ_THWARNH 37
71#define MC13XXX_IRQ_CLK 38
72
73struct regulator_init_data;
74
75struct mc13xxx_regulator_init_data {
76 int id;
77 struct regulator_init_data *init_data;
78 struct device_node *node;
79};
80
81struct mc13xxx_regulator_platform_data {
82 int num_regulators;
83 struct mc13xxx_regulator_init_data *regulators;
84};
85
86enum {
87 /* MC13783 LED IDs */
88 MC13783_LED_MD,
89 MC13783_LED_AD,
90 MC13783_LED_KP,
91 MC13783_LED_R1,
92 MC13783_LED_G1,
93 MC13783_LED_B1,
94 MC13783_LED_R2,
95 MC13783_LED_G2,
96 MC13783_LED_B2,
97 MC13783_LED_R3,
98 MC13783_LED_G3,
99 MC13783_LED_B3,
100 /* MC13892 LED IDs */
101 MC13892_LED_MD,
102 MC13892_LED_AD,
103 MC13892_LED_KP,
104 MC13892_LED_R,
105 MC13892_LED_G,
106 MC13892_LED_B,
107 /* MC34708 LED IDs */
108 MC34708_LED_R,
109 MC34708_LED_G,
110};
111
112struct mc13xxx_led_platform_data {
113 int id;
114 const char *name;
115 const char *default_trigger;
116};
117
118#define MAX_LED_CONTROL_REGS 6
119
120/* MC13783 LED Control 0 */
121#define MC13783_LED_C0_ENABLE (1 << 0)
122#define MC13783_LED_C0_TRIODE_MD (1 << 7)
123#define MC13783_LED_C0_TRIODE_AD (1 << 8)
124#define MC13783_LED_C0_TRIODE_KP (1 << 9)
125#define MC13783_LED_C0_BOOST (1 << 10)
126#define MC13783_LED_C0_ABMODE(x) (((x) & 0x7) << 11)
127#define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14)
128/* MC13783 LED Control 1 */
129#define MC13783_LED_C1_TC1HALF (1 << 18)
130#define MC13783_LED_C1_SLEWLIM (1 << 23)
131/* MC13783 LED Control 2 */
132#define MC13783_LED_C2_CURRENT_MD(x) (((x) & 0x7) << 0)
133#define MC13783_LED_C2_CURRENT_AD(x) (((x) & 0x7) << 3)
134#define MC13783_LED_C2_CURRENT_KP(x) (((x) & 0x7) << 6)
135#define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21)
136#define MC13783_LED_C2_SLEWLIM (1 << 23)
137/* MC13783 LED Control 3 */
138#define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0)
139#define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2)
140#define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4)
141#define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21)
142#define MC13783_LED_C3_TRIODE_TC1 (1 << 23)
143/* MC13783 LED Control 4 */
144#define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0)
145#define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2)
146#define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4)
147#define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 21)
148#define MC13783_LED_C4_TRIODE_TC2 (1 << 23)
149/* MC13783 LED Control 5 */
150#define MC13783_LED_C5_CURRENT_R3(x) (((x) & 0x3) << 0)
151#define MC13783_LED_C5_CURRENT_G3(x) (((x) & 0x3) << 2)
152#define MC13783_LED_C5_CURRENT_B3(x) (((x) & 0x3) << 4)
153#define MC13783_LED_C5_PERIOD(x) (((x) & 0x3) << 21)
154#define MC13783_LED_C5_TRIODE_TC3 (1 << 23)
155/* MC13892 LED Control 0 */
156#define MC13892_LED_C0_CURRENT_MD(x) (((x) & 0x7) << 9)
157#define MC13892_LED_C0_CURRENT_AD(x) (((x) & 0x7) << 21)
158/* MC13892 LED Control 1 */
159#define MC13892_LED_C1_CURRENT_KP(x) (((x) & 0x7) << 9)
160/* MC13892 LED Control 2 */
161#define MC13892_LED_C2_CURRENT_R(x) (((x) & 0x7) << 9)
162#define MC13892_LED_C2_CURRENT_G(x) (((x) & 0x7) << 21)
163/* MC13892 LED Control 3 */
164#define MC13892_LED_C3_CURRENT_B(x) (((x) & 0x7) << 9)
165/* MC34708 LED Control 0 */
166#define MC34708_LED_C0_CURRENT_R(x) (((x) & 0x3) << 9)
167#define MC34708_LED_C0_CURRENT_G(x) (((x) & 0x3) << 21)
168
169struct mc13xxx_leds_platform_data {
170 struct mc13xxx_led_platform_data *led;
171 int num_leds;
172 u32 led_control[MAX_LED_CONTROL_REGS];
173};
174
175#define MC13783_BUTTON_DBNC_0MS 0
176#define MC13783_BUTTON_DBNC_30MS 1
177#define MC13783_BUTTON_DBNC_150MS 2
178#define MC13783_BUTTON_DBNC_750MS 3
179#define MC13783_BUTTON_ENABLE (1 << 2)
180#define MC13783_BUTTON_POL_INVERT (1 << 3)
181#define MC13783_BUTTON_RESET_EN (1 << 4)
182
183struct mc13xxx_buttons_platform_data {
184 int b1on_flags;
185 unsigned short b1on_key;
186 int b2on_flags;
187 unsigned short b2on_key;
188 int b3on_flags;
189 unsigned short b3on_key;
190};
191
192#define MC13783_TS_ATO_FIRST false
193#define MC13783_TS_ATO_EACH true
194
195struct mc13xxx_ts_platform_data {
196 /* Delay between Touchscreen polarization and ADC Conversion.
197 * Given in clock ticks of a 32 kHz clock which gives a granularity of
198 * about 30.5ms */
199 u8 ato;
200 /* Use the ATO delay only for the first conversion or for each one */
201 bool atox;
202};
203
204enum mc13783_ssi_port {
205 MC13783_SSI1_PORT,
206 MC13783_SSI2_PORT,
207};
208
209struct mc13xxx_codec_platform_data {
210 enum mc13783_ssi_port adc_ssi_port;
211 enum mc13783_ssi_port dac_ssi_port;
212};
213
214#define MC13XXX_USE_TOUCHSCREEN (1 << 0)
215#define MC13XXX_USE_CODEC (1 << 1)
216#define MC13XXX_USE_ADC (1 << 2)
217#define MC13XXX_USE_RTC (1 << 3)
218
219struct mc13xxx_platform_data {
220 unsigned int flags;
221
222 struct mc13xxx_regulator_platform_data regulators;
223 struct mc13xxx_leds_platform_data *leds;
224 struct mc13xxx_buttons_platform_data *buttons;
225 struct mc13xxx_ts_platform_data touch;
226 struct mc13xxx_codec_platform_data *codec;
227};
228
229#define MC13XXX_ADC_MODE_TS 1
230#define MC13XXX_ADC_MODE_SINGLE_CHAN 2
231#define MC13XXX_ADC_MODE_MULT_CHAN 3
232
233#define MC13XXX_ADC0 43
234#define MC13XXX_ADC0_LICELLCON (1 << 0)
235#define MC13XXX_ADC0_CHRGICON (1 << 1)
236#define MC13XXX_ADC0_BATICON (1 << 2)
237#define MC13XXX_ADC0_ADIN7SEL_DIE (1 << 4)
238#define MC13XXX_ADC0_ADIN7SEL_UID (2 << 4)
239#define MC13XXX_ADC0_ADREFEN (1 << 10)
240#define MC13XXX_ADC0_TSMOD0 (1 << 12)
241#define MC13XXX_ADC0_TSMOD1 (1 << 13)
242#define MC13XXX_ADC0_TSMOD2 (1 << 14)
243#define MC13XXX_ADC0_CHRGRAWDIV (1 << 15)
244#define MC13XXX_ADC0_ADINC1 (1 << 16)
245#define MC13XXX_ADC0_ADINC2 (1 << 17)
246
247#define MC13XXX_ADC0_TSMOD_MASK (MC13XXX_ADC0_TSMOD0 | \
248 MC13XXX_ADC0_TSMOD1 | \
249 MC13XXX_ADC0_TSMOD2)
250
251#define MC13XXX_ADC0_CONFIG_MASK (MC13XXX_ADC0_TSMOD_MASK | \
252 MC13XXX_ADC0_LICELLCON | \
253 MC13XXX_ADC0_CHRGICON | \
254 MC13XXX_ADC0_BATICON)
255
256#endif /* ifndef __LINUX_MFD_MC13XXX_H */