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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Maxim MAX77705 definitions.
4 *
5 * Copyright (C) 2015 Samsung Electronics, Inc.
6 * Copyright (C) 2025 Dzmitry Sankouski <dsankouski@gmail.com>
7 */
8
9#ifndef __LINUX_MFD_MAX77705_PRIV_H
10#define __LINUX_MFD_MAX77705_PRIV_H
11
12#define MAX77705_SRC_IRQ_CHG BIT(0)
13#define MAX77705_SRC_IRQ_TOP BIT(1)
14#define MAX77705_SRC_IRQ_FG BIT(2)
15#define MAX77705_SRC_IRQ_USBC BIT(3)
16#define MAX77705_SRC_IRQ_ALL (MAX77705_SRC_IRQ_CHG | MAX77705_SRC_IRQ_TOP | \
17 MAX77705_SRC_IRQ_FG | MAX77705_SRC_IRQ_USBC)
18
19/* MAX77705_PMIC_REG_PMICREV register */
20#define MAX77705_VERSION_SHIFT 3
21#define MAX77705_REVISION_MASK GENMASK(2, 0)
22#define MAX77705_VERSION_MASK GENMASK(7, MAX77705_VERSION_SHIFT)
23/* MAX77705_PMIC_REG_MAINCTRL1 register */
24#define MAX77705_MAINCTRL1_BIASEN_SHIFT 7
25#define MAX77705_MAINCTRL1_BIASEN_MASK BIT(MAX77705_MAINCTRL1_BIASEN_SHIFT)
26/* MAX77705_PMIC_REG_MCONFIG2 (haptics) register */
27#define MAX77705_CONFIG2_MEN_SHIFT 6
28#define MAX77705_CONFIG2_MODE_SHIFT 7
29#define MAX77705_CONFIG2_HTYP_SHIFT 5
30/* MAX77705_PMIC_REG_SYSTEM_INT_MASK register */
31#define MAX77705_SYSTEM_IRQ_BSTEN_INT BIT(3)
32#define MAX77705_SYSTEM_IRQ_SYSUVLO_INT BIT(4)
33#define MAX77705_SYSTEM_IRQ_SYSOVLO_INT BIT(5)
34#define MAX77705_SYSTEM_IRQ_TSHDN_INT BIT(6)
35#define MAX77705_SYSTEM_IRQ_TM_INT BIT(7)
36/* MAX77705_RGBLED_REG_LEDEN register */
37#define MAX77705_RGBLED_EN_WIDTH 2
38/* MAX77705_RGBLED_REG_LEDBLNK register */
39#define MAX77705_RGB_DELAY_100_STEP_LIM 500
40#define MAX77705_RGB_DELAY_100_STEP_COUNT 4
41#define MAX77705_RGB_DELAY_100_STEP 100
42#define MAX77705_RGB_DELAY_250_STEP_LIM 3250
43#define MAX77705_RGB_DELAY_250_STEP 250
44#define MAX77705_RGB_DELAY_500_STEP 500
45#define MAX77705_RGB_DELAY_500_STEP_COUNT 10
46#define MAX77705_RGB_DELAY_500_STEP_LIM 5000
47#define MAX77705_RGB_DELAY_1000_STEP_LIM 8000
48#define MAX77705_RGB_DELAY_1000_STEP_COUNT 13
49#define MAX77705_RGB_DELAY_1000_STEP 1000
50#define MAX77705_RGB_DELAY_2000_STEP 2000
51#define MAX77705_RGB_DELAY_2000_STEP_COUNT 13
52#define MAX77705_RGB_DELAY_2000_STEP_LIM 12000
53
54enum max77705_hw_rev {
55 MAX77705_PASS1 = 1,
56 MAX77705_PASS2,
57 MAX77705_PASS3
58};
59
60enum max77705_reg {
61 MAX77705_PMIC_REG_PMICID1 = 0x00,
62 MAX77705_PMIC_REG_PMICREV = 0x01,
63 MAX77705_PMIC_REG_MAINCTRL1 = 0x02,
64 MAX77705_PMIC_REG_BSTOUT_MASK = 0x03,
65 MAX77705_PMIC_REG_FORCE_EN_MASK = 0x08,
66 MAX77705_PMIC_REG_MCONFIG = 0x10,
67 MAX77705_PMIC_REG_MCONFIG2 = 0x11,
68 MAX77705_PMIC_REG_INTSRC = 0x22,
69 MAX77705_PMIC_REG_INTSRC_MASK = 0x23,
70 MAX77705_PMIC_REG_SYSTEM_INT = 0x24,
71 MAX77705_PMIC_REG_RESERVED_25 = 0x25,
72 MAX77705_PMIC_REG_SYSTEM_INT_MASK = 0x26,
73 MAX77705_PMIC_REG_RESERVED_27 = 0x27,
74 MAX77705_PMIC_REG_RESERVED_28 = 0x28,
75 MAX77705_PMIC_REG_RESERVED_29 = 0x29,
76 MAX77705_PMIC_REG_BOOSTCONTROL1 = 0x4C,
77 MAX77705_PMIC_REG_BOOSTCONTROL2 = 0x4F,
78 MAX77705_PMIC_REG_SW_RESET = 0x50,
79 MAX77705_PMIC_REG_USBC_RESET = 0x51,
80
81 MAX77705_PMIC_REG_END
82};
83
84enum max77705_chg_reg {
85 MAX77705_CHG_REG_BASE = 0xB0,
86 MAX77705_CHG_REG_INT = 0,
87 MAX77705_CHG_REG_INT_MASK,
88 MAX77705_CHG_REG_INT_OK,
89 MAX77705_CHG_REG_DETAILS_00,
90 MAX77705_CHG_REG_DETAILS_01,
91 MAX77705_CHG_REG_DETAILS_02,
92 MAX77705_CHG_REG_DTLS_03,
93 MAX77705_CHG_REG_CNFG_00,
94 MAX77705_CHG_REG_CNFG_01,
95 MAX77705_CHG_REG_CNFG_02,
96 MAX77705_CHG_REG_CNFG_03,
97 MAX77705_CHG_REG_CNFG_04,
98 MAX77705_CHG_REG_CNFG_05,
99 MAX77705_CHG_REG_CNFG_06,
100 MAX77705_CHG_REG_CNFG_07,
101 MAX77705_CHG_REG_CNFG_08,
102 MAX77705_CHG_REG_CNFG_09,
103 MAX77705_CHG_REG_CNFG_10,
104 MAX77705_CHG_REG_CNFG_11,
105
106 MAX77705_CHG_REG_CNFG_12,
107 MAX77705_CHG_REG_CNFG_13,
108 MAX77705_CHG_REG_CNFG_14,
109 MAX77705_CHG_REG_SAFEOUT_CTRL
110};
111
112enum max77705_fuelgauge_reg {
113 STATUS_REG = 0x00,
114 VALRT_THRESHOLD_REG = 0x01,
115 TALRT_THRESHOLD_REG = 0x02,
116 SALRT_THRESHOLD_REG = 0x03,
117 REMCAP_REP_REG = 0x05,
118 SOCREP_REG = 0x06,
119 TEMPERATURE_REG = 0x08,
120 VCELL_REG = 0x09,
121 TIME_TO_EMPTY_REG = 0x11,
122 FULLSOCTHR_REG = 0x13,
123 CURRENT_REG = 0x0A,
124 AVG_CURRENT_REG = 0x0B,
125 SOCMIX_REG = 0x0D,
126 SOCAV_REG = 0x0E,
127 REMCAP_MIX_REG = 0x0F,
128 FULLCAP_REG = 0x10,
129 RFAST_REG = 0x15,
130 AVR_TEMPERATURE_REG = 0x16,
131 CYCLES_REG = 0x17,
132 DESIGNCAP_REG = 0x18,
133 AVR_VCELL_REG = 0x19,
134 TIME_TO_FULL_REG = 0x20,
135 CONFIG_REG = 0x1D,
136 ICHGTERM_REG = 0x1E,
137 REMCAP_AV_REG = 0x1F,
138 FULLCAP_NOM_REG = 0x23,
139 LEARN_CFG_REG = 0x28,
140 FILTER_CFG_REG = 0x29,
141 MISCCFG_REG = 0x2B,
142 QRTABLE20_REG = 0x32,
143 FULLCAP_REP_REG = 0x35,
144 RCOMP_REG = 0x38,
145 VEMPTY_REG = 0x3A,
146 FSTAT_REG = 0x3D,
147 DISCHARGE_THRESHOLD_REG = 0x40,
148 QRTABLE30_REG = 0x42,
149 ISYS_REG = 0x43,
150 DQACC_REG = 0x45,
151 DPACC_REG = 0x46,
152 AVGISYS_REG = 0x4B,
153 QH_REG = 0x4D,
154 VSYS_REG = 0xB1,
155 TALRTTH2_REG = 0xB2,
156 VBYP_REG = 0xB3,
157 CONFIG2_REG = 0xBB,
158 IIN_REG = 0xD0,
159 OCV_REG = 0xEE,
160 VFOCV_REG = 0xFB,
161 VFSOC_REG = 0xFF,
162
163 MAX77705_FG_END
164};
165
166enum max77705_led_reg {
167 MAX77705_RGBLED_REG_BASE = 0x30,
168 MAX77705_RGBLED_REG_LEDEN = 0,
169 MAX77705_RGBLED_REG_LED0BRT,
170 MAX77705_RGBLED_REG_LED1BRT,
171 MAX77705_RGBLED_REG_LED2BRT,
172 MAX77705_RGBLED_REG_LED3BRT,
173 MAX77705_RGBLED_REG_LEDRMP,
174 MAX77705_RGBLED_REG_LEDBLNK,
175 MAX77705_LED_REG_END
176};
177
178enum max77705_charger_battery_state {
179 MAX77705_BATTERY_NOBAT,
180 MAX77705_BATTERY_PREQUALIFICATION,
181 MAX77705_BATTERY_DEAD,
182 MAX77705_BATTERY_GOOD,
183 MAX77705_BATTERY_LOWVOLTAGE,
184 MAX77705_BATTERY_OVERVOLTAGE,
185 MAX77705_BATTERY_RESERVED
186};
187
188enum max77705_charger_charge_type {
189 MAX77705_CHARGER_CONSTANT_CURRENT = 1,
190 MAX77705_CHARGER_CONSTANT_VOLTAGE,
191 MAX77705_CHARGER_END_OF_CHARGE,
192 MAX77705_CHARGER_DONE
193};
194
195#endif /* __LINUX_MFD_MAX77705_PRIV_H */