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1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock 4 * 5 * Copyright (C) 2009-2011 Freescale Semiconductor. 6 * Author: Jack Lan <jack.lan@freescale.com> 7 * Copyright (C) 2008 MIMOMax Wireless Ltd. 8 */ 9 10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 11 12#include <linux/kernel.h> 13#include <linux/module.h> 14#include <linux/interrupt.h> 15#include <linux/i2c.h> 16#include <linux/spi/spi.h> 17#include <linux/rtc.h> 18#include <linux/bcd.h> 19#include <linux/slab.h> 20#include <linux/regmap.h> 21#include <linux/hwmon.h> 22 23#define DS3232_REG_SECONDS 0x00 24#define DS3232_REG_MINUTES 0x01 25#define DS3232_REG_HOURS 0x02 26#define DS3232_REG_AMPM 0x02 27#define DS3232_REG_DAY 0x03 28#define DS3232_REG_DATE 0x04 29#define DS3232_REG_MONTH 0x05 30#define DS3232_REG_CENTURY 0x05 31#define DS3232_REG_YEAR 0x06 32#define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ 33#define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ 34#define DS3232_REG_CR 0x0E /* Control register */ 35# define DS3232_REG_CR_nEOSC 0x80 36# define DS3232_REG_CR_INTCN 0x04 37# define DS3232_REG_CR_A2IE 0x02 38# define DS3232_REG_CR_A1IE 0x01 39 40#define DS3232_REG_SR 0x0F /* control/status register */ 41# define DS3232_REG_SR_OSF 0x80 42# define DS3232_REG_SR_BSY 0x04 43# define DS3232_REG_SR_A2F 0x02 44# define DS3232_REG_SR_A1F 0x01 45 46#define DS3232_REG_TEMPERATURE 0x11 47#define DS3232_REG_SRAM_START 0x14 48#define DS3232_REG_SRAM_END 0xFF 49 50#define DS3232_REG_SRAM_SIZE 236 51 52struct ds3232 { 53 struct device *dev; 54 struct regmap *regmap; 55 int irq; 56 struct rtc_device *rtc; 57 58 bool suspended; 59}; 60 61static int ds3232_check_rtc_status(struct device *dev) 62{ 63 struct ds3232 *ds3232 = dev_get_drvdata(dev); 64 int ret = 0; 65 int control, stat; 66 67 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 68 if (ret) 69 return ret; 70 71 if (stat & DS3232_REG_SR_OSF) 72 dev_warn(dev, 73 "oscillator discontinuity flagged, " 74 "time unreliable\n"); 75 76 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 77 78 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 79 if (ret) 80 return ret; 81 82 /* If the alarm is pending, clear it before requesting 83 * the interrupt, so an interrupt event isn't reported 84 * before everything is initialized. 85 */ 86 87 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 88 if (ret) 89 return ret; 90 91 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 92 control |= DS3232_REG_CR_INTCN; 93 94 return regmap_write(ds3232->regmap, DS3232_REG_CR, control); 95} 96 97static int ds3232_read_time(struct device *dev, struct rtc_time *time) 98{ 99 struct ds3232 *ds3232 = dev_get_drvdata(dev); 100 int ret; 101 u8 buf[7]; 102 unsigned int year, month, day, hour, minute, second; 103 unsigned int week, twelve_hr, am_pm; 104 unsigned int century, add_century = 0; 105 106 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); 107 if (ret) 108 return ret; 109 110 second = buf[0]; 111 minute = buf[1]; 112 hour = buf[2]; 113 week = buf[3]; 114 day = buf[4]; 115 month = buf[5]; 116 year = buf[6]; 117 118 /* Extract additional information for AM/PM and century */ 119 120 twelve_hr = hour & 0x40; 121 am_pm = hour & 0x20; 122 century = month & 0x80; 123 124 /* Write to rtc_time structure */ 125 126 time->tm_sec = bcd2bin(second); 127 time->tm_min = bcd2bin(minute); 128 if (twelve_hr) { 129 /* Convert to 24 hr */ 130 if (am_pm) 131 time->tm_hour = bcd2bin(hour & 0x1F) + 12; 132 else 133 time->tm_hour = bcd2bin(hour & 0x1F); 134 } else { 135 time->tm_hour = bcd2bin(hour); 136 } 137 138 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ 139 time->tm_wday = bcd2bin(week) - 1; 140 time->tm_mday = bcd2bin(day); 141 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ 142 time->tm_mon = bcd2bin(month & 0x7F) - 1; 143 if (century) 144 add_century = 100; 145 146 time->tm_year = bcd2bin(year) + add_century; 147 148 return 0; 149} 150 151static int ds3232_set_time(struct device *dev, struct rtc_time *time) 152{ 153 struct ds3232 *ds3232 = dev_get_drvdata(dev); 154 u8 buf[7]; 155 156 /* Extract time from rtc_time and load into ds3232*/ 157 158 buf[0] = bin2bcd(time->tm_sec); 159 buf[1] = bin2bcd(time->tm_min); 160 buf[2] = bin2bcd(time->tm_hour); 161 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ 162 buf[3] = bin2bcd(time->tm_wday + 1); 163 buf[4] = bin2bcd(time->tm_mday); /* Date */ 164 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ 165 buf[5] = bin2bcd(time->tm_mon + 1); 166 if (time->tm_year >= 100) { 167 buf[5] |= 0x80; 168 buf[6] = bin2bcd(time->tm_year - 100); 169 } else { 170 buf[6] = bin2bcd(time->tm_year); 171 } 172 173 return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); 174} 175 176/* 177 * DS3232 has two alarm, we only use alarm1 178 * According to linux specification, only support one-shot alarm 179 * no periodic alarm mode 180 */ 181static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 182{ 183 struct ds3232 *ds3232 = dev_get_drvdata(dev); 184 int control, stat; 185 int ret; 186 u8 buf[4]; 187 188 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 189 if (ret) 190 goto out; 191 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 192 if (ret) 193 goto out; 194 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); 195 if (ret) 196 goto out; 197 198 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); 199 alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); 200 alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); 201 alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); 202 203 alarm->enabled = !!(control & DS3232_REG_CR_A1IE); 204 alarm->pending = !!(stat & DS3232_REG_SR_A1F); 205 206 ret = 0; 207out: 208 return ret; 209} 210 211/* 212 * linux rtc-module does not support wday alarm 213 * and only 24h time mode supported indeed 214 */ 215static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 216{ 217 struct ds3232 *ds3232 = dev_get_drvdata(dev); 218 int control, stat; 219 int ret; 220 u8 buf[4]; 221 222 if (ds3232->irq <= 0) 223 return -EINVAL; 224 225 buf[0] = bin2bcd(alarm->time.tm_sec); 226 buf[1] = bin2bcd(alarm->time.tm_min); 227 buf[2] = bin2bcd(alarm->time.tm_hour); 228 buf[3] = bin2bcd(alarm->time.tm_mday); 229 230 /* clear alarm interrupt enable bit */ 231 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 232 if (ret) 233 goto out; 234 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 235 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 236 if (ret) 237 goto out; 238 239 /* clear any pending alarm flag */ 240 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 241 if (ret) 242 goto out; 243 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 244 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 245 if (ret) 246 goto out; 247 248 ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); 249 if (ret) 250 goto out; 251 252 if (alarm->enabled) { 253 control |= DS3232_REG_CR_A1IE; 254 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 255 } 256out: 257 return ret; 258} 259 260static int ds3232_update_alarm(struct device *dev, unsigned int enabled) 261{ 262 struct ds3232 *ds3232 = dev_get_drvdata(dev); 263 int control; 264 int ret; 265 266 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 267 if (ret) 268 return ret; 269 270 if (enabled) 271 /* enable alarm1 interrupt */ 272 control |= DS3232_REG_CR_A1IE; 273 else 274 /* disable alarm1 interrupt */ 275 control &= ~(DS3232_REG_CR_A1IE); 276 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 277 278 return ret; 279} 280 281/* 282 * Temperature sensor support for ds3232/ds3234 devices. 283 * A user-initiated temperature conversion is not started by this function, 284 * so the temperature is updated once every 64 seconds. 285 */ 286static int ds3232_hwmon_read_temp(struct device *dev, long int *mC) 287{ 288 struct ds3232 *ds3232 = dev_get_drvdata(dev); 289 u8 temp_buf[2]; 290 s16 temp; 291 int ret; 292 293 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf, 294 sizeof(temp_buf)); 295 if (ret < 0) 296 return ret; 297 298 /* 299 * Temperature is represented as a 10-bit code with a resolution of 300 * 0.25 degree celsius and encoded in two's complement format. 301 */ 302 temp = (temp_buf[0] << 8) | temp_buf[1]; 303 temp >>= 6; 304 *mC = temp * 250; 305 306 return 0; 307} 308 309static umode_t ds3232_hwmon_is_visible(const void *data, 310 enum hwmon_sensor_types type, 311 u32 attr, int channel) 312{ 313 if (type != hwmon_temp) 314 return 0; 315 316 switch (attr) { 317 case hwmon_temp_input: 318 return 0444; 319 default: 320 return 0; 321 } 322} 323 324static int ds3232_hwmon_read(struct device *dev, 325 enum hwmon_sensor_types type, 326 u32 attr, int channel, long *temp) 327{ 328 int err; 329 330 switch (attr) { 331 case hwmon_temp_input: 332 err = ds3232_hwmon_read_temp(dev, temp); 333 break; 334 default: 335 err = -EOPNOTSUPP; 336 break; 337 } 338 339 return err; 340} 341 342static const struct hwmon_channel_info * const ds3232_hwmon_info[] = { 343 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 344 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), 345 NULL 346}; 347 348static const struct hwmon_ops ds3232_hwmon_hwmon_ops = { 349 .is_visible = ds3232_hwmon_is_visible, 350 .read = ds3232_hwmon_read, 351}; 352 353static const struct hwmon_chip_info ds3232_hwmon_chip_info = { 354 .ops = &ds3232_hwmon_hwmon_ops, 355 .info = ds3232_hwmon_info, 356}; 357 358static void ds3232_hwmon_register(struct device *dev, const char *name) 359{ 360 struct ds3232 *ds3232 = dev_get_drvdata(dev); 361 struct device *hwmon_dev; 362 363 if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON)) 364 return; 365 366 hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232, 367 &ds3232_hwmon_chip_info, 368 NULL); 369 if (IS_ERR(hwmon_dev)) { 370 dev_err(dev, "unable to register hwmon device %ld\n", 371 PTR_ERR(hwmon_dev)); 372 } 373} 374 375static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) 376{ 377 struct ds3232 *ds3232 = dev_get_drvdata(dev); 378 379 if (ds3232->irq <= 0) 380 return -EINVAL; 381 382 return ds3232_update_alarm(dev, enabled); 383} 384 385static irqreturn_t ds3232_irq(int irq, void *dev_id) 386{ 387 struct device *dev = dev_id; 388 struct ds3232 *ds3232 = dev_get_drvdata(dev); 389 int ret; 390 int stat, control; 391 392 rtc_lock(ds3232->rtc); 393 394 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 395 if (ret) 396 goto unlock; 397 398 if (stat & DS3232_REG_SR_A1F) { 399 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 400 if (ret) { 401 dev_warn(ds3232->dev, 402 "Read Control Register error %d\n", ret); 403 } else { 404 /* disable alarm1 interrupt */ 405 control &= ~(DS3232_REG_CR_A1IE); 406 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, 407 control); 408 if (ret) { 409 dev_warn(ds3232->dev, 410 "Write Control Register error %d\n", 411 ret); 412 goto unlock; 413 } 414 415 /* clear the alarm pend flag */ 416 stat &= ~DS3232_REG_SR_A1F; 417 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 418 if (ret) { 419 dev_warn(ds3232->dev, 420 "Write Status Register error %d\n", 421 ret); 422 goto unlock; 423 } 424 425 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); 426 } 427 } 428 429unlock: 430 rtc_unlock(ds3232->rtc); 431 432 return IRQ_HANDLED; 433} 434 435static const struct rtc_class_ops ds3232_rtc_ops = { 436 .read_time = ds3232_read_time, 437 .set_time = ds3232_set_time, 438 .read_alarm = ds3232_read_alarm, 439 .set_alarm = ds3232_set_alarm, 440 .alarm_irq_enable = ds3232_alarm_irq_enable, 441}; 442 443static int ds3232_nvmem_read(void *priv, unsigned int offset, void *val, 444 size_t bytes) 445{ 446 struct regmap *ds3232_regmap = (struct regmap *)priv; 447 448 return regmap_bulk_read(ds3232_regmap, DS3232_REG_SRAM_START + offset, 449 val, bytes); 450} 451 452static int ds3232_nvmem_write(void *priv, unsigned int offset, void *val, 453 size_t bytes) 454{ 455 struct regmap *ds3232_regmap = (struct regmap *)priv; 456 457 return regmap_bulk_write(ds3232_regmap, DS3232_REG_SRAM_START + offset, 458 val, bytes); 459} 460 461static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, 462 const char *name) 463{ 464 struct ds3232 *ds3232; 465 int ret; 466 struct nvmem_config nvmem_cfg = { 467 .name = "ds3232_sram", 468 .stride = 1, 469 .size = DS3232_REG_SRAM_SIZE, 470 .word_size = 1, 471 .reg_read = ds3232_nvmem_read, 472 .reg_write = ds3232_nvmem_write, 473 .priv = regmap, 474 .type = NVMEM_TYPE_BATTERY_BACKED 475 }; 476 477 ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); 478 if (!ds3232) 479 return -ENOMEM; 480 481 ds3232->regmap = regmap; 482 ds3232->irq = irq; 483 ds3232->dev = dev; 484 dev_set_drvdata(dev, ds3232); 485 486 ret = ds3232_check_rtc_status(dev); 487 if (ret) 488 return ret; 489 490 if (ds3232->irq > 0) 491 device_init_wakeup(dev, true); 492 493 ds3232_hwmon_register(dev, name); 494 495 ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, 496 THIS_MODULE); 497 if (IS_ERR(ds3232->rtc)) 498 return PTR_ERR(ds3232->rtc); 499 500 ret = devm_rtc_nvmem_register(ds3232->rtc, &nvmem_cfg); 501 if(ret) 502 return ret; 503 504 if (ds3232->irq > 0) { 505 ret = devm_request_threaded_irq(dev, ds3232->irq, NULL, 506 ds3232_irq, 507 IRQF_SHARED | IRQF_ONESHOT, 508 name, dev); 509 if (ret) { 510 device_set_wakeup_capable(dev, 0); 511 ds3232->irq = 0; 512 dev_err(dev, "unable to request IRQ\n"); 513 } 514 } 515 516 return 0; 517} 518 519#if IS_ENABLED(CONFIG_I2C) 520 521#ifdef CONFIG_PM_SLEEP 522static int ds3232_suspend(struct device *dev) 523{ 524 struct ds3232 *ds3232 = dev_get_drvdata(dev); 525 526 if (device_may_wakeup(dev)) { 527 if (enable_irq_wake(ds3232->irq)) 528 dev_warn_once(dev, "Cannot set wakeup source\n"); 529 } 530 531 return 0; 532} 533 534static int ds3232_resume(struct device *dev) 535{ 536 struct ds3232 *ds3232 = dev_get_drvdata(dev); 537 538 if (device_may_wakeup(dev)) 539 disable_irq_wake(ds3232->irq); 540 541 return 0; 542} 543#endif 544 545static const struct dev_pm_ops ds3232_pm_ops = { 546 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) 547}; 548 549static int ds3232_i2c_probe(struct i2c_client *client) 550{ 551 struct regmap *regmap; 552 static const struct regmap_config config = { 553 .reg_bits = 8, 554 .val_bits = 8, 555 .max_register = DS3232_REG_SRAM_END, 556 }; 557 558 regmap = devm_regmap_init_i2c(client, &config); 559 if (IS_ERR(regmap)) { 560 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", 561 __func__, PTR_ERR(regmap)); 562 return PTR_ERR(regmap); 563 } 564 565 return ds3232_probe(&client->dev, regmap, client->irq, client->name); 566} 567 568static const struct i2c_device_id ds3232_id[] = { 569 { "ds3232" }, 570 { } 571}; 572MODULE_DEVICE_TABLE(i2c, ds3232_id); 573 574static const __maybe_unused struct of_device_id ds3232_of_match[] = { 575 { .compatible = "dallas,ds3232" }, 576 { } 577}; 578MODULE_DEVICE_TABLE(of, ds3232_of_match); 579 580static struct i2c_driver ds3232_driver = { 581 .driver = { 582 .name = "rtc-ds3232", 583 .of_match_table = of_match_ptr(ds3232_of_match), 584 .pm = &ds3232_pm_ops, 585 }, 586 .probe = ds3232_i2c_probe, 587 .id_table = ds3232_id, 588}; 589 590static int ds3232_register_driver(void) 591{ 592 return i2c_add_driver(&ds3232_driver); 593} 594 595static void ds3232_unregister_driver(void) 596{ 597 i2c_del_driver(&ds3232_driver); 598} 599 600#else 601 602static int ds3232_register_driver(void) 603{ 604 return 0; 605} 606 607static void ds3232_unregister_driver(void) 608{ 609} 610 611#endif 612 613#if IS_ENABLED(CONFIG_SPI_MASTER) 614 615static int ds3234_probe(struct spi_device *spi) 616{ 617 int res; 618 unsigned int tmp; 619 static const struct regmap_config config = { 620 .reg_bits = 8, 621 .val_bits = 8, 622 .max_register = DS3232_REG_SRAM_END, 623 .write_flag_mask = 0x80, 624 }; 625 struct regmap *regmap; 626 627 regmap = devm_regmap_init_spi(spi, &config); 628 if (IS_ERR(regmap)) { 629 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", 630 __func__, PTR_ERR(regmap)); 631 return PTR_ERR(regmap); 632 } 633 634 spi->mode = SPI_MODE_3; 635 spi->bits_per_word = 8; 636 spi_setup(spi); 637 638 res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); 639 if (res) 640 return res; 641 642 /* Control settings 643 * 644 * CONTROL_REG 645 * BIT 7 6 5 4 3 2 1 0 646 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE 647 * 648 * 0 0 0 1 1 1 0 0 649 * 650 * CONTROL_STAT_REG 651 * BIT 7 6 5 4 3 2 1 0 652 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F 653 * 654 * 1 0 0 0 1 0 0 0 655 */ 656 res = regmap_read(regmap, DS3232_REG_CR, &tmp); 657 if (res) 658 return res; 659 res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); 660 if (res) 661 return res; 662 663 res = regmap_read(regmap, DS3232_REG_SR, &tmp); 664 if (res) 665 return res; 666 res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); 667 if (res) 668 return res; 669 670 /* Print our settings */ 671 res = regmap_read(regmap, DS3232_REG_CR, &tmp); 672 if (res) 673 return res; 674 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); 675 676 res = regmap_read(regmap, DS3232_REG_SR, &tmp); 677 if (res) 678 return res; 679 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); 680 681 return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); 682} 683 684static struct spi_driver ds3234_driver = { 685 .driver = { 686 .name = "ds3234", 687 }, 688 .probe = ds3234_probe, 689}; 690 691static int ds3234_register_driver(void) 692{ 693 return spi_register_driver(&ds3234_driver); 694} 695 696static void ds3234_unregister_driver(void) 697{ 698 spi_unregister_driver(&ds3234_driver); 699} 700 701#else 702 703static int ds3234_register_driver(void) 704{ 705 return 0; 706} 707 708static void ds3234_unregister_driver(void) 709{ 710} 711 712#endif 713 714static int __init ds323x_init(void) 715{ 716 int ret; 717 718 ret = ds3232_register_driver(); 719 if (ret) { 720 pr_err("Failed to register ds3232 driver: %d\n", ret); 721 return ret; 722 } 723 724 ret = ds3234_register_driver(); 725 if (ret) { 726 pr_err("Failed to register ds3234 driver: %d\n", ret); 727 ds3232_unregister_driver(); 728 } 729 730 return ret; 731} 732module_init(ds323x_init) 733 734static void __exit ds323x_exit(void) 735{ 736 ds3234_unregister_driver(); 737 ds3232_unregister_driver(); 738} 739module_exit(ds323x_exit) 740 741MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); 742MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); 743MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); 744MODULE_LICENSE("GPL"); 745MODULE_ALIAS("spi:ds3234");