tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Copyright (c) 2023 The Linux Foundation. All rights reserved.
4 */
5
6#include <linux/module.h>
7#include <linux/of.h>
8#include <linux/platform_device.h>
9
10#include "pinctrl-msm.h"
11
12#define REG_SIZE 0x1000
13#define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9) \
14 { \
15 .grp = PINCTRL_PINGROUP("gpio" #id, \
16 gpio##id##_pins, \
17 ARRAY_SIZE(gpio##id##_pins)), \
18 .funcs = (int[]){ \
19 msm_mux_gpio, /* gpio mode */ \
20 msm_mux_##f1, \
21 msm_mux_##f2, \
22 msm_mux_##f3, \
23 msm_mux_##f4, \
24 msm_mux_##f5, \
25 msm_mux_##f6, \
26 msm_mux_##f7, \
27 msm_mux_##f8, \
28 msm_mux_##f9 \
29 }, \
30 .nfuncs = 10, \
31 .ctl_reg = REG_SIZE * id, \
32 .io_reg = 0x4 + REG_SIZE * id, \
33 .intr_cfg_reg = 0x8 + REG_SIZE * id, \
34 .intr_status_reg = 0xc + REG_SIZE * id, \
35 .mux_bit = 2, \
36 .pull_bit = 0, \
37 .drv_bit = 6, \
38 .oe_bit = 9, \
39 .in_bit = 0, \
40 .out_bit = 1, \
41 .intr_enable_bit = 0, \
42 .intr_status_bit = 0, \
43 .intr_target_bit = 5, \
44 .intr_target_kpss_val = 3, \
45 .intr_raw_status_bit = 4, \
46 .intr_polarity_bit = 1, \
47 .intr_detection_bit = 2, \
48 .intr_detection_width = 2, \
49 }
50
51static const struct pinctrl_pin_desc ipq9574_pins[] = {
52 PINCTRL_PIN(0, "GPIO_0"),
53 PINCTRL_PIN(1, "GPIO_1"),
54 PINCTRL_PIN(2, "GPIO_2"),
55 PINCTRL_PIN(3, "GPIO_3"),
56 PINCTRL_PIN(4, "GPIO_4"),
57 PINCTRL_PIN(5, "GPIO_5"),
58 PINCTRL_PIN(6, "GPIO_6"),
59 PINCTRL_PIN(7, "GPIO_7"),
60 PINCTRL_PIN(8, "GPIO_8"),
61 PINCTRL_PIN(9, "GPIO_9"),
62 PINCTRL_PIN(10, "GPIO_10"),
63 PINCTRL_PIN(11, "GPIO_11"),
64 PINCTRL_PIN(12, "GPIO_12"),
65 PINCTRL_PIN(13, "GPIO_13"),
66 PINCTRL_PIN(14, "GPIO_14"),
67 PINCTRL_PIN(15, "GPIO_15"),
68 PINCTRL_PIN(16, "GPIO_16"),
69 PINCTRL_PIN(17, "GPIO_17"),
70 PINCTRL_PIN(18, "GPIO_18"),
71 PINCTRL_PIN(19, "GPIO_19"),
72 PINCTRL_PIN(20, "GPIO_20"),
73 PINCTRL_PIN(21, "GPIO_21"),
74 PINCTRL_PIN(22, "GPIO_22"),
75 PINCTRL_PIN(23, "GPIO_23"),
76 PINCTRL_PIN(24, "GPIO_24"),
77 PINCTRL_PIN(25, "GPIO_25"),
78 PINCTRL_PIN(26, "GPIO_26"),
79 PINCTRL_PIN(27, "GPIO_27"),
80 PINCTRL_PIN(28, "GPIO_28"),
81 PINCTRL_PIN(29, "GPIO_29"),
82 PINCTRL_PIN(30, "GPIO_30"),
83 PINCTRL_PIN(31, "GPIO_31"),
84 PINCTRL_PIN(32, "GPIO_32"),
85 PINCTRL_PIN(33, "GPIO_33"),
86 PINCTRL_PIN(34, "GPIO_34"),
87 PINCTRL_PIN(35, "GPIO_35"),
88 PINCTRL_PIN(36, "GPIO_36"),
89 PINCTRL_PIN(37, "GPIO_37"),
90 PINCTRL_PIN(38, "GPIO_38"),
91 PINCTRL_PIN(39, "GPIO_39"),
92 PINCTRL_PIN(40, "GPIO_40"),
93 PINCTRL_PIN(41, "GPIO_41"),
94 PINCTRL_PIN(42, "GPIO_42"),
95 PINCTRL_PIN(43, "GPIO_43"),
96 PINCTRL_PIN(44, "GPIO_44"),
97 PINCTRL_PIN(45, "GPIO_45"),
98 PINCTRL_PIN(46, "GPIO_46"),
99 PINCTRL_PIN(47, "GPIO_47"),
100 PINCTRL_PIN(48, "GPIO_48"),
101 PINCTRL_PIN(49, "GPIO_49"),
102 PINCTRL_PIN(50, "GPIO_50"),
103 PINCTRL_PIN(51, "GPIO_51"),
104 PINCTRL_PIN(52, "GPIO_52"),
105 PINCTRL_PIN(53, "GPIO_53"),
106 PINCTRL_PIN(54, "GPIO_54"),
107 PINCTRL_PIN(55, "GPIO_55"),
108 PINCTRL_PIN(56, "GPIO_56"),
109 PINCTRL_PIN(57, "GPIO_57"),
110 PINCTRL_PIN(58, "GPIO_58"),
111 PINCTRL_PIN(59, "GPIO_59"),
112 PINCTRL_PIN(60, "GPIO_60"),
113 PINCTRL_PIN(61, "GPIO_61"),
114 PINCTRL_PIN(62, "GPIO_62"),
115 PINCTRL_PIN(63, "GPIO_63"),
116 PINCTRL_PIN(64, "GPIO_64"),
117};
118
119#define DECLARE_MSM_GPIO_PINS(pin) \
120 static const unsigned int gpio##pin##_pins[] = { pin }
121DECLARE_MSM_GPIO_PINS(0);
122DECLARE_MSM_GPIO_PINS(1);
123DECLARE_MSM_GPIO_PINS(2);
124DECLARE_MSM_GPIO_PINS(3);
125DECLARE_MSM_GPIO_PINS(4);
126DECLARE_MSM_GPIO_PINS(5);
127DECLARE_MSM_GPIO_PINS(6);
128DECLARE_MSM_GPIO_PINS(7);
129DECLARE_MSM_GPIO_PINS(8);
130DECLARE_MSM_GPIO_PINS(9);
131DECLARE_MSM_GPIO_PINS(10);
132DECLARE_MSM_GPIO_PINS(11);
133DECLARE_MSM_GPIO_PINS(12);
134DECLARE_MSM_GPIO_PINS(13);
135DECLARE_MSM_GPIO_PINS(14);
136DECLARE_MSM_GPIO_PINS(15);
137DECLARE_MSM_GPIO_PINS(16);
138DECLARE_MSM_GPIO_PINS(17);
139DECLARE_MSM_GPIO_PINS(18);
140DECLARE_MSM_GPIO_PINS(19);
141DECLARE_MSM_GPIO_PINS(20);
142DECLARE_MSM_GPIO_PINS(21);
143DECLARE_MSM_GPIO_PINS(22);
144DECLARE_MSM_GPIO_PINS(23);
145DECLARE_MSM_GPIO_PINS(24);
146DECLARE_MSM_GPIO_PINS(25);
147DECLARE_MSM_GPIO_PINS(26);
148DECLARE_MSM_GPIO_PINS(27);
149DECLARE_MSM_GPIO_PINS(28);
150DECLARE_MSM_GPIO_PINS(29);
151DECLARE_MSM_GPIO_PINS(30);
152DECLARE_MSM_GPIO_PINS(31);
153DECLARE_MSM_GPIO_PINS(32);
154DECLARE_MSM_GPIO_PINS(33);
155DECLARE_MSM_GPIO_PINS(34);
156DECLARE_MSM_GPIO_PINS(35);
157DECLARE_MSM_GPIO_PINS(36);
158DECLARE_MSM_GPIO_PINS(37);
159DECLARE_MSM_GPIO_PINS(38);
160DECLARE_MSM_GPIO_PINS(39);
161DECLARE_MSM_GPIO_PINS(40);
162DECLARE_MSM_GPIO_PINS(41);
163DECLARE_MSM_GPIO_PINS(42);
164DECLARE_MSM_GPIO_PINS(43);
165DECLARE_MSM_GPIO_PINS(44);
166DECLARE_MSM_GPIO_PINS(45);
167DECLARE_MSM_GPIO_PINS(46);
168DECLARE_MSM_GPIO_PINS(47);
169DECLARE_MSM_GPIO_PINS(48);
170DECLARE_MSM_GPIO_PINS(49);
171DECLARE_MSM_GPIO_PINS(50);
172DECLARE_MSM_GPIO_PINS(51);
173DECLARE_MSM_GPIO_PINS(52);
174DECLARE_MSM_GPIO_PINS(53);
175DECLARE_MSM_GPIO_PINS(54);
176DECLARE_MSM_GPIO_PINS(55);
177DECLARE_MSM_GPIO_PINS(56);
178DECLARE_MSM_GPIO_PINS(57);
179DECLARE_MSM_GPIO_PINS(58);
180DECLARE_MSM_GPIO_PINS(59);
181DECLARE_MSM_GPIO_PINS(60);
182DECLARE_MSM_GPIO_PINS(61);
183DECLARE_MSM_GPIO_PINS(62);
184DECLARE_MSM_GPIO_PINS(63);
185DECLARE_MSM_GPIO_PINS(64);
186
187enum ipq9574_functions {
188 msm_mux_atest_char,
189 msm_mux_atest_char0,
190 msm_mux_atest_char1,
191 msm_mux_atest_char2,
192 msm_mux_atest_char3,
193 msm_mux_audio_pdm0,
194 msm_mux_audio_pdm1,
195 msm_mux_audio_pri,
196 msm_mux_audio_sec,
197 msm_mux_blsp0_spi,
198 msm_mux_blsp0_uart,
199 msm_mux_blsp1_i2c,
200 msm_mux_blsp1_spi,
201 msm_mux_blsp1_uart,
202 msm_mux_blsp2_i2c,
203 msm_mux_blsp2_spi,
204 msm_mux_blsp2_uart,
205 msm_mux_blsp3_i2c,
206 msm_mux_blsp3_spi,
207 msm_mux_blsp3_uart,
208 msm_mux_blsp4_i2c,
209 msm_mux_blsp4_spi,
210 msm_mux_blsp4_uart,
211 msm_mux_blsp5_i2c,
212 msm_mux_blsp5_uart,
213 msm_mux_cri_trng0,
214 msm_mux_cri_trng1,
215 msm_mux_cri_trng2,
216 msm_mux_cri_trng3,
217 msm_mux_cxc0,
218 msm_mux_cxc1,
219 msm_mux_dbg_out,
220 msm_mux_dwc_ddrphy,
221 msm_mux_gcc_plltest,
222 msm_mux_gcc_tlmm,
223 msm_mux_gpio,
224 msm_mux_mac,
225 msm_mux_mdc,
226 msm_mux_mdio,
227 msm_mux_pcie0_clk,
228 msm_mux_pcie0_wake,
229 msm_mux_pcie1_clk,
230 msm_mux_pcie1_wake,
231 msm_mux_pcie2_clk,
232 msm_mux_pcie2_wake,
233 msm_mux_pcie3_clk,
234 msm_mux_pcie3_wake,
235 msm_mux_prng_rosc0,
236 msm_mux_prng_rosc1,
237 msm_mux_prng_rosc2,
238 msm_mux_prng_rosc3,
239 msm_mux_pta,
240 msm_mux_pwm,
241 msm_mux_qdss_cti_trig_in_a0,
242 msm_mux_qdss_cti_trig_in_a1,
243 msm_mux_qdss_cti_trig_in_b0,
244 msm_mux_qdss_cti_trig_in_b1,
245 msm_mux_qdss_cti_trig_out_a0,
246 msm_mux_qdss_cti_trig_out_a1,
247 msm_mux_qdss_cti_trig_out_b0,
248 msm_mux_qdss_cti_trig_out_b1,
249 msm_mux_qdss_traceclk_a,
250 msm_mux_qdss_traceclk_b,
251 msm_mux_qdss_tracectl_a,
252 msm_mux_qdss_tracectl_b,
253 msm_mux_qdss_tracedata_a,
254 msm_mux_qdss_tracedata_b,
255 msm_mux_qspi_data,
256 msm_mux_qspi_clk,
257 msm_mux_qspi_cs,
258 msm_mux_rx0,
259 msm_mux_rx1,
260 msm_mux_sdc_data,
261 msm_mux_sdc_clk,
262 msm_mux_sdc_cmd,
263 msm_mux_sdc_rclk,
264 msm_mux_tsens_max,
265 msm_mux_wci20,
266 msm_mux_wci21,
267 msm_mux_wsa_swrm,
268 msm_mux__,
269};
270
271static const char * const gpio_groups[] = {
272 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7",
273 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
274 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
275 "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28",
276 "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35",
277 "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42",
278 "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", "gpio48", "gpio49",
279 "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", "gpio56",
280 "gpio57", "gpio58", "gpio59", "gpio60", "gpio61", "gpio62", "gpio63",
281 "gpio64",
282};
283
284static const char * const sdc_data_groups[] = {
285 "gpio0",
286 "gpio1",
287 "gpio2",
288 "gpio3",
289 "gpio6",
290 "gpio7",
291 "gpio8",
292 "gpio9",
293};
294
295static const char * const qspi_data_groups[] = {
296 "gpio0",
297 "gpio1",
298 "gpio2",
299 "gpio3",
300};
301
302static const char * const qdss_traceclk_b_groups[] = {
303 "gpio0",
304};
305
306static const char * const qdss_tracectl_b_groups[] = {
307 "gpio1",
308};
309
310static const char * const qdss_tracedata_b_groups[] = {
311 "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", "gpio8", "gpio9",
312 "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", "gpio16",
313 "gpio17",
314};
315
316static const char * const sdc_cmd_groups[] = {
317 "gpio4",
318};
319
320static const char * const qspi_cs_groups[] = {
321 "gpio4",
322};
323
324static const char * const sdc_clk_groups[] = {
325 "gpio5",
326};
327
328static const char * const qspi_clk_groups[] = {
329 "gpio5",
330};
331
332static const char * const sdc_rclk_groups[] = {
333 "gpio10",
334};
335
336static const char * const blsp0_spi_groups[] = {
337 "gpio11", "gpio12", "gpio13", "gpio14",
338};
339
340static const char * const blsp0_uart_groups[] = {
341 "gpio11", "gpio12", "gpio13", "gpio14",
342};
343
344static const char * const blsp3_spi_groups[] = {
345 "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21",
346};
347
348static const char * const blsp3_i2c_groups[] = {
349 "gpio15", "gpio16",
350};
351
352static const char * const blsp3_uart_groups[] = {
353 "gpio15", "gpio16", "gpio17", "gpio18",
354};
355
356static const char * const dbg_out_groups[] = {
357 "gpio17",
358};
359
360static const char * const cri_trng0_groups[] = {
361 "gpio20", "gpio38",
362};
363
364static const char * const cri_trng1_groups[] = {
365 "gpio21", "gpio34",
366};
367
368static const char * const pcie0_clk_groups[] = {
369 "gpio22",
370};
371
372static const char * const pta_groups[] = {
373 "gpio22", "gpio23", "gpio24", "gpio54", "gpio55", "gpio56", "gpio61",
374 "gpio62", "gpio63",
375};
376
377static const char * const wci21_groups[] = {
378 "gpio23", "gpio24",
379};
380
381static const char * const cxc0_groups[] = {
382 "gpio23", "gpio24",
383};
384
385static const char * const pcie0_wake_groups[] = {
386 "gpio24",
387};
388
389static const char * const qdss_cti_trig_out_b0_groups[] = {
390 "gpio24",
391};
392
393static const char * const pcie1_clk_groups[] = {
394 "gpio25",
395};
396
397static const char * const qdss_cti_trig_in_b0_groups[] = {
398 "gpio25",
399};
400
401static const char * const atest_char0_groups[] = {
402 "gpio26",
403};
404
405static const char * const qdss_cti_trig_out_b1_groups[] = {
406 "gpio26",
407};
408
409static const char * const pcie1_wake_groups[] = {
410 "gpio27",
411};
412
413static const char * const atest_char1_groups[] = {
414 "gpio27",
415};
416
417static const char * const qdss_cti_trig_in_b1_groups[] = {
418 "gpio27",
419};
420
421static const char * const pcie2_clk_groups[] = {
422 "gpio28",
423};
424
425static const char * const atest_char2_groups[] = {
426 "gpio28",
427};
428
429static const char * const atest_char3_groups[] = {
430 "gpio29",
431};
432
433static const char * const pcie2_wake_groups[] = {
434 "gpio30",
435};
436
437static const char * const pwm_groups[] = {
438 "gpio30", "gpio31", "gpio32", "gpio33", "gpio44", "gpio45", "gpio46",
439 "gpio47", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55",
440 "gpio56", "gpio57", "gpio58", "gpio59", "gpio60",
441};
442
443static const char * const atest_char_groups[] = {
444 "gpio30",
445};
446
447static const char * const pcie3_clk_groups[] = {
448 "gpio31",
449};
450
451static const char * const qdss_cti_trig_in_a1_groups[] = {
452 "gpio31",
453};
454
455static const char * const qdss_cti_trig_out_a1_groups[] = {
456 "gpio32",
457};
458
459static const char * const pcie3_wake_groups[] = {
460 "gpio33",
461};
462
463static const char * const qdss_cti_trig_in_a0_groups[] = {
464 "gpio33",
465};
466
467static const char * const blsp2_uart_groups[] = {
468 "gpio34", "gpio35",
469};
470
471static const char * const blsp2_i2c_groups[] = {
472 "gpio34", "gpio35",
473};
474
475static const char * const blsp2_spi_groups[] = {
476 "gpio34", "gpio35", "gpio36", "gpio37",
477};
478
479static const char * const blsp1_uart_groups[] = {
480 "gpio34", "gpio35", "gpio36", "gpio37",
481};
482
483static const char * const qdss_cti_trig_out_a0_groups[] = {
484 "gpio34",
485};
486
487static const char * const cri_trng2_groups[] = {
488 "gpio35",
489};
490
491static const char * const blsp1_i2c_groups[] = {
492 "gpio36", "gpio37",
493};
494
495static const char * const cri_trng3_groups[] = {
496 "gpio36",
497};
498
499static const char * const dwc_ddrphy_groups[] = {
500 "gpio37",
501};
502
503static const char * const mdc_groups[] = {
504 "gpio38",
505};
506
507static const char * const mdio_groups[] = {
508 "gpio39",
509};
510
511static const char * const audio_pri_groups[] = {
512 "gpio40", "gpio41", "gpio42", "gpio43", "gpio61", "gpio61",
513};
514
515static const char * const audio_pdm0_groups[] = {
516 "gpio40", "gpio41", "gpio42", "gpio43",
517};
518
519static const char * const qdss_traceclk_a_groups[] = {
520 "gpio43",
521};
522
523static const char * const audio_sec_groups[] = {
524 "gpio44", "gpio45", "gpio46", "gpio47", "gpio62", "gpio62",
525};
526
527static const char * const wsa_swrm_groups[] = {
528 "gpio44", "gpio45",
529};
530
531static const char * const qdss_tracectl_a_groups[] = {
532 "gpio44",
533};
534
535static const char * const qdss_tracedata_a_groups[] = {
536 "gpio45", "gpio46", "gpio47", "gpio48", "gpio49", "gpio50", "gpio51",
537 "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio57", "gpio58",
538 "gpio59", "gpio60",
539};
540
541static const char * const rx1_groups[] = {
542 "gpio46",
543};
544
545static const char * const mac_groups[] = {
546 "gpio46", "gpio47", "gpio57", "gpio58",
547};
548
549static const char * const blsp5_i2c_groups[] = {
550 "gpio48", "gpio49",
551};
552
553static const char * const blsp5_uart_groups[] = {
554 "gpio48", "gpio49",
555};
556
557static const char * const blsp4_uart_groups[] = {
558 "gpio50", "gpio51", "gpio52", "gpio53",
559};
560
561static const char * const blsp4_i2c_groups[] = {
562 "gpio50", "gpio51",
563};
564
565static const char * const blsp4_spi_groups[] = {
566 "gpio50", "gpio51", "gpio52", "gpio53",
567};
568
569static const char * const wci20_groups[] = {
570 "gpio57", "gpio58",
571};
572
573static const char * const cxc1_groups[] = {
574 "gpio57", "gpio58",
575};
576
577static const char * const rx0_groups[] = {
578 "gpio59",
579};
580
581static const char * const prng_rosc0_groups[] = {
582 "gpio60",
583};
584
585static const char * const gcc_plltest_groups[] = {
586 "gpio60", "gpio62",
587};
588
589static const char * const blsp1_spi_groups[] = {
590 "gpio61", "gpio62", "gpio63", "gpio64",
591};
592
593static const char * const audio_pdm1_groups[] = {
594 "gpio61", "gpio62", "gpio63", "gpio64",
595};
596
597static const char * const prng_rosc1_groups[] = {
598 "gpio61",
599};
600
601static const char * const gcc_tlmm_groups[] = {
602 "gpio61",
603};
604
605static const char * const prng_rosc2_groups[] = {
606 "gpio62",
607};
608
609static const char * const prng_rosc3_groups[] = {
610 "gpio63",
611};
612
613static const char * const tsens_max_groups[] = {
614 "gpio64",
615};
616
617static const struct pinfunction ipq9574_functions[] = {
618 MSM_PIN_FUNCTION(atest_char),
619 MSM_PIN_FUNCTION(atest_char0),
620 MSM_PIN_FUNCTION(atest_char1),
621 MSM_PIN_FUNCTION(atest_char2),
622 MSM_PIN_FUNCTION(atest_char3),
623 MSM_PIN_FUNCTION(audio_pdm0),
624 MSM_PIN_FUNCTION(audio_pdm1),
625 MSM_PIN_FUNCTION(audio_pri),
626 MSM_PIN_FUNCTION(audio_sec),
627 MSM_PIN_FUNCTION(blsp0_spi),
628 MSM_PIN_FUNCTION(blsp0_uart),
629 MSM_PIN_FUNCTION(blsp1_i2c),
630 MSM_PIN_FUNCTION(blsp1_spi),
631 MSM_PIN_FUNCTION(blsp1_uart),
632 MSM_PIN_FUNCTION(blsp2_i2c),
633 MSM_PIN_FUNCTION(blsp2_spi),
634 MSM_PIN_FUNCTION(blsp2_uart),
635 MSM_PIN_FUNCTION(blsp3_i2c),
636 MSM_PIN_FUNCTION(blsp3_spi),
637 MSM_PIN_FUNCTION(blsp3_uart),
638 MSM_PIN_FUNCTION(blsp4_i2c),
639 MSM_PIN_FUNCTION(blsp4_spi),
640 MSM_PIN_FUNCTION(blsp4_uart),
641 MSM_PIN_FUNCTION(blsp5_i2c),
642 MSM_PIN_FUNCTION(blsp5_uart),
643 MSM_PIN_FUNCTION(cri_trng0),
644 MSM_PIN_FUNCTION(cri_trng1),
645 MSM_PIN_FUNCTION(cri_trng2),
646 MSM_PIN_FUNCTION(cri_trng3),
647 MSM_PIN_FUNCTION(cxc0),
648 MSM_PIN_FUNCTION(cxc1),
649 MSM_PIN_FUNCTION(dbg_out),
650 MSM_PIN_FUNCTION(dwc_ddrphy),
651 MSM_PIN_FUNCTION(gcc_plltest),
652 MSM_PIN_FUNCTION(gcc_tlmm),
653 MSM_GPIO_PIN_FUNCTION(gpio),
654 MSM_PIN_FUNCTION(mac),
655 MSM_PIN_FUNCTION(mdc),
656 MSM_PIN_FUNCTION(mdio),
657 MSM_PIN_FUNCTION(pcie0_clk),
658 MSM_PIN_FUNCTION(pcie0_wake),
659 MSM_PIN_FUNCTION(pcie1_clk),
660 MSM_PIN_FUNCTION(pcie1_wake),
661 MSM_PIN_FUNCTION(pcie2_clk),
662 MSM_PIN_FUNCTION(pcie2_wake),
663 MSM_PIN_FUNCTION(pcie3_clk),
664 MSM_PIN_FUNCTION(pcie3_wake),
665 MSM_PIN_FUNCTION(prng_rosc0),
666 MSM_PIN_FUNCTION(prng_rosc1),
667 MSM_PIN_FUNCTION(prng_rosc2),
668 MSM_PIN_FUNCTION(prng_rosc3),
669 MSM_PIN_FUNCTION(pta),
670 MSM_PIN_FUNCTION(pwm),
671 MSM_PIN_FUNCTION(qdss_cti_trig_in_a0),
672 MSM_PIN_FUNCTION(qdss_cti_trig_in_a1),
673 MSM_PIN_FUNCTION(qdss_cti_trig_in_b0),
674 MSM_PIN_FUNCTION(qdss_cti_trig_in_b1),
675 MSM_PIN_FUNCTION(qdss_cti_trig_out_a0),
676 MSM_PIN_FUNCTION(qdss_cti_trig_out_a1),
677 MSM_PIN_FUNCTION(qdss_cti_trig_out_b0),
678 MSM_PIN_FUNCTION(qdss_cti_trig_out_b1),
679 MSM_PIN_FUNCTION(qdss_traceclk_a),
680 MSM_PIN_FUNCTION(qdss_traceclk_b),
681 MSM_PIN_FUNCTION(qdss_tracectl_a),
682 MSM_PIN_FUNCTION(qdss_tracectl_b),
683 MSM_PIN_FUNCTION(qdss_tracedata_a),
684 MSM_PIN_FUNCTION(qdss_tracedata_b),
685 MSM_PIN_FUNCTION(qspi_data),
686 MSM_PIN_FUNCTION(qspi_clk),
687 MSM_PIN_FUNCTION(qspi_cs),
688 MSM_PIN_FUNCTION(rx0),
689 MSM_PIN_FUNCTION(rx1),
690 MSM_PIN_FUNCTION(sdc_data),
691 MSM_PIN_FUNCTION(sdc_clk),
692 MSM_PIN_FUNCTION(sdc_cmd),
693 MSM_PIN_FUNCTION(sdc_rclk),
694 MSM_PIN_FUNCTION(tsens_max),
695 MSM_PIN_FUNCTION(wci20),
696 MSM_PIN_FUNCTION(wci21),
697 MSM_PIN_FUNCTION(wsa_swrm),
698};
699
700static const struct msm_pingroup ipq9574_groups[] = {
701 PINGROUP(0, sdc_data, qspi_data, qdss_traceclk_b, _, _, _, _, _, _),
702 PINGROUP(1, sdc_data, qspi_data, qdss_tracectl_b, _, _, _, _, _, _),
703 PINGROUP(2, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _),
704 PINGROUP(3, sdc_data, qspi_data, qdss_tracedata_b, _, _, _, _, _, _),
705 PINGROUP(4, sdc_cmd, qspi_cs, qdss_tracedata_b, _, _, _, _, _, _),
706 PINGROUP(5, sdc_clk, qspi_clk, qdss_tracedata_b, _, _, _, _, _, _),
707 PINGROUP(6, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _),
708 PINGROUP(7, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _),
709 PINGROUP(8, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _),
710 PINGROUP(9, sdc_data, qdss_tracedata_b, _, _, _, _, _, _, _),
711 PINGROUP(10, sdc_rclk, qdss_tracedata_b, _, _, _, _, _, _, _),
712 PINGROUP(11, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _),
713 PINGROUP(12, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _),
714 PINGROUP(13, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _),
715 PINGROUP(14, blsp0_spi, blsp0_uart, qdss_tracedata_b, _, _, _, _, _, _),
716 PINGROUP(15, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _),
717 PINGROUP(16, blsp3_spi, blsp3_i2c, blsp3_uart, qdss_tracedata_b, _, _, _, _, _),
718 PINGROUP(17, blsp3_spi, blsp3_uart, dbg_out, qdss_tracedata_b, _, _, _, _, _),
719 PINGROUP(18, blsp3_spi, blsp3_uart, _, _, _, _, _, _, _),
720 PINGROUP(19, blsp3_spi, _, _, _, _, _, _, _, _),
721 PINGROUP(20, blsp3_spi, _, cri_trng0, _, _, _, _, _, _),
722 PINGROUP(21, blsp3_spi, _, cri_trng1, _, _, _, _, _, _),
723 PINGROUP(22, pcie0_clk, _, pta, _, _, _, _, _, _),
724 PINGROUP(23, _, pta, wci21, cxc0, _, _, _, _, _),
725 PINGROUP(24, pcie0_wake, _, pta, wci21, cxc0, _, qdss_cti_trig_out_b0, _, _),
726 PINGROUP(25, pcie1_clk, _, _, qdss_cti_trig_in_b0, _, _, _, _, _),
727 PINGROUP(26, _, atest_char0, _, qdss_cti_trig_out_b1, _, _, _, _, _),
728 PINGROUP(27, pcie1_wake, _, atest_char1, qdss_cti_trig_in_b1, _, _, _, _, _),
729 PINGROUP(28, pcie2_clk, atest_char2, _, _, _, _, _, _, _),
730 PINGROUP(29, atest_char3, _, _, _, _, _, _, _, _),
731 PINGROUP(30, pcie2_wake, pwm, atest_char, _, _, _, _, _, _),
732 PINGROUP(31, pcie3_clk, pwm, _, qdss_cti_trig_in_a1, _, _, _, _, _),
733 PINGROUP(32, pwm, _, qdss_cti_trig_out_a1, _, _, _, _, _, _),
734 PINGROUP(33, pcie3_wake, pwm, _, qdss_cti_trig_in_a0, _, _, _, _, _),
735 PINGROUP(34, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng1, qdss_cti_trig_out_a0, _, _),
736 PINGROUP(35, blsp2_uart, blsp2_i2c, blsp2_spi, blsp1_uart, _, cri_trng2, _, _, _),
737 PINGROUP(36, blsp1_uart, blsp1_i2c, blsp2_spi, _, cri_trng3, _, _, _, _),
738 PINGROUP(37, blsp1_uart, blsp1_i2c, blsp2_spi, _, dwc_ddrphy, _, _, _, _),
739 PINGROUP(38, mdc, _, cri_trng0, _, _, _, _, _, _),
740 PINGROUP(39, mdio, _, _, _, _, _, _, _, _),
741 PINGROUP(40, audio_pri, audio_pdm0, _, _, _, _, _, _, _),
742 PINGROUP(41, audio_pri, audio_pdm0, _, _, _, _, _, _, _),
743 PINGROUP(42, audio_pri, audio_pdm0, _, _, _, _, _, _, _),
744 PINGROUP(43, audio_pri, audio_pdm0, _, qdss_traceclk_a, _, _, _, _, _),
745 PINGROUP(44, pwm, audio_sec, wsa_swrm, _, qdss_tracectl_a, _, _, _, _),
746 PINGROUP(45, pwm, audio_sec, wsa_swrm, _, qdss_tracedata_a, _, _, _, _),
747 PINGROUP(46, pwm, audio_sec, rx1, mac, _, qdss_tracedata_a, _, _, _),
748 PINGROUP(47, pwm, audio_sec, mac, _, qdss_tracedata_a, _, _, _, _),
749 PINGROUP(48, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _),
750 PINGROUP(49, blsp5_i2c, blsp5_uart, _, qdss_tracedata_a, _, _, _, _, _),
751 PINGROUP(50, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _),
752 PINGROUP(51, blsp4_uart, blsp4_i2c, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _),
753 PINGROUP(52, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _),
754 PINGROUP(53, blsp4_uart, blsp4_spi, pwm, qdss_tracedata_a, _, _, _, _, _),
755 PINGROUP(54, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _),
756 PINGROUP(55, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _),
757 PINGROUP(56, pta, pwm, qdss_tracedata_a, _, _, _, _, _, _),
758 PINGROUP(57, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _),
759 PINGROUP(58, wci20, cxc1, mac, pwm, qdss_tracedata_a, _, _, _, _),
760 PINGROUP(59, rx0, pwm, qdss_tracedata_a, _, _, _, _, _, _),
761 PINGROUP(60, pwm, prng_rosc0, qdss_tracedata_a, _, gcc_plltest, _, _, _, _),
762 PINGROUP(61, blsp1_spi, audio_pri, audio_pdm1, audio_pri, pta, prng_rosc1, gcc_tlmm, _, _),
763 PINGROUP(62, blsp1_spi, audio_sec, audio_pdm1, audio_sec, pta, prng_rosc2, gcc_plltest, _, _),
764 PINGROUP(63, blsp1_spi, audio_pdm1, pta, prng_rosc3, _, _, _, _, _),
765 PINGROUP(64, blsp1_spi, audio_pdm1, tsens_max, _, _, _, _, _, _),
766};
767
768/* Reserving GPIO59 for controlling the QFPROM LDO regulator */
769static const int ipq9574_reserved_gpios[] = {
770 59, -1
771};
772
773static const struct msm_pinctrl_soc_data ipq9574_pinctrl = {
774 .pins = ipq9574_pins,
775 .npins = ARRAY_SIZE(ipq9574_pins),
776 .functions = ipq9574_functions,
777 .nfunctions = ARRAY_SIZE(ipq9574_functions),
778 .groups = ipq9574_groups,
779 .ngroups = ARRAY_SIZE(ipq9574_groups),
780 .reserved_gpios = ipq9574_reserved_gpios,
781 .ngpios = 65,
782};
783
784static int ipq9574_pinctrl_probe(struct platform_device *pdev)
785{
786 return msm_pinctrl_probe(pdev, &ipq9574_pinctrl);
787}
788
789static const struct of_device_id ipq9574_pinctrl_of_match[] = {
790 { .compatible = "qcom,ipq9574-tlmm", },
791 { }
792};
793MODULE_DEVICE_TABLE(of, ipq9574_pinctrl_of_match);
794
795static struct platform_driver ipq9574_pinctrl_driver = {
796 .driver = {
797 .name = "ipq9574-tlmm",
798 .of_match_table = ipq9574_pinctrl_of_match,
799 },
800 .probe = ipq9574_pinctrl_probe,
801};
802
803static int __init ipq9574_pinctrl_init(void)
804{
805 return platform_driver_register(&ipq9574_pinctrl_driver);
806}
807arch_initcall(ipq9574_pinctrl_init);
808
809static void __exit ipq9574_pinctrl_exit(void)
810{
811 platform_driver_unregister(&ipq9574_pinctrl_driver);
812}
813module_exit(ipq9574_pinctrl_exit);
814
815MODULE_DESCRIPTION("QTI IPQ9574 TLMM driver");
816MODULE_LICENSE("GPL");