Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1# SPDX-License-Identifier: GPL-2.0
2#
3# PCI configuration
4#
5
6# select this to offer the PCI prompt
7config HAVE_PCI
8 bool
9
10# select this to unconditionally force on PCI support
11config FORCE_PCI
12 bool
13 select HAVE_PCI
14 select PCI
15
16# select this to provide a generic PCI iomap,
17# without PCI itself having to be defined
18config GENERIC_PCI_IOMAP
19 bool
20
21menuconfig PCI
22 bool "PCI support"
23 depends on HAVE_PCI
24 depends on MMU
25 help
26 This option enables support for the PCI local bus, including
27 support for PCI-X and the foundations for PCI Express support.
28 Say 'Y' here unless you know what you are doing.
29
30if PCI
31
32config PCI_DOMAINS
33 bool
34 depends on PCI
35
36config PCI_DOMAINS_GENERIC
37 bool
38 select PCI_DOMAINS
39
40config PCI_SYSCALL
41 bool
42
43source "drivers/pci/pcie/Kconfig"
44
45config PCI_MSI
46 bool "Message Signaled Interrupts (MSI and MSI-X)"
47 select GENERIC_MSI_IRQ
48 help
49 This allows device drivers to enable MSI (Message Signaled
50 Interrupts). Message Signaled Interrupts enable a device to
51 generate an interrupt using an inbound Memory Write on its
52 PCI bus instead of asserting a device IRQ pin.
53
54 Use of PCI MSI interrupts can be disabled at kernel boot time
55 by using the 'pci=nomsi' option. This disables MSI for the
56 entire system.
57
58 If you don't know what to do here, say Y.
59
60config PCI_MSI_ARCH_FALLBACKS
61 bool
62
63config PCI_QUIRKS
64 default y
65 bool "Enable PCI quirk workarounds" if EXPERT
66 help
67 This enables workarounds for various PCI chipset bugs/quirks.
68 Disable this only if your target machine is unaffected by PCI
69 quirks.
70
71config PCI_DEBUG
72 bool "PCI Debugging"
73 depends on DEBUG_KERNEL
74 help
75 Say Y here if you want the PCI core to produce a bunch of debug
76 messages to the system log. Select this if you are having a
77 problem with PCI support and want to see more of what is going on.
78
79 When in doubt, say N.
80
81config PCI_REALLOC_ENABLE_AUTO
82 bool "Enable PCI resource re-allocation detection"
83 depends on PCI_IOV
84 help
85 Say Y here if you want the PCI core to detect if PCI resource
86 re-allocation needs to be enabled. You can always use pci=realloc=on
87 or pci=realloc=off to override it. It will automatically
88 re-allocate PCI resources if SR-IOV BARs have not been allocated by
89 the BIOS.
90
91 When in doubt, say N.
92
93config PCI_STUB
94 tristate "PCI Stub driver"
95 help
96 Say Y or M here if you want be able to reserve a PCI device
97 when it is going to be assigned to a guest operating system.
98
99 When in doubt, say N.
100
101config PCI_PF_STUB
102 tristate "PCI PF Stub driver"
103 depends on PCI_IOV
104 help
105 Say Y or M here if you want to enable support for devices that
106 require SR-IOV support, while at the same time the PF (Physical
107 Function) itself is not providing any actual services on the
108 host itself such as storage or networking.
109
110 When in doubt, say N.
111
112config XEN_PCIDEV_FRONTEND
113 tristate "Xen PCI Frontend"
114 depends on XEN_PV
115 select PCI_XEN
116 select XEN_XENBUS_FRONTEND
117 default y
118 help
119 The PCI device frontend driver allows the kernel to import arbitrary
120 PCI devices from a PCI backend to support PCI driver domains.
121
122config PCI_ATS
123 bool
124
125config PCI_IDE
126 bool
127
128config PCI_TSM
129 bool "PCI TSM: Device security protocol support"
130 select PCI_IDE
131 select PCI_DOE
132 select TSM
133 help
134 The TEE (Trusted Execution Environment) Device Interface
135 Security Protocol (TDISP) defines a "TSM" as a platform agent
136 that manages device authentication, link encryption, link
137 integrity protection, and assignment of PCI device functions
138 (virtual or physical) to confidential computing VMs that can
139 access (DMA) guest private memory.
140
141 Enable a platform TSM driver to use this capability.
142
143config PCI_DOE
144 bool "Enable PCI Data Object Exchange (DOE) support"
145 help
146 Say Y here if you want be able to communicate with PCIe DOE
147 mailboxes.
148
149config PCI_ECAM
150 bool
151
152config PCI_LOCKLESS_CONFIG
153 bool
154
155config PCI_BRIDGE_EMUL
156 bool
157
158config PCI_IOV
159 bool "PCI IOV support"
160 select PCI_ATS
161 help
162 I/O Virtualization is a PCI feature supported by some devices
163 which allows them to create virtual devices which share their
164 physical resources.
165
166 If unsure, say N.
167
168config PCI_NPEM
169 bool "Native PCIe Enclosure Management"
170 depends on LEDS_CLASS=y
171 help
172 Support for Native PCIe Enclosure Management. It allows managing LED
173 indications in storage enclosures. Enclosure must support following
174 indications: OK, Locate, Fail, Rebuild, other indications are
175 optional.
176
177config PCI_PRI
178 bool "PCI PRI support"
179 select PCI_ATS
180 help
181 PRI is the PCI Page Request Interface. It allows PCI devices that are
182 behind an IOMMU to recover from page faults.
183
184 If unsure, say N.
185
186config PCI_PASID
187 bool "PCI PASID support"
188 select PCI_ATS
189 help
190 Process Address Space Identifiers (PASIDs) can be used by PCI devices
191 to access more than one IO address space at the same time. To make
192 use of this feature an IOMMU is required which also supports PASIDs.
193 Select this option if you have such an IOMMU and want to compile the
194 driver for it into your kernel.
195
196 If unsure, say N.
197
198config PCIE_TPH
199 bool "TLP Processing Hints"
200 help
201 This option adds support for PCIe TLP Processing Hints (TPH).
202 TPH allows endpoint devices to provide optimization hints, such as
203 desired caching behavior, for requests that target memory space.
204 These hints, called Steering Tags, can empower the system hardware
205 to optimize the utilization of platform resources.
206
207config PCI_P2PDMA
208 bool "PCI peer-to-peer transfer support"
209 depends on ZONE_DEVICE
210 #
211 # The need for the scatterlist DMA bus address flag means PCI P2PDMA
212 # requires 64bit
213 #
214 depends on 64BIT
215 select GENERIC_ALLOCATOR
216 select NEED_SG_DMA_FLAGS
217 help
218 Enables drivers to do PCI peer-to-peer transactions to and from
219 BARs that are exposed in other devices that are the part of
220 the hierarchy where peer-to-peer DMA is guaranteed by the PCI
221 specification to work (ie. anything below a single PCI bridge).
222
223 Many PCIe root complexes do not support P2P transactions and
224 it's hard to tell which support it at all, so at this time,
225 P2P DMA transactions must be between devices behind the same root
226 port.
227
228 Enabling this option will reduce the entropy of x86 KASLR memory
229 regions. For example - on a 46 bit system, the entropy goes down
230 from 16 bits to 15 bits. The actual reduction in entropy depends
231 on the physical address bits, on processor features, kernel config
232 (5 level page table) and physical memory present on the system.
233
234 If unsure, say N.
235
236config PCI_LABEL
237 def_bool y if (DMI || ACPI)
238 select NLS
239
240config PCI_HYPERV
241 tristate "Hyper-V PCI Frontend"
242 depends on ((X86 && X86_64) || ARM64) && HYPERV_VMBUS && PCI_MSI && SYSFS
243 select PCI_HYPERV_INTERFACE
244 select IRQ_MSI_LIB
245 help
246 The PCI device frontend driver allows the kernel to import arbitrary
247 PCI devices from a PCI backend to support PCI driver domains.
248
249config PCI_DYNAMIC_OF_NODES
250 bool "Create Device tree nodes for PCI devices"
251 depends on OF_IRQ
252 select OF_DYNAMIC
253 help
254 This option enables support for generating device tree nodes for some
255 PCI devices. Thus, the driver of this kind can load and overlay
256 flattened device tree for its downstream devices.
257
258 Once this option is selected, the device tree nodes will be generated
259 for all PCI bridges.
260
261choice
262 prompt "PCI Express hierarchy optimization setting"
263 default PCIE_BUS_DEFAULT
264 depends on PCI && EXPERT
265 help
266 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
267 device parameters that affect performance and the ability to
268 support hotplug and peer-to-peer DMA.
269
270 The following choices set the MPS and MRRS optimization strategy
271 at compile-time. The choices are the same as those offered for
272 the kernel command-line parameter 'pci', i.e.,
273 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
274 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
275
276 This is a compile-time setting and can be overridden by the above
277 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
278
279config PCIE_BUS_TUNE_OFF
280 bool "Tune Off"
281 depends on PCI
282 help
283 Use the BIOS defaults; don't touch MPS at all. This is the same
284 as booting with 'pci=pcie_bus_tune_off'.
285
286config PCIE_BUS_DEFAULT
287 bool "Default"
288 depends on PCI
289 help
290 Default choice; ensure that the MPS matches upstream bridge.
291
292config PCIE_BUS_SAFE
293 bool "Safe"
294 depends on PCI
295 help
296 Use largest MPS that boot-time devices support. If you have a
297 closed system with no possibility of adding new devices, this
298 will use the largest MPS that's supported by all devices. This
299 is the same as booting with 'pci=pcie_bus_safe'.
300
301config PCIE_BUS_PERFORMANCE
302 bool "Performance"
303 depends on PCI
304 help
305 Use MPS and MRRS for best performance. Ensure that a given
306 device's MPS is no larger than its parent MPS, which allows us to
307 keep all switches/bridges to the max MPS supported by their
308 parent. This is the same as booting with 'pci=pcie_bus_perf'.
309
310config PCIE_BUS_PEER2PEER
311 bool "Peer2peer"
312 depends on PCI
313 help
314 Set MPS = 128 for all devices. MPS configuration effected by the
315 other options could cause the MPS on one root port to be
316 different than that of the MPS on another, which may cause
317 hot-added devices or peer-to-peer DMA to fail. Set MPS to the
318 smallest possible value (128B) system-wide to avoid these issues.
319 This is the same as booting with 'pci=pcie_bus_peer2peer'.
320
321endchoice
322
323config VGA_ARB
324 bool "VGA Arbitration" if EXPERT
325 default y
326 depends on (PCI && !S390)
327 select SCREEN_INFO if X86
328 help
329 Some "legacy" VGA devices implemented on PCI typically have the same
330 hard-decoded addresses as they did on ISA. When multiple PCI devices
331 are accessed at same time they need some kind of coordination. Please
332 see Documentation/gpu/vgaarbiter.rst for more details. Select this to
333 enable VGA arbiter.
334
335config VGA_ARB_MAX_GPUS
336 int "Maximum number of GPUs"
337 default 16
338 depends on VGA_ARB
339 help
340 Reserves space in the kernel to maintain resource locking for
341 multiple GPUS. The overhead for each GPU is very small.
342
343source "drivers/pci/hotplug/Kconfig"
344source "drivers/pci/controller/Kconfig"
345source "drivers/pci/endpoint/Kconfig"
346source "drivers/pci/switch/Kconfig"
347source "drivers/pci/pwrctrl/Kconfig"
348
349endif