Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/* Realtek USB SD/MMC Card Interface driver
3 *
4 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 *
6 * Author:
7 * Roger Tseng <rogerable@realtek.com>
8 */
9
10#include <linux/module.h>
11#include <linux/slab.h>
12#include <linux/delay.h>
13#include <linux/platform_device.h>
14#include <linux/usb.h>
15#include <linux/mmc/host.h>
16#include <linux/mmc/mmc.h>
17#include <linux/mmc/sd.h>
18#include <linux/mmc/card.h>
19#include <linux/scatterlist.h>
20#include <linux/pm.h>
21#include <linux/pm_runtime.h>
22
23#include <linux/rtsx_usb.h>
24#include <linux/unaligned.h>
25
26#if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
27 defined(CONFIG_MMC_REALTEK_USB_MODULE))
28#include <linux/leds.h>
29#include <linux/workqueue.h>
30#define RTSX_USB_USE_LEDS_CLASS
31#endif
32
33struct rtsx_usb_sdmmc {
34 struct platform_device *pdev;
35 struct rtsx_ucr *ucr;
36 struct mmc_host *mmc;
37 struct mmc_request *mrq;
38
39 struct mutex host_mutex;
40
41 u8 ssc_depth;
42 unsigned int clock;
43 bool vpclk;
44 bool double_clk;
45 bool host_removal;
46 bool card_exist;
47 bool initial_mode;
48 bool ddr_mode;
49
50 unsigned char power_mode;
51 u16 ocp_stat;
52#ifdef RTSX_USB_USE_LEDS_CLASS
53 struct led_classdev led;
54 char led_name[32];
55 struct work_struct led_work;
56#endif
57};
58
59static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
60{
61 return &(host->pdev->dev);
62}
63
64static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
65{
66 struct rtsx_ucr *ucr = host->ucr;
67 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
68 SD_STOP | SD_CLR_ERR,
69 SD_STOP | SD_CLR_ERR);
70
71 rtsx_usb_clear_dma_err(ucr);
72 rtsx_usb_clear_fsm_err(ucr);
73}
74
75#ifdef DEBUG
76static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
77{
78 struct rtsx_ucr *ucr = host->ucr;
79 u8 val = 0;
80
81 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
82 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
83 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
84 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
85 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
86 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
87}
88#else
89#define sd_print_debug_regs(host)
90#endif /* DEBUG */
91
92static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
93 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
94{
95 struct rtsx_ucr *ucr = host->ucr;
96 int err;
97 u8 trans_mode;
98
99 if (!buf)
100 buf_len = 0;
101
102 rtsx_usb_init_cmd(ucr);
103 if (cmd != NULL) {
104 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
105 , cmd->opcode);
106 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
107 trans_mode = SD_TM_AUTO_TUNING;
108 else
109 trans_mode = SD_TM_NORMAL_READ;
110
111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
112 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
114 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
116 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
118 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
120 SD_CMD4, 0xFF, (u8)cmd->arg);
121 } else {
122 trans_mode = SD_TM_AUTO_READ_3;
123 }
124
125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
127 0xFF, (u8)(byte_cnt >> 8));
128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
130
131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
132 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
133 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
134 if (trans_mode != SD_TM_AUTO_TUNING)
135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
136 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
137
138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
139 0xFF, trans_mode | SD_TRANSFER_START);
140 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
141 SD_TRANSFER_END, SD_TRANSFER_END);
142
143 if (cmd != NULL) {
144 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
145 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
146 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
147 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
148 }
149
150 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
151 if (err) {
152 dev_dbg(sdmmc_dev(host),
153 "rtsx_usb_send_cmd failed (err = %d)\n", err);
154 return err;
155 }
156
157 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
158 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
159 sd_print_debug_regs(host);
160
161 if (!err) {
162 dev_dbg(sdmmc_dev(host),
163 "Transfer failed (SD_TRANSFER = %02x)\n",
164 ucr->rsp_buf[0]);
165 err = -EIO;
166 } else {
167 dev_dbg(sdmmc_dev(host),
168 "rtsx_usb_get_rsp failed (err = %d)\n", err);
169 }
170
171 return err;
172 }
173
174 if (cmd != NULL) {
175 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
176 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
177 cmd->resp[0]);
178 }
179
180 if (buf && buf_len) {
181 /* 2-byte aligned part */
182 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
183 if (err) {
184 dev_dbg(sdmmc_dev(host),
185 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
186 return err;
187 }
188
189 /* unaligned byte */
190 if (byte_cnt % 2)
191 return rtsx_usb_read_register(ucr,
192 PPBUF_BASE2 + byte_cnt,
193 buf + byte_cnt - 1);
194 }
195
196 return 0;
197}
198
199static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
200 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
201{
202 struct rtsx_ucr *ucr = host->ucr;
203 int err;
204 u8 trans_mode;
205
206 if (!buf)
207 buf_len = 0;
208
209 if (buf && buf_len) {
210 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
211 if (err) {
212 dev_dbg(sdmmc_dev(host),
213 "rtsx_usb_write_ppbuf failed (err = %d)\n",
214 err);
215 return err;
216 }
217 }
218
219 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
220 rtsx_usb_init_cmd(ucr);
221
222 if (cmd != NULL) {
223 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
224 cmd->opcode);
225 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
226 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
227 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
228 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
229 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
230 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
231 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
232 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
233 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
234 SD_CMD4, 0xFF, (u8)cmd->arg);
235 }
236
237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
239 0xFF, (u8)(byte_cnt >> 8));
240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
242
243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
244 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
245 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
246 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
247 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
248
249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
250 trans_mode | SD_TRANSFER_START);
251 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
252 SD_TRANSFER_END, SD_TRANSFER_END);
253
254 if (cmd != NULL) {
255 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
256 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
257 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
258 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
259 }
260
261 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
262 if (err) {
263 dev_dbg(sdmmc_dev(host),
264 "rtsx_usb_send_cmd failed (err = %d)\n", err);
265 return err;
266 }
267
268 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
269 if (err) {
270 sd_print_debug_regs(host);
271 dev_dbg(sdmmc_dev(host),
272 "rtsx_usb_get_rsp failed (err = %d)\n", err);
273 return err;
274 }
275
276 if (cmd != NULL) {
277 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
278 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
279 cmd->resp[0]);
280 }
281
282 return 0;
283}
284
285static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
286 struct mmc_command *cmd)
287{
288 struct rtsx_ucr *ucr = host->ucr;
289 u8 cmd_idx = (u8)cmd->opcode;
290 u32 arg = cmd->arg;
291 int err = 0;
292 int timeout = 100;
293 int i;
294 u8 *ptr;
295 int stat_idx = 0;
296 int len = 2;
297 u8 rsp_type;
298
299 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
300 __func__, cmd_idx, arg);
301
302 /* Response type:
303 * R0
304 * R1, R5, R6, R7
305 * R1b
306 * R2
307 * R3, R4
308 */
309 switch (mmc_resp_type(cmd)) {
310 case MMC_RSP_NONE:
311 rsp_type = SD_RSP_TYPE_R0;
312 break;
313 case MMC_RSP_R1:
314 rsp_type = SD_RSP_TYPE_R1;
315 break;
316 case MMC_RSP_R1B:
317 rsp_type = SD_RSP_TYPE_R1b;
318 break;
319 case MMC_RSP_R2:
320 rsp_type = SD_RSP_TYPE_R2;
321 break;
322 case MMC_RSP_R3:
323 rsp_type = SD_RSP_TYPE_R3;
324 break;
325 default:
326 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
327 err = -EINVAL;
328 goto out;
329 }
330
331 if (rsp_type == SD_RSP_TYPE_R1b)
332 timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
333
334 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
335 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
336 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
337 SD_CLK_TOGGLE_EN);
338 if (err)
339 goto out;
340 }
341
342 rtsx_usb_init_cmd(ucr);
343
344 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
345 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
346 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
347 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
348 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
349
350 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
351 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
352 0x01, PINGPONG_BUFFER);
353 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
354 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
355 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
356 SD_TRANSFER_END | SD_STAT_IDLE,
357 SD_TRANSFER_END | SD_STAT_IDLE);
358
359 if (rsp_type == SD_RSP_TYPE_R2) {
360 /* Read data from ping-pong buffer */
361 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
362 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
363 stat_idx = 16;
364 } else if (rsp_type != SD_RSP_TYPE_R0) {
365 /* Read data from SD_CMDx registers */
366 for (i = SD_CMD0; i <= SD_CMD4; i++)
367 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
368 stat_idx = 5;
369 }
370 len += stat_idx;
371
372 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
373
374 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
375 if (err) {
376 dev_dbg(sdmmc_dev(host),
377 "rtsx_usb_send_cmd error (err = %d)\n", err);
378 goto out;
379 }
380
381 err = rtsx_usb_get_rsp(ucr, len, timeout);
382 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
383 sd_print_debug_regs(host);
384 sd_clear_error(host);
385
386 if (!err) {
387 dev_dbg(sdmmc_dev(host),
388 "Transfer failed (SD_TRANSFER = %02x)\n",
389 ucr->rsp_buf[0]);
390 err = -EIO;
391 } else {
392 dev_dbg(sdmmc_dev(host),
393 "rtsx_usb_get_rsp failed (err = %d)\n", err);
394 }
395
396 goto out;
397 }
398
399 if (rsp_type == SD_RSP_TYPE_R0) {
400 err = 0;
401 goto out;
402 }
403
404 /* Skip result of CHECK_REG_CMD */
405 ptr = ucr->rsp_buf + 1;
406
407 /* Check (Start,Transmission) bit of Response */
408 if ((ptr[0] & 0xC0) != 0) {
409 err = -EILSEQ;
410 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
411 goto out;
412 }
413
414 /* Check CRC7 */
415 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
416 if (ptr[stat_idx] & SD_CRC7_ERR) {
417 err = -EILSEQ;
418 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
419 goto out;
420 }
421 }
422
423 if (rsp_type == SD_RSP_TYPE_R2) {
424 /*
425 * The controller offloads the last byte {CRC-7, end bit 1'b1}
426 * of response type R2. Assign dummy CRC, 0, and end bit to the
427 * byte(ptr[16], goes into the LSB of resp[3] later).
428 */
429 ptr[16] = 1;
430
431 for (i = 0; i < 4; i++) {
432 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
433 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
434 i, cmd->resp[i]);
435 }
436 } else {
437 cmd->resp[0] = get_unaligned_be32(ptr + 1);
438 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
439 cmd->resp[0]);
440 }
441
442out:
443 cmd->error = err;
444}
445
446static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
447{
448 struct rtsx_ucr *ucr = host->ucr;
449 struct mmc_data *data = mrq->data;
450 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
451 u8 cfg2, trans_mode;
452 int err;
453 u8 flag;
454 size_t data_len = data->blksz * data->blocks;
455 unsigned int pipe;
456
457 if (read) {
458 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
459 __func__, data_len);
460 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
461 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
462 trans_mode = SD_TM_AUTO_READ_3;
463 } else {
464 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
465 __func__, data_len);
466 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
467 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
468 trans_mode = SD_TM_AUTO_WRITE_3;
469 }
470
471 rtsx_usb_init_cmd(ucr);
472
473 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
474 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
475 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
476 0xFF, (u8)data->blocks);
477 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
478 0xFF, (u8)(data->blocks >> 8));
479
480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
481 0x01, RING_BUFFER);
482
483 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
484 0xFF, (u8)(data_len >> 24));
485 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
486 0xFF, (u8)(data_len >> 16));
487 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
488 0xFF, (u8)(data_len >> 8));
489 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
490 0xFF, (u8)data_len);
491 if (read) {
492 flag = MODE_CDIR;
493 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
494 0x03 | DMA_PACK_SIZE_MASK,
495 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
496 } else {
497 flag = MODE_CDOR;
498 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
499 0x03 | DMA_PACK_SIZE_MASK,
500 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
501 }
502
503 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
504 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
505 trans_mode | SD_TRANSFER_START);
506 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
507 SD_TRANSFER_END, SD_TRANSFER_END);
508
509 err = rtsx_usb_send_cmd(ucr, flag, 100);
510 if (err)
511 return err;
512
513 if (read)
514 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
515 else
516 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
517
518 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
519 data->sg_len, NULL, 10000);
520 if (err) {
521 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
522 , err);
523 sd_clear_error(host);
524 return err;
525 }
526
527 return rtsx_usb_get_rsp(ucr, 1, 2000);
528}
529
530static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
531{
532 rtsx_usb_write_register(host->ucr, SD_CFG1,
533 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
534}
535
536static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
537{
538 rtsx_usb_write_register(host->ucr, SD_CFG1,
539 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
540}
541
542static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
543 struct mmc_request *mrq)
544{
545 struct mmc_command *cmd = mrq->cmd;
546 struct mmc_data *data = mrq->data;
547 u8 *buf;
548
549 buf = kzalloc(data->blksz, GFP_NOIO);
550 if (!buf) {
551 cmd->error = -ENOMEM;
552 return;
553 }
554
555 if (data->flags & MMC_DATA_READ) {
556 if (host->initial_mode)
557 sd_disable_initial_mode(host);
558
559 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
560 data->blksz, 200);
561
562 if (host->initial_mode)
563 sd_enable_initial_mode(host);
564
565 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
566 } else {
567 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
568
569 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
570 data->blksz, 200);
571 }
572
573 kfree(buf);
574}
575
576static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
577{
578 struct rtsx_ucr *ucr = host->ucr;
579
580 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
581 __func__, tx ? "TX" : "RX", sample_point);
582
583 rtsx_usb_init_cmd(ucr);
584
585 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
586
587 if (tx)
588 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
589 0x0F, sample_point);
590 else
591 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
592 0x0F, sample_point);
593
594 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
595 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
596 PHASE_NOT_RESET, PHASE_NOT_RESET);
597 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
599
600 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
601}
602
603static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
604{
605 idx &= MAX_PHASE;
606 return phase_map & (1 << idx);
607}
608
609static int get_phase_len(u32 phase_map, unsigned int idx)
610{
611 int i;
612
613 for (i = 0; i < MAX_PHASE + 1; i++) {
614 if (get_phase_point(phase_map, idx + i) == 0)
615 return i;
616 }
617 return MAX_PHASE + 1;
618}
619
620static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
621{
622 int start = 0, len = 0;
623 int start_final = 0, len_final = 0;
624 u8 final_phase = 0xFF;
625
626 if (phase_map == 0) {
627 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
628 return final_phase;
629 }
630
631 while (start < MAX_PHASE + 1) {
632 len = get_phase_len(phase_map, start);
633 if (len_final < len) {
634 start_final = start;
635 len_final = len;
636 }
637 start += len ? len : 1;
638 }
639
640 final_phase = (start_final + len_final / 2) & MAX_PHASE;
641 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
642 phase_map, len_final, final_phase);
643
644 return final_phase;
645}
646
647static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
648{
649 int i;
650 u8 val = 0;
651
652 for (i = 0; i < 100; i++) {
653 rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
654 if (val & SD_DATA_IDLE)
655 return;
656
657 usleep_range(100, 1000);
658 }
659}
660
661static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
662 u8 opcode, u8 sample_point)
663{
664 int err;
665 struct mmc_command cmd = {};
666
667 err = sd_change_phase(host, sample_point, 0);
668 if (err)
669 return err;
670
671 cmd.opcode = MMC_SEND_TUNING_BLOCK;
672 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
673 if (err) {
674 /* Wait till SD DATA IDLE */
675 sd_wait_data_idle(host);
676 sd_clear_error(host);
677 return err;
678 }
679
680 return 0;
681}
682
683static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
684 u8 opcode, u16 *phase_map)
685{
686 int err, i;
687 u16 raw_phase_map = 0;
688
689 for (i = MAX_PHASE; i >= 0; i--) {
690 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
691 if (!err)
692 raw_phase_map |= 1 << i;
693 }
694
695 if (phase_map)
696 *phase_map = raw_phase_map;
697}
698
699static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
700{
701 int err, i;
702 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
703 u8 final_phase;
704
705 /* setting fixed default TX phase */
706 err = sd_change_phase(host, 0x01, 1);
707 if (err) {
708 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
709 return err;
710 }
711
712 /* tuning RX phase */
713 for (i = 0; i < RX_TUNING_CNT; i++) {
714 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
715
716 if (raw_phase_map[i] == 0)
717 break;
718 }
719
720 phase_map = 0xFFFF;
721 for (i = 0; i < RX_TUNING_CNT; i++) {
722 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
723 i, raw_phase_map[i]);
724 phase_map &= raw_phase_map[i];
725 }
726 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
727
728 if (phase_map) {
729 final_phase = sd_search_final_phase(host, phase_map);
730 if (final_phase == 0xFF)
731 return -EINVAL;
732
733 err = sd_change_phase(host, final_phase, 0);
734 if (err)
735 return err;
736 } else {
737 return -EINVAL;
738 }
739
740 return 0;
741}
742
743static int sdmmc_get_ro(struct mmc_host *mmc)
744{
745 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
746 struct rtsx_ucr *ucr = host->ucr;
747 int err;
748 u16 val;
749
750 if (host->host_removal)
751 return -ENOMEDIUM;
752
753 mutex_lock(&ucr->dev_mutex);
754
755 /* Check SD card detect */
756 err = rtsx_usb_get_card_status(ucr, &val);
757
758 mutex_unlock(&ucr->dev_mutex);
759
760
761 /* Treat failed detection as non-ro */
762 if (err)
763 return 0;
764
765 if (val & SD_WP)
766 return 1;
767
768 return 0;
769}
770
771static int sdmmc_get_cd(struct mmc_host *mmc)
772{
773 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
774 struct rtsx_ucr *ucr = host->ucr;
775 int err;
776 u16 val;
777
778 if (host->host_removal)
779 return -ENOMEDIUM;
780
781 mutex_lock(&ucr->dev_mutex);
782
783 /* Check SD card detect */
784 err = rtsx_usb_get_card_status(ucr, &val);
785
786 mutex_unlock(&ucr->dev_mutex);
787
788 /* Treat failed detection as non-exist */
789 if (err)
790 goto no_card;
791
792 /* get OCP status */
793 host->ocp_stat = (val >> 4) & 0x03;
794
795 if (val & SD_CD) {
796 host->card_exist = true;
797 return 1;
798 }
799
800no_card:
801 /* clear OCP status */
802 if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
803 rtsx_usb_write_register(ucr, OCPCTL, MS_OCP_CLEAR, MS_OCP_CLEAR);
804 host->ocp_stat = 0;
805 }
806 host->card_exist = false;
807 return 0;
808}
809
810static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
811{
812 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
813 struct rtsx_ucr *ucr = host->ucr;
814 struct mmc_command *cmd = mrq->cmd;
815 struct mmc_data *data = mrq->data;
816 unsigned int data_size = 0;
817
818 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
819
820 if (host->host_removal) {
821 cmd->error = -ENOMEDIUM;
822 goto finish;
823 }
824
825 if ((!host->card_exist)) {
826 cmd->error = -ENOMEDIUM;
827 goto finish_detect_card;
828 }
829 /* check OCP stat */
830 if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
831 cmd->error = -ENOMEDIUM;
832 goto finish_detect_card;
833 }
834 mutex_lock(&ucr->dev_mutex);
835
836 mutex_lock(&host->host_mutex);
837 host->mrq = mrq;
838 mutex_unlock(&host->host_mutex);
839
840 if (mrq->data)
841 data_size = data->blocks * data->blksz;
842
843 if (!data_size) {
844 sd_send_cmd_get_rsp(host, cmd);
845 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
846 mmc_op_multi(cmd->opcode)) {
847 sd_send_cmd_get_rsp(host, cmd);
848
849 if (!cmd->error) {
850 sd_rw_multi(host, mrq);
851
852 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
853 sd_send_cmd_get_rsp(host, mrq->stop);
854 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
855 FIFO_FLUSH, FIFO_FLUSH);
856 }
857 }
858 } else {
859 sd_normal_rw(host, mrq);
860 }
861
862 if (mrq->data) {
863 if (cmd->error || data->error)
864 data->bytes_xfered = 0;
865 else
866 data->bytes_xfered = data->blocks * data->blksz;
867 }
868
869 mutex_unlock(&ucr->dev_mutex);
870
871finish_detect_card:
872 if (cmd->error) {
873 /*
874 * detect card when fail to update card existence state and
875 * speed up card removal when retry
876 */
877 sdmmc_get_cd(mmc);
878 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
879 }
880
881finish:
882 mutex_lock(&host->host_mutex);
883 host->mrq = NULL;
884 mutex_unlock(&host->host_mutex);
885
886 mmc_request_done(mmc, mrq);
887}
888
889static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
890 unsigned char bus_width)
891{
892 int err = 0;
893 static const u8 width[] = {
894 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
895 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
896 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
897 };
898
899 if (bus_width <= MMC_BUS_WIDTH_8)
900 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
901 0x03, width[bus_width]);
902
903 return err;
904}
905
906static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
907{
908 rtsx_usb_init_cmd(ucr);
909
910 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
911 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
912 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
913 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
914 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
915 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
916
917 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
918}
919
920static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
921{
922 rtsx_usb_init_cmd(ucr);
923
924 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
925 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
926 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
927 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
928 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
930
931 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
932}
933
934static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
935{
936 rtsx_usb_init_cmd(ucr);
937
938 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
939 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
940 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
941 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
942 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
944
945 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
946}
947
948static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
949{
950 rtsx_usb_init_cmd(ucr);
951
952 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
953 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
954 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
955 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
956 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
957 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
958
959 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
960}
961
962static int sd_power_on(struct rtsx_usb_sdmmc *host)
963{
964 struct rtsx_ucr *ucr = host->ucr;
965 int err;
966
967 if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
968 dev_dbg(sdmmc_dev(host), "over current\n");
969 return -EIO;
970 }
971 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
972 rtsx_usb_init_cmd(ucr);
973 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
974 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
975 CARD_SHARE_MASK, CARD_SHARE_SD);
976 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
977 SD_CLK_EN, SD_CLK_EN);
978 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
979 if (err)
980 return err;
981
982 if (CHECK_PKG(ucr, LQFP48))
983 err = sd_pull_ctl_enable_lqfp48(ucr);
984 else
985 err = sd_pull_ctl_enable_qfn24(ucr);
986 if (err)
987 return err;
988
989 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
990 POWER_MASK, PARTIAL_POWER_ON);
991 if (err)
992 return err;
993
994 usleep_range(800, 1000);
995
996 rtsx_usb_init_cmd(ucr);
997 /* WA OCP issue: after OCP, there were problems with reopen card power */
998 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK, POWER_ON);
999 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, FPDCTL, SSC_POWER_MASK, SSC_POWER_DOWN);
1000 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1001 if (err)
1002 return err;
1003 msleep(20);
1004 rtsx_usb_write_register(ucr, FPDCTL, SSC_POWER_MASK, SSC_POWER_ON);
1005 usleep_range(180, 200);
1006 rtsx_usb_init_cmd(ucr);
1007 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1008 LDO3318_PWR_MASK, LDO_ON);
1009 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
1010 SD_OUTPUT_EN, SD_OUTPUT_EN);
1011
1012 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1013}
1014
1015static int sd_power_off(struct rtsx_usb_sdmmc *host)
1016{
1017 struct rtsx_ucr *ucr = host->ucr;
1018 int err;
1019
1020 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1021 rtsx_usb_init_cmd(ucr);
1022
1023 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1024 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1025 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1026 POWER_MASK, POWER_OFF);
1027 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1028 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1029
1030 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1031 if (err)
1032 return err;
1033
1034 if (CHECK_PKG(ucr, LQFP48))
1035 return sd_pull_ctl_disable_lqfp48(ucr);
1036 return sd_pull_ctl_disable_qfn24(ucr);
1037}
1038
1039static void sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1040 unsigned char power_mode)
1041{
1042 int err;
1043 struct rtsx_ucr *ucr = host->ucr;
1044
1045 if (power_mode == host->power_mode)
1046 return;
1047
1048 switch (power_mode) {
1049 case MMC_POWER_OFF:
1050 err = sd_power_off(host);
1051 if (err)
1052 dev_dbg(sdmmc_dev(host), "power-off (err = %d)\n", err);
1053 pm_runtime_put_noidle(sdmmc_dev(host));
1054 break;
1055
1056 case MMC_POWER_UP:
1057 pm_runtime_get_noresume(sdmmc_dev(host));
1058 err = sd_power_on(host);
1059 if (err)
1060 dev_dbg(sdmmc_dev(host), "power-on (err = %d)\n", err);
1061 /* issue the clock signals to card at least 74 clocks */
1062 rtsx_usb_write_register(ucr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN);
1063 break;
1064
1065 case MMC_POWER_ON:
1066 /* stop to send the clock signals */
1067 rtsx_usb_write_register(ucr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0x00);
1068 break;
1069
1070 case MMC_POWER_UNDEFINED:
1071 break;
1072
1073 default:
1074 break;
1075 }
1076
1077 host->power_mode = power_mode;
1078}
1079
1080static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1081 unsigned char timing, bool *ddr_mode)
1082{
1083 struct rtsx_ucr *ucr = host->ucr;
1084
1085 *ddr_mode = false;
1086
1087 rtsx_usb_init_cmd(ucr);
1088
1089 switch (timing) {
1090 case MMC_TIMING_UHS_SDR104:
1091 case MMC_TIMING_UHS_SDR50:
1092 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1093 0x0C | SD_ASYNC_FIFO_RST,
1094 SD_30_MODE | SD_ASYNC_FIFO_RST);
1095 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1096 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1097 break;
1098
1099 case MMC_TIMING_UHS_DDR50:
1100 *ddr_mode = true;
1101
1102 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1103 0x0C | SD_ASYNC_FIFO_RST,
1104 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1105 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1106 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1107 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1108 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1109 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1110 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1111 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1112 break;
1113
1114 case MMC_TIMING_MMC_HS:
1115 case MMC_TIMING_SD_HS:
1116 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1117 0x0C, SD_20_MODE);
1118 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1119 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1120 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1121 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1122 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1123 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1124 break;
1125
1126 default:
1127 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1128 SD_CFG1, 0x0C, SD_20_MODE);
1129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1130 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1132 SD_PUSH_POINT_CTL, 0xFF, 0);
1133 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1134 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1135 break;
1136 }
1137
1138 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
1139}
1140
1141static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1142{
1143 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1144 struct rtsx_ucr *ucr = host->ucr;
1145
1146 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1147 mutex_lock(&ucr->dev_mutex);
1148
1149 sd_set_power_mode(host, ios->power_mode);
1150 sd_set_bus_width(host, ios->bus_width);
1151 sd_set_timing(host, ios->timing, &host->ddr_mode);
1152
1153 host->vpclk = false;
1154 host->double_clk = true;
1155
1156 switch (ios->timing) {
1157 case MMC_TIMING_UHS_SDR104:
1158 case MMC_TIMING_UHS_SDR50:
1159 host->ssc_depth = SSC_DEPTH_2M;
1160 host->vpclk = true;
1161 host->double_clk = false;
1162 break;
1163 case MMC_TIMING_UHS_DDR50:
1164 case MMC_TIMING_UHS_SDR25:
1165 host->ssc_depth = SSC_DEPTH_1M;
1166 break;
1167 default:
1168 host->ssc_depth = SSC_DEPTH_512K;
1169 break;
1170 }
1171
1172 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1173 host->clock = ios->clock;
1174
1175 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1176 host->initial_mode, host->double_clk, host->vpclk);
1177
1178 mutex_unlock(&ucr->dev_mutex);
1179 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1180}
1181
1182static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1183{
1184 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1185 struct rtsx_ucr *ucr = host->ucr;
1186 int err = 0;
1187
1188 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1189 __func__, ios->signal_voltage);
1190
1191 if (host->host_removal)
1192 return -ENOMEDIUM;
1193
1194 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1195 return -EPERM;
1196
1197 mutex_lock(&ucr->dev_mutex);
1198
1199 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1200 if (err) {
1201 mutex_unlock(&ucr->dev_mutex);
1202 return err;
1203 }
1204
1205 /* Let mmc core do the busy checking, simply stop the forced-toggle
1206 * clock(while issuing CMD11) and switch voltage.
1207 */
1208 rtsx_usb_init_cmd(ucr);
1209
1210 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1211 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1212 SD_IO_USING_1V8, SD_IO_USING_3V3);
1213 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1214 TUNE_SD18_MASK, TUNE_SD18_3V3);
1215 } else {
1216 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1217 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1218 SD_CLK_FORCE_STOP);
1219 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1220 SD_IO_USING_1V8, SD_IO_USING_1V8);
1221 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1222 TUNE_SD18_MASK, TUNE_SD18_1V8);
1223 }
1224
1225 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1226 mutex_unlock(&ucr->dev_mutex);
1227
1228 return err;
1229}
1230
1231static int sdmmc_card_busy(struct mmc_host *mmc)
1232{
1233 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1234 struct rtsx_ucr *ucr = host->ucr;
1235 int err;
1236 u8 stat;
1237 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1238 | SD_DAT0_STATUS;
1239
1240 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1241
1242 mutex_lock(&ucr->dev_mutex);
1243
1244 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1245 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1246 SD_CLK_TOGGLE_EN);
1247 if (err)
1248 goto out;
1249
1250 mdelay(1);
1251
1252 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1253 if (err)
1254 goto out;
1255
1256 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1257 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1258out:
1259 mutex_unlock(&ucr->dev_mutex);
1260
1261 if (err)
1262 return err;
1263
1264 /* check if any pin between dat[0:3] is low */
1265 if ((stat & mask) != mask)
1266 return 1;
1267 else
1268 return 0;
1269}
1270
1271static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1272{
1273 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1274 struct rtsx_ucr *ucr = host->ucr;
1275 int err = 0;
1276
1277 if (host->host_removal)
1278 return -ENOMEDIUM;
1279
1280 mutex_lock(&ucr->dev_mutex);
1281
1282 if (!host->ddr_mode)
1283 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1284
1285 mutex_unlock(&ucr->dev_mutex);
1286
1287 return err;
1288}
1289
1290static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1291 .request = sdmmc_request,
1292 .set_ios = sdmmc_set_ios,
1293 .get_ro = sdmmc_get_ro,
1294 .get_cd = sdmmc_get_cd,
1295 .start_signal_voltage_switch = sdmmc_switch_voltage,
1296 .card_busy = sdmmc_card_busy,
1297 .execute_tuning = sdmmc_execute_tuning,
1298};
1299
1300#ifdef RTSX_USB_USE_LEDS_CLASS
1301static void rtsx_usb_led_control(struct led_classdev *led,
1302 enum led_brightness brightness)
1303{
1304 struct rtsx_usb_sdmmc *host = container_of(led,
1305 struct rtsx_usb_sdmmc, led);
1306
1307 if (host->host_removal)
1308 return;
1309
1310 host->led.brightness = brightness;
1311 schedule_work(&host->led_work);
1312}
1313
1314static void rtsx_usb_update_led(struct work_struct *work)
1315{
1316 struct rtsx_usb_sdmmc *host =
1317 container_of(work, struct rtsx_usb_sdmmc, led_work);
1318 struct rtsx_ucr *ucr = host->ucr;
1319
1320 pm_runtime_get_noresume(sdmmc_dev(host));
1321 mutex_lock(&ucr->dev_mutex);
1322
1323 if (host->power_mode == MMC_POWER_OFF)
1324 goto out;
1325
1326 if (host->led.brightness == LED_OFF)
1327 rtsx_usb_turn_off_led(ucr);
1328 else
1329 rtsx_usb_turn_on_led(ucr);
1330
1331out:
1332 mutex_unlock(&ucr->dev_mutex);
1333 pm_runtime_put_sync_suspend(sdmmc_dev(host));
1334}
1335#endif
1336
1337static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1338{
1339 struct mmc_host *mmc = host->mmc;
1340
1341 mmc->f_min = 250000;
1342 mmc->f_max = 208000000;
1343 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1344 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1345 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1346 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1347 MMC_CAP_SYNC_RUNTIME_PM;
1348 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
1349 MMC_CAP2_NO_SDIO;
1350
1351 mmc->max_current_330 = 400;
1352 mmc->max_current_180 = 800;
1353 mmc->ops = &rtsx_usb_sdmmc_ops;
1354 mmc->max_segs = 256;
1355 mmc->max_seg_size = 65536;
1356 mmc->max_blk_size = 512;
1357 mmc->max_blk_count = 65535;
1358 mmc->max_req_size = 524288;
1359
1360 host->power_mode = MMC_POWER_OFF;
1361 host->ocp_stat = 0;
1362}
1363
1364static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1365{
1366 struct mmc_host *mmc;
1367 struct rtsx_usb_sdmmc *host;
1368 struct rtsx_ucr *ucr;
1369#ifdef RTSX_USB_USE_LEDS_CLASS
1370 int err;
1371#endif
1372 int ret;
1373
1374 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1375 if (!ucr)
1376 return -ENXIO;
1377
1378 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1379
1380 mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host));
1381 if (!mmc)
1382 return -ENOMEM;
1383
1384 host = mmc_priv(mmc);
1385 host->ucr = ucr;
1386 host->mmc = mmc;
1387 host->pdev = pdev;
1388 platform_set_drvdata(pdev, host);
1389
1390 mutex_init(&host->host_mutex);
1391 rtsx_usb_init_host(host);
1392 pm_runtime_enable(&pdev->dev);
1393
1394#ifdef RTSX_USB_USE_LEDS_CLASS
1395 snprintf(host->led_name, sizeof(host->led_name),
1396 "%s::", mmc_hostname(mmc));
1397 host->led.name = host->led_name;
1398 host->led.brightness = LED_OFF;
1399 host->led.default_trigger = mmc_hostname(mmc);
1400 host->led.brightness_set = rtsx_usb_led_control;
1401
1402 err = led_classdev_register(mmc_dev(mmc), &host->led);
1403 if (err)
1404 dev_err(&(pdev->dev),
1405 "Failed to register LED device: %d\n", err);
1406 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1407
1408#endif
1409 ret = mmc_add_host(mmc);
1410 if (ret) {
1411#ifdef RTSX_USB_USE_LEDS_CLASS
1412 led_classdev_unregister(&host->led);
1413#endif
1414 pm_runtime_disable(&pdev->dev);
1415 return ret;
1416 }
1417
1418 return 0;
1419}
1420
1421static void rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1422{
1423 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1424 struct mmc_host *mmc;
1425
1426 if (!host)
1427 return;
1428
1429 mmc = host->mmc;
1430 host->host_removal = true;
1431
1432 mutex_lock(&host->host_mutex);
1433 if (host->mrq) {
1434 dev_dbg(&(pdev->dev),
1435 "%s: Controller removed during transfer\n",
1436 mmc_hostname(mmc));
1437 host->mrq->cmd->error = -ENOMEDIUM;
1438 if (host->mrq->stop)
1439 host->mrq->stop->error = -ENOMEDIUM;
1440 mmc_request_done(mmc, host->mrq);
1441 }
1442 mutex_unlock(&host->host_mutex);
1443
1444 mmc_remove_host(mmc);
1445
1446#ifdef RTSX_USB_USE_LEDS_CLASS
1447 cancel_work_sync(&host->led_work);
1448 led_classdev_unregister(&host->led);
1449#endif
1450
1451 pm_runtime_disable(&pdev->dev);
1452 platform_set_drvdata(pdev, NULL);
1453
1454 dev_dbg(&(pdev->dev),
1455 ": Realtek USB SD/MMC module has been removed\n");
1456}
1457
1458static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
1459{
1460 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1461
1462 host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
1463 return 0;
1464}
1465
1466static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
1467{
1468 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1469
1470 host->mmc->caps |= MMC_CAP_NEEDS_POLL;
1471 if (sdmmc_get_cd(host->mmc) == 1)
1472 mmc_detect_change(host->mmc, 0);
1473 return 0;
1474}
1475
1476static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
1477 RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend, rtsx_usb_sdmmc_runtime_resume, NULL)
1478};
1479
1480static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1481 {
1482 .name = "rtsx_usb_sdmmc",
1483 }, {
1484 /* sentinel */
1485 }
1486};
1487MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1488
1489static struct platform_driver rtsx_usb_sdmmc_driver = {
1490 .probe = rtsx_usb_sdmmc_drv_probe,
1491 .remove = rtsx_usb_sdmmc_drv_remove,
1492 .id_table = rtsx_usb_sdmmc_ids,
1493 .driver = {
1494 .name = "rtsx_usb_sdmmc",
1495 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1496 .pm = pm_ptr(&rtsx_usb_sdmmc_dev_pm_ops),
1497 },
1498};
1499module_platform_driver(rtsx_usb_sdmmc_driver);
1500
1501MODULE_LICENSE("GPL v2");
1502MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1503MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");