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Linux kernel mirror (for testing)
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linux
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
4 *
5 * Copyright 2021 Connected Cars A/S
6 *
7 * Datasheet:
8 * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
9 * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
10 *
11 * Errata:
12 * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
13 */
14
15#include <linux/bits.h>
16#include <linux/bitfield.h>
17#include <linux/i2c.h>
18#include <linux/irq.h>
19#include <linux/module.h>
20#include <linux/mod_devicetable.h>
21#include <linux/pm_runtime.h>
22#include <linux/property.h>
23#include <linux/regulator/consumer.h>
24#include <linux/regmap.h>
25#include <linux/types.h>
26#include <linux/units.h>
27
28#include <linux/iio/buffer.h>
29#include <linux/iio/events.h>
30#include <linux/iio/iio.h>
31#include <linux/iio/kfifo_buf.h>
32#include <linux/iio/sysfs.h>
33
34#include "fxls8962af.h"
35
36#define FXLS8962AF_INT_STATUS 0x00
37#define FXLS8962AF_INT_STATUS_SRC_BOOT BIT(0)
38#define FXLS8962AF_INT_STATUS_SRC_SDCD_OT BIT(4)
39#define FXLS8962AF_INT_STATUS_SRC_BUF BIT(5)
40#define FXLS8962AF_INT_STATUS_SRC_DRDY BIT(7)
41#define FXLS8962AF_TEMP_OUT 0x01
42#define FXLS8962AF_VECM_LSB 0x02
43#define FXLS8962AF_OUT_X_LSB 0x04
44#define FXLS8962AF_OUT_Y_LSB 0x06
45#define FXLS8962AF_OUT_Z_LSB 0x08
46#define FXLS8962AF_BUF_STATUS 0x0b
47#define FXLS8962AF_BUF_STATUS_BUF_CNT GENMASK(5, 0)
48#define FXLS8962AF_BUF_STATUS_BUF_OVF BIT(6)
49#define FXLS8962AF_BUF_STATUS_BUF_WMRK BIT(7)
50#define FXLS8962AF_BUF_X_LSB 0x0c
51#define FXLS8962AF_BUF_Y_LSB 0x0e
52#define FXLS8962AF_BUF_Z_LSB 0x10
53
54#define FXLS8962AF_PROD_REV 0x12
55#define FXLS8962AF_WHO_AM_I 0x13
56
57#define FXLS8962AF_SYS_MODE 0x14
58#define FXLS8962AF_SENS_CONFIG1 0x15
59#define FXLS8962AF_SENS_CONFIG1_ACTIVE BIT(0)
60#define FXLS8962AF_SENS_CONFIG1_RST BIT(7)
61#define FXLS8962AF_SC1_FSR_MASK GENMASK(2, 1)
62#define FXLS8962AF_SC1_FSR_PREP(x) FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
63#define FXLS8962AF_SC1_FSR_GET(x) FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
64
65#define FXLS8962AF_SENS_CONFIG2 0x16
66#define FXLS8962AF_SENS_CONFIG3 0x17
67#define FXLS8962AF_SC3_WAKE_ODR_MASK GENMASK(7, 4)
68#define FXLS8962AF_SC3_WAKE_ODR_PREP(x) FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
69#define FXLS8962AF_SC3_WAKE_ODR_GET(x) FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
70#define FXLS8962AF_SENS_CONFIG4 0x18
71#define FXLS8962AF_SC4_INT_PP_OD_MASK BIT(1)
72#define FXLS8962AF_SC4_INT_PP_OD_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
73#define FXLS8962AF_SC4_INT_POL_MASK BIT(0)
74#define FXLS8962AF_SC4_INT_POL_PREP(x) FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
75#define FXLS8962AF_SENS_CONFIG5 0x19
76
77#define FXLS8962AF_WAKE_IDLE_LSB 0x1b
78#define FXLS8962AF_SLEEP_IDLE_LSB 0x1c
79#define FXLS8962AF_ASLP_COUNT_LSB 0x1e
80
81#define FXLS8962AF_INT_EN 0x20
82#define FXLS8962AF_INT_EN_SDCD_OT_EN BIT(5)
83#define FXLS8962AF_INT_EN_BUF_EN BIT(6)
84#define FXLS8962AF_INT_PIN_SEL 0x21
85#define FXLS8962AF_INT_PIN_SEL_MASK GENMASK(7, 0)
86#define FXLS8962AF_INT_PIN_SEL_INT1 0x00
87#define FXLS8962AF_INT_PIN_SEL_INT2 GENMASK(7, 0)
88
89#define FXLS8962AF_OFF_X 0x22
90#define FXLS8962AF_OFF_Y 0x23
91#define FXLS8962AF_OFF_Z 0x24
92
93#define FXLS8962AF_BUF_CONFIG1 0x26
94#define FXLS8962AF_BC1_BUF_MODE_MASK GENMASK(6, 5)
95#define FXLS8962AF_BC1_BUF_MODE_PREP(x) FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
96#define FXLS8962AF_BUF_CONFIG2 0x27
97#define FXLS8962AF_BUF_CONFIG2_BUF_WMRK GENMASK(5, 0)
98
99#define FXLS8962AF_ORIENT_STATUS 0x28
100#define FXLS8962AF_ORIENT_CONFIG 0x29
101#define FXLS8962AF_ORIENT_DBCOUNT 0x2a
102#define FXLS8962AF_ORIENT_BF_ZCOMP 0x2b
103#define FXLS8962AF_ORIENT_THS_REG 0x2c
104
105#define FXLS8962AF_SDCD_INT_SRC1 0x2d
106#define FXLS8962AF_SDCD_INT_SRC1_X_OT BIT(5)
107#define FXLS8962AF_SDCD_INT_SRC1_X_POL BIT(4)
108#define FXLS8962AF_SDCD_INT_SRC1_Y_OT BIT(3)
109#define FXLS8962AF_SDCD_INT_SRC1_Y_POL BIT(2)
110#define FXLS8962AF_SDCD_INT_SRC1_Z_OT BIT(1)
111#define FXLS8962AF_SDCD_INT_SRC1_Z_POL BIT(0)
112#define FXLS8962AF_SDCD_INT_SRC2 0x2e
113#define FXLS8962AF_SDCD_CONFIG1 0x2f
114#define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN BIT(3)
115#define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN BIT(4)
116#define FXLS8962AF_SDCD_CONFIG1_X_OT_EN BIT(5)
117#define FXLS8962AF_SDCD_CONFIG1_OT_ELE BIT(7)
118#define FXLS8962AF_SDCD_CONFIG2 0x30
119#define FXLS8962AF_SDCD_CONFIG2_SDCD_EN BIT(7)
120#define FXLS8962AF_SC2_REF_UPDM_AC GENMASK(6, 5)
121#define FXLS8962AF_SDCD_OT_DBCNT 0x31
122#define FXLS8962AF_SDCD_WT_DBCNT 0x32
123#define FXLS8962AF_SDCD_LTHS_LSB 0x33
124#define FXLS8962AF_SDCD_UTHS_LSB 0x35
125
126#define FXLS8962AF_SELF_TEST_CONFIG1 0x37
127#define FXLS8962AF_SELF_TEST_CONFIG2 0x38
128
129#define FXLS8962AF_MAX_REG 0x38
130
131#define FXLS8962AF_DEVICE_ID 0x62
132#define FXLS8964AF_DEVICE_ID 0x84
133#define FXLS8974CF_DEVICE_ID 0x86
134#define FXLS8967AF_DEVICE_ID 0x87
135
136/* Raw temp channel offset */
137#define FXLS8962AF_TEMP_CENTER_VAL 25
138
139#define FXLS8962AF_AUTO_SUSPEND_DELAY_MS 2000
140
141#define FXLS8962AF_FIFO_LENGTH 32
142#define FXLS8962AF_SCALE_TABLE_LEN 4
143#define FXLS8962AF_SAMP_FREQ_TABLE_LEN 13
144
145static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
146 {0, IIO_G_TO_M_S_2(980000)},
147 {0, IIO_G_TO_M_S_2(1950000)},
148 {0, IIO_G_TO_M_S_2(3910000)},
149 {0, IIO_G_TO_M_S_2(7810000)},
150};
151
152static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
153 {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
154 {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
155 {1, 563000}, {0, 781000},
156};
157
158struct fxls8962af_chip_info {
159 const char *name;
160 const struct iio_chan_spec *channels;
161 int num_channels;
162 u8 chip_id;
163};
164
165struct fxls8962af_data {
166 struct regmap *regmap;
167 const struct fxls8962af_chip_info *chip_info;
168 struct {
169 __le16 channels[3];
170 aligned_s64 ts;
171 } scan;
172 int64_t timestamp, old_timestamp; /* Only used in hw fifo mode. */
173 struct iio_mount_matrix orientation;
174 int irq;
175 u8 watermark;
176 u8 enable_event;
177 u16 lower_thres;
178 u16 upper_thres;
179};
180
181const struct regmap_config fxls8962af_i2c_regmap_conf = {
182 .reg_bits = 8,
183 .val_bits = 8,
184 .max_register = FXLS8962AF_MAX_REG,
185};
186EXPORT_SYMBOL_NS_GPL(fxls8962af_i2c_regmap_conf, "IIO_FXLS8962AF");
187
188const struct regmap_config fxls8962af_spi_regmap_conf = {
189 .reg_bits = 8,
190 .pad_bits = 8,
191 .val_bits = 8,
192 .max_register = FXLS8962AF_MAX_REG,
193};
194EXPORT_SYMBOL_NS_GPL(fxls8962af_spi_regmap_conf, "IIO_FXLS8962AF");
195
196enum {
197 fxls8962af_idx_x,
198 fxls8962af_idx_y,
199 fxls8962af_idx_z,
200 fxls8962af_idx_ts,
201};
202
203enum fxls8962af_int_pin {
204 FXLS8962AF_PIN_INT1,
205 FXLS8962AF_PIN_INT2,
206};
207
208static int fxls8962af_power_on(struct fxls8962af_data *data)
209{
210 struct device *dev = regmap_get_device(data->regmap);
211 int ret;
212
213 ret = pm_runtime_resume_and_get(dev);
214 if (ret)
215 dev_err(dev, "failed to power on\n");
216
217 return ret;
218}
219
220static int fxls8962af_power_off(struct fxls8962af_data *data)
221{
222 struct device *dev = regmap_get_device(data->regmap);
223 int ret;
224
225 ret = pm_runtime_put_autosuspend(dev);
226 if (ret)
227 dev_err(dev, "failed to power off\n");
228
229 return ret;
230}
231
232static int fxls8962af_standby(struct fxls8962af_data *data)
233{
234 return regmap_clear_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
235 FXLS8962AF_SENS_CONFIG1_ACTIVE);
236}
237
238static int fxls8962af_active(struct fxls8962af_data *data)
239{
240 return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
241 FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
242}
243
244static int fxls8962af_is_active(struct fxls8962af_data *data)
245{
246 unsigned int reg;
247 int ret;
248
249 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
250 if (ret)
251 return ret;
252
253 return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
254}
255
256static int fxls8962af_get_out(struct fxls8962af_data *data,
257 struct iio_chan_spec const *chan, int *val)
258{
259 struct device *dev = regmap_get_device(data->regmap);
260 __le16 raw_val;
261 int is_active;
262 int ret;
263
264 is_active = fxls8962af_is_active(data);
265 if (!is_active) {
266 ret = fxls8962af_power_on(data);
267 if (ret)
268 return ret;
269 }
270
271 ret = regmap_bulk_read(data->regmap, chan->address,
272 &raw_val, sizeof(data->lower_thres));
273
274 if (!is_active)
275 fxls8962af_power_off(data);
276
277 if (ret) {
278 dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
279 return ret;
280 }
281
282 *val = sign_extend32(le16_to_cpu(raw_val),
283 chan->scan_type.realbits - 1);
284
285 return IIO_VAL_INT;
286}
287
288static int fxls8962af_read_avail(struct iio_dev *indio_dev,
289 struct iio_chan_spec const *chan,
290 const int **vals, int *type, int *length,
291 long mask)
292{
293 switch (mask) {
294 case IIO_CHAN_INFO_SCALE:
295 *type = IIO_VAL_INT_PLUS_NANO;
296 *vals = (int *)fxls8962af_scale_table;
297 *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
298 return IIO_AVAIL_LIST;
299 case IIO_CHAN_INFO_SAMP_FREQ:
300 *type = IIO_VAL_INT_PLUS_MICRO;
301 *vals = (int *)fxls8962af_samp_freq_table;
302 *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
303 return IIO_AVAIL_LIST;
304 default:
305 return -EINVAL;
306 }
307}
308
309static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
310 struct iio_chan_spec const *chan,
311 long mask)
312{
313 switch (mask) {
314 case IIO_CHAN_INFO_SCALE:
315 return IIO_VAL_INT_PLUS_NANO;
316 case IIO_CHAN_INFO_SAMP_FREQ:
317 return IIO_VAL_INT_PLUS_MICRO;
318 default:
319 return IIO_VAL_INT_PLUS_NANO;
320 }
321}
322
323static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
324 u8 mask, u8 val)
325{
326 int ret;
327 int is_active;
328
329 is_active = fxls8962af_is_active(data);
330 if (is_active) {
331 ret = fxls8962af_standby(data);
332 if (ret)
333 return ret;
334 }
335
336 ret = regmap_update_bits(data->regmap, reg, mask, val);
337 if (ret)
338 return ret;
339
340 if (is_active) {
341 ret = fxls8962af_active(data);
342 if (ret)
343 return ret;
344 }
345
346 return 0;
347}
348
349static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
350{
351 int i;
352
353 for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
354 if (scale == fxls8962af_scale_table[i][1])
355 break;
356
357 if (i == ARRAY_SIZE(fxls8962af_scale_table))
358 return -EINVAL;
359
360 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
361 FXLS8962AF_SC1_FSR_MASK,
362 FXLS8962AF_SC1_FSR_PREP(i));
363}
364
365static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
366 int *val)
367{
368 int ret;
369 unsigned int reg;
370 u8 range_idx;
371
372 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, ®);
373 if (ret)
374 return ret;
375
376 range_idx = FXLS8962AF_SC1_FSR_GET(reg);
377
378 *val = fxls8962af_scale_table[range_idx][1];
379
380 return IIO_VAL_INT_PLUS_NANO;
381}
382
383static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
384 u32 val2)
385{
386 int i;
387
388 for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
389 if (val == fxls8962af_samp_freq_table[i][0] &&
390 val2 == fxls8962af_samp_freq_table[i][1])
391 break;
392
393 if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
394 return -EINVAL;
395
396 return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
397 FXLS8962AF_SC3_WAKE_ODR_MASK,
398 FXLS8962AF_SC3_WAKE_ODR_PREP(i));
399}
400
401static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
402 int *val, int *val2)
403{
404 int ret;
405 unsigned int reg;
406 u8 range_idx;
407
408 ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, ®);
409 if (ret)
410 return ret;
411
412 range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
413
414 *val = fxls8962af_samp_freq_table[range_idx][0];
415 *val2 = fxls8962af_samp_freq_table[range_idx][1];
416
417 return IIO_VAL_INT_PLUS_MICRO;
418}
419
420static int fxls8962af_read_raw(struct iio_dev *indio_dev,
421 struct iio_chan_spec const *chan,
422 int *val, int *val2, long mask)
423{
424 struct fxls8962af_data *data = iio_priv(indio_dev);
425
426 switch (mask) {
427 case IIO_CHAN_INFO_RAW:
428 switch (chan->type) {
429 case IIO_TEMP:
430 case IIO_ACCEL:
431 return fxls8962af_get_out(data, chan, val);
432 default:
433 return -EINVAL;
434 }
435 case IIO_CHAN_INFO_OFFSET:
436 if (chan->type != IIO_TEMP)
437 return -EINVAL;
438
439 *val = FXLS8962AF_TEMP_CENTER_VAL;
440 return IIO_VAL_INT;
441 case IIO_CHAN_INFO_SCALE:
442 switch (chan->type) {
443 case IIO_TEMP:
444 *val = MILLIDEGREE_PER_DEGREE;
445 return IIO_VAL_INT;
446 case IIO_ACCEL:
447 *val = 0;
448 return fxls8962af_read_full_scale(data, val2);
449 default:
450 return -EINVAL;
451 }
452 case IIO_CHAN_INFO_SAMP_FREQ:
453 return fxls8962af_read_samp_freq(data, val, val2);
454 default:
455 return -EINVAL;
456 }
457}
458
459static int fxls8962af_write_raw(struct iio_dev *indio_dev,
460 struct iio_chan_spec const *chan,
461 int val, int val2, long mask)
462{
463 struct fxls8962af_data *data = iio_priv(indio_dev);
464 int ret;
465
466 switch (mask) {
467 case IIO_CHAN_INFO_SCALE:
468 if (val != 0)
469 return -EINVAL;
470
471 if (!iio_device_claim_direct(indio_dev))
472 return -EBUSY;
473
474 ret = fxls8962af_set_full_scale(data, val2);
475
476 iio_device_release_direct(indio_dev);
477 return ret;
478 case IIO_CHAN_INFO_SAMP_FREQ:
479 if (!iio_device_claim_direct(indio_dev))
480 return -EBUSY;
481
482 ret = fxls8962af_set_samp_freq(data, val, val2);
483
484 iio_device_release_direct(indio_dev);
485 return ret;
486 default:
487 return -EINVAL;
488 }
489}
490
491static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
492{
493 /* Enable wakeup interrupt */
494 int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
495 int value = state ? mask : 0;
496
497 return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
498}
499
500static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
501{
502 struct fxls8962af_data *data = iio_priv(indio_dev);
503
504 if (val > FXLS8962AF_FIFO_LENGTH)
505 val = FXLS8962AF_FIFO_LENGTH;
506
507 data->watermark = val;
508
509 return 0;
510}
511
512static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
513 const struct iio_chan_spec *chan,
514 enum iio_event_direction dir,
515 int val)
516{
517 switch (dir) {
518 case IIO_EV_DIR_FALLING:
519 data->lower_thres = val;
520 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
521 &data->lower_thres, sizeof(data->lower_thres));
522 case IIO_EV_DIR_RISING:
523 data->upper_thres = val;
524 return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
525 &data->upper_thres, sizeof(data->upper_thres));
526 default:
527 return -EINVAL;
528 }
529}
530
531static int fxls8962af_read_event(struct iio_dev *indio_dev,
532 const struct iio_chan_spec *chan,
533 enum iio_event_type type,
534 enum iio_event_direction dir,
535 enum iio_event_info info,
536 int *val, int *val2)
537{
538 struct fxls8962af_data *data = iio_priv(indio_dev);
539 int ret;
540
541 if (type != IIO_EV_TYPE_THRESH)
542 return -EINVAL;
543
544 switch (dir) {
545 case IIO_EV_DIR_FALLING:
546 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
547 &data->lower_thres, sizeof(data->lower_thres));
548 if (ret)
549 return ret;
550
551 *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
552 return IIO_VAL_INT;
553 case IIO_EV_DIR_RISING:
554 ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
555 &data->upper_thres, sizeof(data->upper_thres));
556 if (ret)
557 return ret;
558
559 *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
560 return IIO_VAL_INT;
561 default:
562 return -EINVAL;
563 }
564}
565
566static int fxls8962af_write_event(struct iio_dev *indio_dev,
567 const struct iio_chan_spec *chan,
568 enum iio_event_type type,
569 enum iio_event_direction dir,
570 enum iio_event_info info,
571 int val, int val2)
572{
573 struct fxls8962af_data *data = iio_priv(indio_dev);
574 int ret, val_masked;
575
576 if (type != IIO_EV_TYPE_THRESH)
577 return -EINVAL;
578
579 if (val < -2048 || val > 2047)
580 return -EINVAL;
581
582 if (data->enable_event)
583 return -EBUSY;
584
585 val_masked = val & GENMASK(11, 0);
586 if (fxls8962af_is_active(data)) {
587 ret = fxls8962af_standby(data);
588 if (ret)
589 return ret;
590
591 ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
592 if (ret)
593 return ret;
594
595 return fxls8962af_active(data);
596 } else {
597 return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
598 }
599}
600
601static int
602fxls8962af_read_event_config(struct iio_dev *indio_dev,
603 const struct iio_chan_spec *chan,
604 enum iio_event_type type,
605 enum iio_event_direction dir)
606{
607 struct fxls8962af_data *data = iio_priv(indio_dev);
608
609 if (type != IIO_EV_TYPE_THRESH)
610 return -EINVAL;
611
612 switch (chan->channel2) {
613 case IIO_MOD_X:
614 return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
615 case IIO_MOD_Y:
616 return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
617 case IIO_MOD_Z:
618 return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
619 default:
620 return -EINVAL;
621 }
622}
623
624static int
625fxls8962af_write_event_config(struct iio_dev *indio_dev,
626 const struct iio_chan_spec *chan,
627 enum iio_event_type type,
628 enum iio_event_direction dir, bool state)
629{
630 struct fxls8962af_data *data = iio_priv(indio_dev);
631 u8 enable_event, enable_bits;
632 int ret, value;
633
634 if (type != IIO_EV_TYPE_THRESH)
635 return -EINVAL;
636
637 switch (chan->channel2) {
638 case IIO_MOD_X:
639 enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
640 break;
641 case IIO_MOD_Y:
642 enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
643 break;
644 case IIO_MOD_Z:
645 enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
646 break;
647 default:
648 return -EINVAL;
649 }
650
651 if (state)
652 enable_event = data->enable_event | enable_bits;
653 else
654 enable_event = data->enable_event & ~enable_bits;
655
656 if (data->enable_event == enable_event)
657 return 0;
658
659 ret = fxls8962af_standby(data);
660 if (ret)
661 return ret;
662
663 /* Enable events */
664 value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
665 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
666 if (ret)
667 return ret;
668
669 /*
670 * Enable update of SDCD_REF_X/Y/Z values with the current decimated and
671 * trimmed X/Y/Z acceleration input data. This allows for acceleration
672 * slope detection with Data(n) to Data(n–1) always used as the input
673 * to the window comparator.
674 */
675 value = enable_event ?
676 FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
677 0x00;
678 ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
679 if (ret)
680 return ret;
681
682 ret = fxls8962af_event_setup(data, state);
683 if (ret)
684 return ret;
685
686 data->enable_event = enable_event;
687
688 if (data->enable_event) {
689 fxls8962af_active(data);
690 ret = fxls8962af_power_on(data);
691 } else {
692 if (!iio_device_claim_direct(indio_dev))
693 return -EBUSY;
694
695 /* Not in buffered mode so disable power */
696 ret = fxls8962af_power_off(data);
697
698 iio_device_release_direct(indio_dev);
699 }
700
701 return ret;
702}
703
704static const struct iio_event_spec fxls8962af_event[] = {
705 {
706 .type = IIO_EV_TYPE_THRESH,
707 .dir = IIO_EV_DIR_EITHER,
708 .mask_separate = BIT(IIO_EV_INFO_ENABLE),
709 },
710 {
711 .type = IIO_EV_TYPE_THRESH,
712 .dir = IIO_EV_DIR_FALLING,
713 .mask_separate = BIT(IIO_EV_INFO_VALUE),
714 },
715 {
716 .type = IIO_EV_TYPE_THRESH,
717 .dir = IIO_EV_DIR_RISING,
718 .mask_separate = BIT(IIO_EV_INFO_VALUE),
719 },
720};
721
722#define FXLS8962AF_CHANNEL(axis, reg, idx) { \
723 .type = IIO_ACCEL, \
724 .address = reg, \
725 .modified = 1, \
726 .channel2 = IIO_MOD_##axis, \
727 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
728 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
729 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
730 .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
731 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
732 .scan_index = idx, \
733 .scan_type = { \
734 .sign = 's', \
735 .realbits = 12, \
736 .storagebits = 16, \
737 .endianness = IIO_LE, \
738 }, \
739 .event_spec = fxls8962af_event, \
740 .num_event_specs = ARRAY_SIZE(fxls8962af_event), \
741}
742
743#define FXLS8962AF_TEMP_CHANNEL { \
744 .type = IIO_TEMP, \
745 .address = FXLS8962AF_TEMP_OUT, \
746 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
747 BIT(IIO_CHAN_INFO_SCALE) | \
748 BIT(IIO_CHAN_INFO_OFFSET),\
749 .scan_index = -1, \
750 .scan_type = { \
751 .sign = 's', \
752 .realbits = 8, \
753 .storagebits = 8, \
754 }, \
755}
756
757static const struct iio_chan_spec fxls8962af_channels[] = {
758 FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
759 FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
760 FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
761 IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
762 FXLS8962AF_TEMP_CHANNEL,
763};
764
765static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
766 [fxls8962af] = {
767 .chip_id = FXLS8962AF_DEVICE_ID,
768 .name = "fxls8962af",
769 .channels = fxls8962af_channels,
770 .num_channels = ARRAY_SIZE(fxls8962af_channels),
771 },
772 [fxls8964af] = {
773 .chip_id = FXLS8964AF_DEVICE_ID,
774 .name = "fxls8964af",
775 .channels = fxls8962af_channels,
776 .num_channels = ARRAY_SIZE(fxls8962af_channels),
777 },
778 [fxls8967af] = {
779 .chip_id = FXLS8967AF_DEVICE_ID,
780 .name = "fxls8967af",
781 .channels = fxls8962af_channels,
782 .num_channels = ARRAY_SIZE(fxls8962af_channels),
783 },
784 [fxls8974cf] = {
785 .chip_id = FXLS8974CF_DEVICE_ID,
786 .name = "fxls8974cf",
787 .channels = fxls8962af_channels,
788 .num_channels = ARRAY_SIZE(fxls8962af_channels),
789 },
790};
791
792static const struct iio_info fxls8962af_info = {
793 .read_raw = &fxls8962af_read_raw,
794 .write_raw = &fxls8962af_write_raw,
795 .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
796 .read_event_value = fxls8962af_read_event,
797 .write_event_value = fxls8962af_write_event,
798 .read_event_config = fxls8962af_read_event_config,
799 .write_event_config = fxls8962af_write_event_config,
800 .read_avail = fxls8962af_read_avail,
801 .hwfifo_set_watermark = fxls8962af_set_watermark,
802};
803
804static int fxls8962af_reset(struct fxls8962af_data *data)
805{
806 struct device *dev = regmap_get_device(data->regmap);
807 unsigned int reg;
808 int ret;
809
810 ret = regmap_set_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
811 FXLS8962AF_SENS_CONFIG1_RST);
812 if (ret)
813 return ret;
814
815 /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
816 ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
817 (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
818 1000, 18000);
819 if (ret == -ETIMEDOUT)
820 dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
821
822 return ret;
823}
824
825static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
826{
827 int ret;
828
829 /* Enable watermark at max fifo size */
830 ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
831 FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
832 data->watermark);
833 if (ret)
834 return ret;
835
836 return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
837 FXLS8962AF_BC1_BUF_MODE_MASK,
838 FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
839}
840
841static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
842{
843 return fxls8962af_power_on(iio_priv(indio_dev));
844}
845
846static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
847{
848 struct fxls8962af_data *data = iio_priv(indio_dev);
849 int ret;
850
851 fxls8962af_standby(data);
852
853 /* Enable buffer interrupt */
854 ret = regmap_set_bits(data->regmap, FXLS8962AF_INT_EN,
855 FXLS8962AF_INT_EN_BUF_EN);
856 if (ret)
857 return ret;
858
859 ret = __fxls8962af_fifo_set_mode(data, true);
860
861 fxls8962af_active(data);
862
863 return ret;
864}
865
866static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
867{
868 struct fxls8962af_data *data = iio_priv(indio_dev);
869 int ret;
870
871 fxls8962af_standby(data);
872
873 /* Disable buffer interrupt */
874 ret = regmap_clear_bits(data->regmap, FXLS8962AF_INT_EN,
875 FXLS8962AF_INT_EN_BUF_EN);
876 if (ret)
877 return ret;
878
879 synchronize_irq(data->irq);
880
881 ret = __fxls8962af_fifo_set_mode(data, false);
882
883 if (data->enable_event)
884 fxls8962af_active(data);
885
886 return ret;
887}
888
889static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
890{
891 struct fxls8962af_data *data = iio_priv(indio_dev);
892
893 if (!data->enable_event)
894 fxls8962af_power_off(data);
895
896 return 0;
897}
898
899static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
900 .preenable = fxls8962af_buffer_preenable,
901 .postenable = fxls8962af_buffer_postenable,
902 .predisable = fxls8962af_buffer_predisable,
903 .postdisable = fxls8962af_buffer_postdisable,
904};
905
906static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
907 u16 *buffer, int samples,
908 int sample_length)
909{
910 int i, ret;
911
912 for (i = 0; i < samples; i++) {
913 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
914 &buffer[i * 3], sample_length);
915 if (ret)
916 return ret;
917 }
918
919 return 0;
920}
921
922static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
923 u16 *buffer, int samples)
924{
925 struct device *dev = regmap_get_device(data->regmap);
926 int sample_length = 3 * sizeof(*buffer);
927 int total_length = samples * sample_length;
928 int ret;
929
930 if (i2c_verify_client(dev) &&
931 data->chip_info->chip_id == FXLS8962AF_DEVICE_ID)
932 /*
933 * Due to errata bug (only applicable on fxls8962af):
934 * E3: FIFO burst read operation error using I2C interface
935 * We have to avoid burst reads on I2C..
936 */
937 ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
938 sample_length);
939 else
940 ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
941 total_length);
942
943 if (ret)
944 dev_err(dev, "Error transferring data from fifo: %d\n", ret);
945
946 return ret;
947}
948
949static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
950{
951 struct fxls8962af_data *data = iio_priv(indio_dev);
952 struct device *dev = regmap_get_device(data->regmap);
953 u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
954 uint64_t sample_period;
955 unsigned int reg;
956 int64_t tstamp;
957 int ret, i;
958 u8 count;
959
960 ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, ®);
961 if (ret)
962 return ret;
963
964 if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
965 dev_err(dev, "Buffer overflow");
966 return -EOVERFLOW;
967 }
968
969 count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
970 if (!count)
971 return 0;
972
973 data->old_timestamp = data->timestamp;
974 data->timestamp = iio_get_time_ns(indio_dev);
975
976 /*
977 * Approximate timestamps for each of the sample based on the sampling,
978 * frequency, timestamp for last sample and number of samples.
979 */
980 sample_period = (data->timestamp - data->old_timestamp);
981 do_div(sample_period, count);
982 tstamp = data->timestamp - (count - 1) * sample_period;
983
984 ret = fxls8962af_fifo_transfer(data, buffer, count);
985 if (ret)
986 return ret;
987
988 /* Demux hw FIFO into kfifo. */
989 for (i = 0; i < count; i++) {
990 int j, bit;
991
992 j = 0;
993 iio_for_each_active_channel(indio_dev, bit) {
994 memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
995 sizeof(data->scan.channels[0]));
996 }
997
998 iio_push_to_buffers_with_ts(indio_dev, &data->scan,
999 sizeof(data->scan), tstamp);
1000
1001 tstamp += sample_period;
1002 }
1003
1004 return count;
1005}
1006
1007static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
1008{
1009 struct fxls8962af_data *data = iio_priv(indio_dev);
1010 s64 ts = iio_get_time_ns(indio_dev);
1011 unsigned int reg;
1012 u64 ev_code;
1013 int ret;
1014
1015 ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, ®);
1016 if (ret)
1017 return ret;
1018
1019 if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
1020 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
1021 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1022 iio_push_event(indio_dev,
1023 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1024 IIO_EV_TYPE_THRESH, ev_code), ts);
1025 }
1026
1027 if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
1028 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
1029 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1030 iio_push_event(indio_dev,
1031 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1032 IIO_EV_TYPE_THRESH, ev_code), ts);
1033 }
1034
1035 if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
1036 ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
1037 IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1038 iio_push_event(indio_dev,
1039 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1040 IIO_EV_TYPE_THRESH, ev_code), ts);
1041 }
1042
1043 return 0;
1044}
1045
1046static irqreturn_t fxls8962af_interrupt(int irq, void *p)
1047{
1048 struct iio_dev *indio_dev = p;
1049 struct fxls8962af_data *data = iio_priv(indio_dev);
1050 unsigned int reg;
1051 int ret;
1052
1053 ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, ®);
1054 if (ret)
1055 return IRQ_NONE;
1056
1057 if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
1058 ret = fxls8962af_fifo_flush(indio_dev);
1059 if (ret < 0)
1060 return IRQ_NONE;
1061
1062 return IRQ_HANDLED;
1063 }
1064
1065 if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
1066 ret = fxls8962af_event_interrupt(indio_dev);
1067 if (ret < 0)
1068 return IRQ_NONE;
1069
1070 return IRQ_HANDLED;
1071 }
1072
1073 return IRQ_NONE;
1074}
1075
1076static void fxls8962af_pm_disable(void *dev_ptr)
1077{
1078 struct device *dev = dev_ptr;
1079 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1080
1081 pm_runtime_disable(dev);
1082 pm_runtime_set_suspended(dev);
1083 pm_runtime_put_noidle(dev);
1084
1085 fxls8962af_standby(iio_priv(indio_dev));
1086}
1087
1088static void fxls8962af_get_irq(struct device *dev,
1089 enum fxls8962af_int_pin *pin)
1090{
1091 int irq;
1092
1093 irq = fwnode_irq_get_byname(dev_fwnode(dev), "INT2");
1094 if (irq > 0) {
1095 *pin = FXLS8962AF_PIN_INT2;
1096 return;
1097 }
1098
1099 *pin = FXLS8962AF_PIN_INT1;
1100}
1101
1102static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
1103{
1104 struct fxls8962af_data *data = iio_priv(indio_dev);
1105 struct device *dev = regmap_get_device(data->regmap);
1106 unsigned long irq_type;
1107 bool irq_active_high;
1108 enum fxls8962af_int_pin int_pin;
1109 u8 int_pin_sel;
1110 int ret;
1111
1112 fxls8962af_get_irq(dev, &int_pin);
1113 switch (int_pin) {
1114 case FXLS8962AF_PIN_INT1:
1115 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
1116 break;
1117 case FXLS8962AF_PIN_INT2:
1118 int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
1119 break;
1120 default:
1121 dev_err(dev, "unsupported int pin selected\n");
1122 return -EINVAL;
1123 }
1124
1125 ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
1126 FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
1127 if (ret)
1128 return ret;
1129
1130 irq_type = irq_get_trigger_type(irq);
1131 switch (irq_type) {
1132 case IRQF_TRIGGER_HIGH:
1133 case IRQF_TRIGGER_RISING:
1134 irq_active_high = true;
1135 break;
1136 case IRQF_TRIGGER_LOW:
1137 case IRQF_TRIGGER_FALLING:
1138 irq_active_high = false;
1139 break;
1140 default:
1141 dev_info(dev, "mode %lx unsupported\n", irq_type);
1142 return -EINVAL;
1143 }
1144
1145 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1146 FXLS8962AF_SC4_INT_POL_MASK,
1147 FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
1148 if (ret)
1149 return ret;
1150
1151 if (device_property_read_bool(dev, "drive-open-drain")) {
1152 ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1153 FXLS8962AF_SC4_INT_PP_OD_MASK,
1154 FXLS8962AF_SC4_INT_PP_OD_PREP(1));
1155 if (ret)
1156 return ret;
1157
1158 irq_type |= IRQF_SHARED;
1159 }
1160
1161 return devm_request_threaded_irq(dev,
1162 irq,
1163 NULL, fxls8962af_interrupt,
1164 irq_type | IRQF_ONESHOT,
1165 indio_dev->name, indio_dev);
1166}
1167
1168int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
1169{
1170 struct fxls8962af_data *data;
1171 struct iio_dev *indio_dev;
1172 unsigned int reg;
1173 int ret, i;
1174
1175 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1176 if (!indio_dev)
1177 return -ENOMEM;
1178
1179 data = iio_priv(indio_dev);
1180 dev_set_drvdata(dev, indio_dev);
1181 data->regmap = regmap;
1182 data->irq = irq;
1183
1184 ret = iio_read_mount_matrix(dev, &data->orientation);
1185 if (ret)
1186 return ret;
1187
1188 ret = devm_regulator_get_enable(dev, "vdd");
1189 if (ret)
1190 return dev_err_probe(dev, ret,
1191 "Failed to get vdd regulator\n");
1192
1193 ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, ®);
1194 if (ret)
1195 return ret;
1196
1197 for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
1198 if (fxls_chip_info_table[i].chip_id == reg) {
1199 data->chip_info = &fxls_chip_info_table[i];
1200 break;
1201 }
1202 }
1203 if (i == ARRAY_SIZE(fxls_chip_info_table)) {
1204 dev_err(dev, "failed to match device in table\n");
1205 return -ENXIO;
1206 }
1207
1208 indio_dev->channels = data->chip_info->channels;
1209 indio_dev->num_channels = data->chip_info->num_channels;
1210 indio_dev->name = data->chip_info->name;
1211 indio_dev->info = &fxls8962af_info;
1212 indio_dev->modes = INDIO_DIRECT_MODE;
1213
1214 ret = fxls8962af_reset(data);
1215 if (ret)
1216 return ret;
1217
1218 if (irq) {
1219 ret = fxls8962af_irq_setup(indio_dev, irq);
1220 if (ret)
1221 return ret;
1222
1223 ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
1224 &fxls8962af_buffer_ops);
1225 if (ret)
1226 return ret;
1227 }
1228
1229 ret = pm_runtime_set_active(dev);
1230 if (ret)
1231 return ret;
1232
1233 pm_runtime_enable(dev);
1234 pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
1235 pm_runtime_use_autosuspend(dev);
1236
1237 ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
1238 if (ret)
1239 return ret;
1240
1241 if (device_property_read_bool(dev, "wakeup-source")) {
1242 ret = devm_device_init_wakeup(dev);
1243 if (ret)
1244 return dev_err_probe(dev, ret, "Failed to init wakeup\n");
1245 }
1246
1247 return devm_iio_device_register(dev, indio_dev);
1248}
1249EXPORT_SYMBOL_NS_GPL(fxls8962af_core_probe, "IIO_FXLS8962AF");
1250
1251static int fxls8962af_runtime_suspend(struct device *dev)
1252{
1253 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1254 int ret;
1255
1256 ret = fxls8962af_standby(data);
1257 if (ret) {
1258 dev_err(dev, "powering off device failed\n");
1259 return ret;
1260 }
1261
1262 return 0;
1263}
1264
1265static int fxls8962af_runtime_resume(struct device *dev)
1266{
1267 struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1268
1269 return fxls8962af_active(data);
1270}
1271
1272static int fxls8962af_suspend(struct device *dev)
1273{
1274 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1275 struct fxls8962af_data *data = iio_priv(indio_dev);
1276
1277 if (device_may_wakeup(dev) && data->enable_event) {
1278 enable_irq_wake(data->irq);
1279
1280 /*
1281 * Disable buffer, as the buffer is so small the device will wake
1282 * almost immediately.
1283 */
1284 if (iio_buffer_enabled(indio_dev))
1285 fxls8962af_buffer_predisable(indio_dev);
1286 } else {
1287 fxls8962af_runtime_suspend(dev);
1288 }
1289
1290 return 0;
1291}
1292
1293static int fxls8962af_resume(struct device *dev)
1294{
1295 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1296 struct fxls8962af_data *data = iio_priv(indio_dev);
1297
1298 if (device_may_wakeup(dev) && data->enable_event) {
1299 disable_irq_wake(data->irq);
1300
1301 if (iio_buffer_enabled(indio_dev))
1302 fxls8962af_buffer_postenable(indio_dev);
1303 } else {
1304 fxls8962af_runtime_resume(dev);
1305 }
1306
1307 return 0;
1308}
1309
1310EXPORT_NS_GPL_DEV_PM_OPS(fxls8962af_pm_ops, IIO_FXLS8962AF) = {
1311 SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
1312 RUNTIME_PM_OPS(fxls8962af_runtime_suspend, fxls8962af_runtime_resume, NULL)
1313};
1314
1315MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
1316MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
1317MODULE_LICENSE("GPL v2");