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1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8#ifndef I3C_INTERNALS_H 9#define I3C_INTERNALS_H 10 11#include <linux/i3c/master.h> 12#include <linux/io.h> 13 14void i3c_bus_normaluse_lock(struct i3c_bus *bus); 15void i3c_bus_normaluse_unlock(struct i3c_bus *bus); 16 17int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev); 18int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, 19 struct i3c_xfer *xfers, 20 int nxfers, enum i3c_xfer_mode mode); 21int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev); 22int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev); 23int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 24 const struct i3c_ibi_setup *req); 25void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev); 26 27/** 28 * i3c_writel_fifo - Write data buffer to 32bit FIFO 29 * @addr: FIFO Address to write to 30 * @buf: Pointer to the data bytes to write 31 * @nbytes: Number of bytes to write 32 */ 33static inline void i3c_writel_fifo(void __iomem *addr, const void *buf, 34 int nbytes) 35{ 36 writesl(addr, buf, nbytes / 4); 37 if (nbytes & 3) { 38 u32 tmp = 0; 39 40 memcpy(&tmp, buf + (nbytes & ~3), nbytes & 3); 41 /* 42 * writesl() instead of writel() to keep FIFO 43 * byteorder on big-endian targets 44 */ 45 writesl(addr, &tmp, 1); 46 } 47} 48 49/** 50 * i3c_readl_fifo - Read data buffer from 32bit FIFO 51 * @addr: FIFO Address to read from 52 * @buf: Pointer to the buffer to store read bytes 53 * @nbytes: Number of bytes to read 54 */ 55static inline void i3c_readl_fifo(const void __iomem *addr, void *buf, 56 int nbytes) 57{ 58 readsl(addr, buf, nbytes / 4); 59 if (nbytes & 3) { 60 u32 tmp; 61 62 /* 63 * readsl() instead of readl() to keep FIFO 64 * byteorder on big-endian targets 65 */ 66 readsl(addr, &tmp, 1); 67 memcpy(buf + (nbytes & ~3), &tmp, nbytes & 3); 68 } 69} 70 71#endif /* I3C_INTERNAL_H */