tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * MCP2221A - Microchip USB to I2C Host Protocol Bridge
4 *
5 * Copyright (c) 2020, Rishi Gupta <gupt21@gmail.com>
6 *
7 * Datasheet: https://ww1.microchip.com/downloads/en/DeviceDoc/20005565B.pdf
8 */
9
10#include <linux/module.h>
11#include <linux/err.h>
12#include <linux/mutex.h>
13#include <linux/bitfield.h>
14#include <linux/completion.h>
15#include <linux/delay.h>
16#include <linux/hid.h>
17#include <linux/hidraw.h>
18#include <linux/i2c.h>
19#include <linux/gpio/driver.h>
20#include <linux/iio/iio.h>
21#include <linux/minmax.h>
22#include <linux/moduleparam.h>
23#include "hid-ids.h"
24
25static bool gpio_mode_enforce;
26
27module_param(gpio_mode_enforce, bool, 0644);
28MODULE_PARM_DESC(gpio_mode_enforce,
29 "Enforce GPIO mode for GP0 thru GP3 (default: false, will be used for IIO)");
30
31/* Commands codes in a raw output report */
32enum {
33 MCP2221_I2C_WR_DATA = 0x90,
34 MCP2221_I2C_WR_NO_STOP = 0x94,
35 MCP2221_I2C_RD_DATA = 0x91,
36 MCP2221_I2C_RD_RPT_START = 0x93,
37 MCP2221_I2C_GET_DATA = 0x40,
38 MCP2221_I2C_PARAM_OR_STATUS = 0x10,
39 MCP2221_I2C_SET_SPEED = 0x20,
40 MCP2221_I2C_CANCEL = 0x10,
41 MCP2221_GPIO_SET = 0x50,
42 MCP2221_GPIO_GET = 0x51,
43 MCP2221_SET_SRAM_SETTINGS = 0x60,
44 MCP2221_GET_SRAM_SETTINGS = 0x61,
45 MCP2221_READ_FLASH_DATA = 0xb0,
46};
47
48/* Response codes in a raw input report */
49enum {
50 MCP2221_SUCCESS = 0x00,
51 MCP2221_I2C_ENG_BUSY = 0x01,
52 MCP2221_I2C_START_TOUT = 0x12,
53 MCP2221_I2C_STOP_TOUT = 0x62,
54 MCP2221_I2C_WRADDRL_TOUT = 0x23,
55 MCP2221_I2C_WRDATA_TOUT = 0x44,
56 MCP2221_I2C_WRADDRL_NACK = 0x25,
57 MCP2221_I2C_MASK_ADDR_NACK = 0x40,
58 MCP2221_I2C_WRADDRL_SEND = 0x21,
59 MCP2221_I2C_ADDR_NACK = 0x25,
60 MCP2221_I2C_READ_PARTIAL = 0x54,
61 MCP2221_I2C_READ_COMPL = 0x55,
62 MCP2221_ALT_F_NOT_GPIOV = 0xEE,
63 MCP2221_ALT_F_NOT_GPIOD = 0xEF,
64};
65
66/* MCP SRAM read offsets cmd: MCP2221_GET_SRAM_SETTINGS */
67enum {
68 MCP2221_SRAM_RD_GP0 = 22,
69 MCP2221_SRAM_RD_GP1 = 23,
70 MCP2221_SRAM_RD_GP2 = 24,
71 MCP2221_SRAM_RD_GP3 = 25,
72};
73
74/* MCP SRAM write offsets cmd: MCP2221_SET_SRAM_SETTINGS */
75enum {
76 MCP2221_SRAM_WR_GP_ENA_ALTER = 7,
77 MCP2221_SRAM_WR_GP0 = 8,
78 MCP2221_SRAM_WR_GP1 = 9,
79 MCP2221_SRAM_WR_GP2 = 10,
80 MCP2221_SRAM_WR_GP3 = 11,
81};
82
83#define MCP2221_SRAM_GP_DESIGN_MASK 0x07
84#define MCP2221_SRAM_GP_DIRECTION_MASK 0x08
85#define MCP2221_SRAM_GP_VALUE_MASK 0x10
86
87/* MCP GPIO direction encoding */
88enum {
89 MCP2221_DIR_OUT = 0x00,
90 MCP2221_DIR_IN = 0x01,
91};
92
93#define MCP_NGPIO 4
94
95/* MCP GPIO set command layout */
96struct mcp_set_gpio {
97 u8 cmd;
98 u8 dummy;
99 struct {
100 u8 change_value;
101 u8 value;
102 u8 change_direction;
103 u8 direction;
104 } gpio[MCP_NGPIO];
105} __packed;
106
107/* MCP GPIO get command layout */
108struct mcp_get_gpio {
109 u8 cmd;
110 u8 dummy;
111 struct {
112 u8 value;
113 u8 direction;
114 } gpio[MCP_NGPIO];
115} __packed;
116
117/*
118 * There is no way to distinguish responses. Therefore next command
119 * is sent only after response to previous has been received. Mutex
120 * lock is used for this purpose mainly.
121 */
122struct mcp2221 {
123 struct hid_device *hdev;
124 struct i2c_adapter adapter;
125 struct mutex lock;
126 struct completion wait_in_report;
127 struct delayed_work init_work;
128 u8 *rxbuf;
129 u8 txbuf[64];
130 int rxbuf_idx;
131 int status;
132 u8 cur_i2c_clk_div;
133 struct gpio_chip *gc;
134 u8 gp_idx;
135 u8 gpio_dir;
136 u8 mode[4];
137#if IS_REACHABLE(CONFIG_IIO)
138 struct iio_chan_spec iio_channels[3];
139 u16 adc_values[3];
140 u8 adc_scale;
141 u8 dac_value;
142 u16 dac_scale;
143#endif
144};
145
146struct mcp2221_iio {
147 struct mcp2221 *mcp;
148};
149
150/*
151 * Default i2c bus clock frequency 400 kHz. Modify this if you
152 * want to set some other frequency (min 50 kHz - max 400 kHz).
153 */
154static uint i2c_clk_freq = 400;
155
156/* Synchronously send output report to the device */
157static int mcp_send_report(struct mcp2221 *mcp,
158 u8 *out_report, size_t len)
159{
160 u8 *buf;
161 int ret;
162
163 buf = kmemdup(out_report, len, GFP_KERNEL);
164 if (!buf)
165 return -ENOMEM;
166
167 /* mcp2221 uses interrupt endpoint for out reports */
168 ret = hid_hw_output_report(mcp->hdev, buf, len);
169 kfree(buf);
170
171 if (ret < 0)
172 return ret;
173 return 0;
174}
175
176/*
177 * Send o/p report to the device and wait for i/p report to be
178 * received from the device. If the device does not respond,
179 * we timeout.
180 */
181static int mcp_send_data_req_status(struct mcp2221 *mcp,
182 u8 *out_report, int len)
183{
184 int ret;
185 unsigned long t;
186
187 reinit_completion(&mcp->wait_in_report);
188
189 ret = mcp_send_report(mcp, out_report, len);
190 if (ret)
191 return ret;
192
193 t = wait_for_completion_timeout(&mcp->wait_in_report,
194 msecs_to_jiffies(4000));
195 if (!t)
196 return -ETIMEDOUT;
197
198 return mcp->status;
199}
200
201/* Check pass/fail for actual communication with i2c slave */
202static int mcp_chk_last_cmd_status(struct mcp2221 *mcp)
203{
204 memset(mcp->txbuf, 0, 8);
205 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS;
206
207 return mcp_send_data_req_status(mcp, mcp->txbuf, 8);
208}
209
210/* Cancels last command releasing i2c bus just in case occupied */
211static int mcp_cancel_last_cmd(struct mcp2221 *mcp)
212{
213 memset(mcp->txbuf, 0, 8);
214 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS;
215 mcp->txbuf[2] = MCP2221_I2C_CANCEL;
216
217 return mcp_send_data_req_status(mcp, mcp->txbuf, 8);
218}
219
220/* Check if the last command succeeded or failed and return the result.
221 * If the command did fail, cancel that command which will free the i2c bus.
222 */
223static int mcp_chk_last_cmd_status_free_bus(struct mcp2221 *mcp)
224{
225 int ret;
226
227 ret = mcp_chk_last_cmd_status(mcp);
228 if (ret) {
229 /* The last command was a failure.
230 * Send a cancel which will also free the bus.
231 */
232 usleep_range(980, 1000);
233 mcp_cancel_last_cmd(mcp);
234 }
235
236 return ret;
237}
238
239static int mcp_set_i2c_speed(struct mcp2221 *mcp)
240{
241 int ret;
242
243 memset(mcp->txbuf, 0, 8);
244 mcp->txbuf[0] = MCP2221_I2C_PARAM_OR_STATUS;
245 mcp->txbuf[3] = MCP2221_I2C_SET_SPEED;
246 mcp->txbuf[4] = mcp->cur_i2c_clk_div;
247
248 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 8);
249 if (ret) {
250 /* Small delay is needed here */
251 usleep_range(980, 1000);
252 mcp_cancel_last_cmd(mcp);
253 }
254
255 return 0;
256}
257
258/*
259 * An output report can contain minimum 1 and maximum 60 user data
260 * bytes. If the number of data bytes is more then 60, we send it
261 * in chunks of 60 bytes. Last chunk may contain exactly 60 or less
262 * bytes. Total number of bytes is informed in very first report to
263 * mcp2221, from that point onwards it first collect all the data
264 * from host and then send to i2c slave device.
265 */
266static int mcp_i2c_write(struct mcp2221 *mcp,
267 struct i2c_msg *msg, int type, u8 last_status)
268{
269 int ret, len, idx, sent;
270
271 idx = 0;
272 sent = 0;
273 len = min(msg->len, 60);
274
275 do {
276 mcp->txbuf[0] = type;
277 mcp->txbuf[1] = msg->len & 0xff;
278 mcp->txbuf[2] = msg->len >> 8;
279 mcp->txbuf[3] = (u8)(msg->addr << 1);
280
281 memcpy(&mcp->txbuf[4], &msg->buf[idx], len);
282
283 ret = mcp_send_data_req_status(mcp, mcp->txbuf, len + 4);
284 if (ret)
285 return ret;
286
287 usleep_range(980, 1000);
288
289 if (last_status) {
290 ret = mcp_chk_last_cmd_status_free_bus(mcp);
291 if (ret)
292 return ret;
293 }
294
295 sent = sent + len;
296 if (sent >= msg->len)
297 break;
298
299 idx = idx + len;
300 len = min(msg->len - sent, 60);
301
302 /*
303 * Testing shows delay is needed between successive writes
304 * otherwise next write fails on first-try from i2c core.
305 * This value is obtained through automated stress testing.
306 */
307 usleep_range(980, 1000);
308 } while (len > 0);
309
310 return ret;
311}
312
313/*
314 * Device reads all data (0 - 65535 bytes) from i2c slave device and
315 * stores it in device itself. This data is read back from device to
316 * host in multiples of 60 bytes using input reports.
317 */
318static int mcp_i2c_smbus_read(struct mcp2221 *mcp,
319 struct i2c_msg *msg, int type, u16 smbus_addr,
320 u8 smbus_len, u8 *smbus_buf)
321{
322 int ret;
323 u16 total_len;
324 int retries = 0;
325
326 mcp->txbuf[0] = type;
327 if (msg) {
328 mcp->txbuf[1] = msg->len & 0xff;
329 mcp->txbuf[2] = msg->len >> 8;
330 mcp->txbuf[3] = (u8)(msg->addr << 1);
331 total_len = msg->len;
332 mcp->rxbuf = msg->buf;
333 } else {
334 mcp->txbuf[1] = smbus_len;
335 mcp->txbuf[2] = 0;
336 mcp->txbuf[3] = (u8)(smbus_addr << 1);
337 total_len = smbus_len;
338 mcp->rxbuf = smbus_buf;
339 }
340
341 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 4);
342 if (ret)
343 return ret;
344
345 mcp->rxbuf_idx = 0;
346
347 do {
348 /* Wait for the data to be read by the device */
349 usleep_range(980, 1000);
350
351 memset(mcp->txbuf, 0, 4);
352 mcp->txbuf[0] = MCP2221_I2C_GET_DATA;
353
354 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
355 if (ret) {
356 if (retries < 5) {
357 /* The data wasn't ready to read.
358 * Wait a bit longer and try again.
359 */
360 usleep_range(90, 100);
361 retries++;
362 } else {
363 usleep_range(980, 1000);
364 mcp_cancel_last_cmd(mcp);
365 return ret;
366 }
367 } else {
368 retries = 0;
369 }
370 } while (mcp->rxbuf_idx < total_len);
371
372 usleep_range(980, 1000);
373 ret = mcp_chk_last_cmd_status_free_bus(mcp);
374
375 return ret;
376}
377
378static int mcp_i2c_xfer(struct i2c_adapter *adapter,
379 struct i2c_msg msgs[], int num)
380{
381 int ret;
382 struct mcp2221 *mcp = i2c_get_adapdata(adapter);
383
384 hid_hw_power(mcp->hdev, PM_HINT_FULLON);
385
386 mutex_lock(&mcp->lock);
387
388 if (num == 1) {
389 if (msgs->flags & I2C_M_RD) {
390 ret = mcp_i2c_smbus_read(mcp, msgs, MCP2221_I2C_RD_DATA,
391 0, 0, NULL);
392 } else {
393 ret = mcp_i2c_write(mcp, msgs, MCP2221_I2C_WR_DATA, 1);
394 }
395 if (ret)
396 goto exit;
397 ret = num;
398 } else if (num == 2) {
399 /* Ex transaction; send reg address and read its contents */
400 if (msgs[0].addr == msgs[1].addr &&
401 !(msgs[0].flags & I2C_M_RD) &&
402 (msgs[1].flags & I2C_M_RD)) {
403
404 ret = mcp_i2c_write(mcp, &msgs[0],
405 MCP2221_I2C_WR_NO_STOP, 0);
406 if (ret)
407 goto exit;
408
409 ret = mcp_i2c_smbus_read(mcp, &msgs[1],
410 MCP2221_I2C_RD_RPT_START,
411 0, 0, NULL);
412 if (ret)
413 goto exit;
414 ret = num;
415 } else {
416 dev_err(&adapter->dev,
417 "unsupported multi-msg i2c transaction\n");
418 ret = -EOPNOTSUPP;
419 }
420 } else {
421 dev_err(&adapter->dev,
422 "unsupported multi-msg i2c transaction\n");
423 ret = -EOPNOTSUPP;
424 }
425
426exit:
427 hid_hw_power(mcp->hdev, PM_HINT_NORMAL);
428 mutex_unlock(&mcp->lock);
429 return ret;
430}
431
432static int mcp_smbus_write(struct mcp2221 *mcp, u16 addr,
433 u8 command, u8 *buf, u8 len, int type,
434 u8 last_status)
435{
436 int data_len, ret;
437
438 mcp->txbuf[0] = type;
439 mcp->txbuf[1] = len + 1; /* 1 is due to command byte itself */
440 mcp->txbuf[2] = 0;
441 mcp->txbuf[3] = (u8)(addr << 1);
442 mcp->txbuf[4] = command;
443
444 switch (len) {
445 case 0:
446 data_len = 5;
447 break;
448 case 1:
449 mcp->txbuf[5] = buf[0];
450 data_len = 6;
451 break;
452 case 2:
453 mcp->txbuf[5] = buf[0];
454 mcp->txbuf[6] = buf[1];
455 data_len = 7;
456 break;
457 default:
458 if (len > I2C_SMBUS_BLOCK_MAX)
459 return -EINVAL;
460
461 memcpy(&mcp->txbuf[5], buf, len);
462 data_len = len + 5;
463 }
464
465 ret = mcp_send_data_req_status(mcp, mcp->txbuf, data_len);
466 if (ret)
467 return ret;
468
469 if (last_status) {
470 usleep_range(980, 1000);
471
472 ret = mcp_chk_last_cmd_status_free_bus(mcp);
473 }
474
475 return ret;
476}
477
478static int mcp_smbus_xfer(struct i2c_adapter *adapter, u16 addr,
479 unsigned short flags, char read_write,
480 u8 command, int size,
481 union i2c_smbus_data *data)
482{
483 int ret;
484 struct mcp2221 *mcp = i2c_get_adapdata(adapter);
485
486 hid_hw_power(mcp->hdev, PM_HINT_FULLON);
487
488 mutex_lock(&mcp->lock);
489
490 switch (size) {
491
492 case I2C_SMBUS_QUICK:
493 if (read_write == I2C_SMBUS_READ)
494 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA,
495 addr, 0, &data->byte);
496 else
497 ret = mcp_smbus_write(mcp, addr, command, NULL,
498 0, MCP2221_I2C_WR_DATA, 1);
499 break;
500 case I2C_SMBUS_BYTE:
501 if (read_write == I2C_SMBUS_READ)
502 ret = mcp_i2c_smbus_read(mcp, NULL, MCP2221_I2C_RD_DATA,
503 addr, 1, &data->byte);
504 else
505 ret = mcp_smbus_write(mcp, addr, command, NULL,
506 0, MCP2221_I2C_WR_DATA, 1);
507 break;
508 case I2C_SMBUS_BYTE_DATA:
509 if (read_write == I2C_SMBUS_READ) {
510 ret = mcp_smbus_write(mcp, addr, command, NULL,
511 0, MCP2221_I2C_WR_NO_STOP, 0);
512 if (ret)
513 goto exit;
514
515 ret = mcp_i2c_smbus_read(mcp, NULL,
516 MCP2221_I2C_RD_RPT_START,
517 addr, 1, &data->byte);
518 } else {
519 ret = mcp_smbus_write(mcp, addr, command, &data->byte,
520 1, MCP2221_I2C_WR_DATA, 1);
521 }
522 break;
523 case I2C_SMBUS_WORD_DATA:
524 if (read_write == I2C_SMBUS_READ) {
525 ret = mcp_smbus_write(mcp, addr, command, NULL,
526 0, MCP2221_I2C_WR_NO_STOP, 0);
527 if (ret)
528 goto exit;
529
530 ret = mcp_i2c_smbus_read(mcp, NULL,
531 MCP2221_I2C_RD_RPT_START,
532 addr, 2, (u8 *)&data->word);
533 } else {
534 ret = mcp_smbus_write(mcp, addr, command,
535 (u8 *)&data->word, 2,
536 MCP2221_I2C_WR_DATA, 1);
537 }
538 break;
539 case I2C_SMBUS_BLOCK_DATA:
540 if (read_write == I2C_SMBUS_READ) {
541 ret = mcp_smbus_write(mcp, addr, command, NULL,
542 0, MCP2221_I2C_WR_NO_STOP, 1);
543 if (ret)
544 goto exit;
545
546 ret = mcp_i2c_smbus_read(mcp, NULL,
547 MCP2221_I2C_RD_RPT_START,
548 addr, data->block[0] + 1,
549 data->block);
550 if (ret)
551 goto exit;
552 } else {
553 if (!data->block[0]) {
554 ret = -EINVAL;
555 goto exit;
556 }
557 ret = mcp_smbus_write(mcp, addr, command, data->block,
558 data->block[0] + 1,
559 MCP2221_I2C_WR_DATA, 1);
560 }
561 break;
562 case I2C_SMBUS_I2C_BLOCK_DATA:
563 if (read_write == I2C_SMBUS_READ) {
564 ret = mcp_smbus_write(mcp, addr, command, NULL,
565 0, MCP2221_I2C_WR_NO_STOP, 0);
566 if (ret)
567 goto exit;
568
569 ret = mcp_i2c_smbus_read(mcp, NULL,
570 MCP2221_I2C_RD_RPT_START,
571 addr, data->block[0],
572 &data->block[1]);
573 if (ret)
574 goto exit;
575 } else {
576 if (!data->block[0]) {
577 ret = -EINVAL;
578 goto exit;
579 }
580 ret = mcp_smbus_write(mcp, addr, command,
581 &data->block[1], data->block[0],
582 MCP2221_I2C_WR_DATA, 1);
583 }
584 break;
585 case I2C_SMBUS_PROC_CALL:
586 ret = mcp_smbus_write(mcp, addr, command,
587 (u8 *)&data->word,
588 2, MCP2221_I2C_WR_NO_STOP, 0);
589 if (ret)
590 goto exit;
591
592 ret = mcp_i2c_smbus_read(mcp, NULL,
593 MCP2221_I2C_RD_RPT_START,
594 addr, 2, (u8 *)&data->word);
595 break;
596 case I2C_SMBUS_BLOCK_PROC_CALL:
597 ret = mcp_smbus_write(mcp, addr, command, data->block,
598 data->block[0] + 1,
599 MCP2221_I2C_WR_NO_STOP, 0);
600 if (ret)
601 goto exit;
602
603 ret = mcp_i2c_smbus_read(mcp, NULL,
604 MCP2221_I2C_RD_RPT_START,
605 addr, I2C_SMBUS_BLOCK_MAX,
606 data->block);
607 break;
608 default:
609 dev_err(&mcp->adapter.dev,
610 "unsupported smbus transaction size:%d\n", size);
611 ret = -EOPNOTSUPP;
612 }
613
614exit:
615 hid_hw_power(mcp->hdev, PM_HINT_NORMAL);
616 mutex_unlock(&mcp->lock);
617 return ret;
618}
619
620static u32 mcp_i2c_func(struct i2c_adapter *adapter)
621{
622 return I2C_FUNC_I2C |
623 I2C_FUNC_SMBUS_READ_BLOCK_DATA |
624 I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
625 (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_PEC);
626}
627
628static const struct i2c_algorithm mcp_i2c_algo = {
629 .master_xfer = mcp_i2c_xfer,
630 .smbus_xfer = mcp_smbus_xfer,
631 .functionality = mcp_i2c_func,
632};
633
634#if IS_REACHABLE(CONFIG_GPIOLIB)
635static int mcp_gpio_read_sram(struct mcp2221 *mcp)
636{
637 int ret;
638
639 memset(mcp->txbuf, 0, 64);
640 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS;
641
642 mutex_lock(&mcp->lock);
643 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64);
644 mutex_unlock(&mcp->lock);
645
646 return ret;
647}
648
649/*
650 * If CONFIG_IIO is not enabled, check for the gpio pins
651 * if they are in gpio mode. For the ones which are not
652 * in gpio mode, set them into gpio mode.
653 */
654static int mcp2221_check_gpio_pinfunc(struct mcp2221 *mcp)
655{
656 int i;
657 int needgpiofix = 0;
658 int ret;
659
660 if (IS_ENABLED(CONFIG_IIO) && !gpio_mode_enforce)
661 return 0;
662
663 ret = mcp_gpio_read_sram(mcp);
664 if (ret)
665 return ret;
666
667 for (i = 0; i < MCP_NGPIO; i++) {
668 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) != 0x0) {
669 dev_warn(&mcp->hdev->dev,
670 "GPIO %d not in gpio mode\n", i);
671 needgpiofix = 1;
672 }
673 }
674
675 if (!needgpiofix)
676 return 0;
677
678 /*
679 * Set all bytes to 0, so Bit 7 is not set. The chip
680 * only changes content of a register when bit 7 is set.
681 */
682 memset(mcp->txbuf, 0, 64);
683 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS;
684
685 /*
686 * Set bit 7 in MCP2221_SRAM_WR_GP_ENA_ALTER to enable
687 * loading of a new set of gpio settings to GP SRAM
688 */
689 mcp->txbuf[MCP2221_SRAM_WR_GP_ENA_ALTER] = 0x80;
690 for (i = 0; i < MCP_NGPIO; i++) {
691 if ((mcp->mode[i] & MCP2221_SRAM_GP_DESIGN_MASK) == 0x0) {
692 /* write current GPIO mode */
693 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = mcp->mode[i];
694 } else {
695 /* pin is not in gpio mode, set it to input mode */
696 mcp->txbuf[MCP2221_SRAM_WR_GP0 + i] = 0x08;
697 dev_warn(&mcp->hdev->dev,
698 "Set GPIO mode for gpio pin %d!\n", i);
699 }
700 }
701
702 mutex_lock(&mcp->lock);
703 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 64);
704 mutex_unlock(&mcp->lock);
705
706 return ret;
707}
708
709static int mcp_gpio_get(struct gpio_chip *gc,
710 unsigned int offset)
711{
712 int ret;
713 struct mcp2221 *mcp = gpiochip_get_data(gc);
714
715 mcp->txbuf[0] = MCP2221_GPIO_GET;
716
717 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]);
718
719 mutex_lock(&mcp->lock);
720 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
721 mutex_unlock(&mcp->lock);
722
723 return ret;
724}
725
726static int mcp_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
727{
728 struct mcp2221 *mcp = gpiochip_get_data(gc);
729 int ret;
730
731 memset(mcp->txbuf, 0, 18);
732 mcp->txbuf[0] = MCP2221_GPIO_SET;
733
734 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].value);
735
736 mcp->txbuf[mcp->gp_idx - 1] = 1;
737 mcp->txbuf[mcp->gp_idx] = !!value;
738
739 mutex_lock(&mcp->lock);
740 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 18);
741 mutex_unlock(&mcp->lock);
742
743 return ret;
744}
745
746static int mcp_gpio_dir_set(struct mcp2221 *mcp,
747 unsigned int offset, u8 val)
748{
749 memset(mcp->txbuf, 0, 18);
750 mcp->txbuf[0] = MCP2221_GPIO_SET;
751
752 mcp->gp_idx = offsetof(struct mcp_set_gpio, gpio[offset].direction);
753
754 mcp->txbuf[mcp->gp_idx - 1] = 1;
755 mcp->txbuf[mcp->gp_idx] = val;
756
757 return mcp_send_data_req_status(mcp, mcp->txbuf, 18);
758}
759
760static int mcp_gpio_direction_input(struct gpio_chip *gc,
761 unsigned int offset)
762{
763 int ret;
764 struct mcp2221 *mcp = gpiochip_get_data(gc);
765
766 mutex_lock(&mcp->lock);
767 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_IN);
768 mutex_unlock(&mcp->lock);
769
770 return ret;
771}
772
773static int mcp_gpio_direction_output(struct gpio_chip *gc,
774 unsigned int offset, int value)
775{
776 int ret;
777 struct mcp2221 *mcp = gpiochip_get_data(gc);
778
779 mutex_lock(&mcp->lock);
780 ret = mcp_gpio_dir_set(mcp, offset, MCP2221_DIR_OUT);
781 mutex_unlock(&mcp->lock);
782
783 /* Can't configure as output, bailout early */
784 if (ret)
785 return ret;
786
787 mcp_gpio_set(gc, offset, value);
788
789 return 0;
790}
791
792static int mcp_gpio_get_direction(struct gpio_chip *gc,
793 unsigned int offset)
794{
795 int ret;
796 struct mcp2221 *mcp = gpiochip_get_data(gc);
797
798 mcp->txbuf[0] = MCP2221_GPIO_GET;
799
800 mcp->gp_idx = offsetof(struct mcp_get_gpio, gpio[offset]);
801
802 mutex_lock(&mcp->lock);
803 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
804 mutex_unlock(&mcp->lock);
805
806 if (ret)
807 return ret;
808
809 if (mcp->gpio_dir == MCP2221_DIR_IN)
810 return GPIO_LINE_DIRECTION_IN;
811
812 return GPIO_LINE_DIRECTION_OUT;
813}
814#endif
815
816/* Gives current state of i2c engine inside mcp2221 */
817static int mcp_get_i2c_eng_state(struct mcp2221 *mcp,
818 u8 *data, u8 idx)
819{
820 int ret;
821
822 switch (data[idx]) {
823 case MCP2221_I2C_WRADDRL_NACK:
824 case MCP2221_I2C_WRADDRL_SEND:
825 ret = -ENXIO;
826 break;
827 case MCP2221_I2C_START_TOUT:
828 case MCP2221_I2C_STOP_TOUT:
829 case MCP2221_I2C_WRADDRL_TOUT:
830 case MCP2221_I2C_WRDATA_TOUT:
831 ret = -ETIMEDOUT;
832 break;
833 case MCP2221_I2C_ENG_BUSY:
834 ret = -EAGAIN;
835 break;
836 case MCP2221_SUCCESS:
837 ret = 0x00;
838 break;
839 default:
840 ret = -EIO;
841 }
842
843 return ret;
844}
845
846/*
847 * MCP2221 uses interrupt endpoint for input reports. This function
848 * is called by HID layer when it receives i/p report from mcp2221,
849 * which is actually a response to the previously sent command.
850 *
851 * MCP2221A firmware specific return codes are parsed and 0 or
852 * appropriate negative error code is returned. Delayed response
853 * results in timeout error and stray reponses results in -EIO.
854 */
855static int mcp2221_raw_event(struct hid_device *hdev,
856 struct hid_report *report, u8 *data, int size)
857{
858 u8 *buf;
859 struct mcp2221 *mcp = hid_get_drvdata(hdev);
860
861 switch (data[0]) {
862
863 case MCP2221_I2C_WR_DATA:
864 case MCP2221_I2C_WR_NO_STOP:
865 case MCP2221_I2C_RD_DATA:
866 case MCP2221_I2C_RD_RPT_START:
867 switch (data[1]) {
868 case MCP2221_SUCCESS:
869 mcp->status = 0;
870 break;
871 default:
872 mcp->status = mcp_get_i2c_eng_state(mcp, data, 2);
873 }
874 complete(&mcp->wait_in_report);
875 break;
876
877 case MCP2221_I2C_PARAM_OR_STATUS:
878 switch (data[1]) {
879 case MCP2221_SUCCESS:
880 if ((mcp->txbuf[3] == MCP2221_I2C_SET_SPEED) &&
881 (data[3] != MCP2221_I2C_SET_SPEED)) {
882 mcp->status = -EAGAIN;
883 break;
884 }
885 if (data[20] & MCP2221_I2C_MASK_ADDR_NACK) {
886 mcp->status = -ENXIO;
887 break;
888 }
889 mcp->status = mcp_get_i2c_eng_state(mcp, data, 8);
890#if IS_REACHABLE(CONFIG_IIO)
891 memcpy(&mcp->adc_values, &data[50], sizeof(mcp->adc_values));
892#endif
893 break;
894 default:
895 mcp->status = -EIO;
896 }
897 complete(&mcp->wait_in_report);
898 break;
899
900 case MCP2221_I2C_GET_DATA:
901 switch (data[1]) {
902 case MCP2221_SUCCESS:
903 if (data[2] == MCP2221_I2C_ADDR_NACK) {
904 mcp->status = -ENXIO;
905 break;
906 }
907 if (!mcp_get_i2c_eng_state(mcp, data, 2)
908 && (data[3] == 0)) {
909 mcp->status = 0;
910 break;
911 }
912 if (data[3] == 127) {
913 mcp->status = -EIO;
914 break;
915 }
916 if (data[2] == MCP2221_I2C_READ_COMPL ||
917 data[2] == MCP2221_I2C_READ_PARTIAL) {
918 if (!mcp->rxbuf || mcp->rxbuf_idx < 0 || data[3] > 60) {
919 mcp->status = -EINVAL;
920 break;
921 }
922 buf = mcp->rxbuf;
923 memcpy(&buf[mcp->rxbuf_idx], &data[4], data[3]);
924 mcp->rxbuf_idx = mcp->rxbuf_idx + data[3];
925 mcp->status = 0;
926 break;
927 }
928 mcp->status = -EIO;
929 break;
930 default:
931 mcp->status = -EIO;
932 }
933 complete(&mcp->wait_in_report);
934 break;
935
936 case MCP2221_GPIO_GET:
937 switch (data[1]) {
938 case MCP2221_SUCCESS:
939 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) ||
940 (data[mcp->gp_idx + 1] == MCP2221_ALT_F_NOT_GPIOD)) {
941 mcp->status = -ENOENT;
942 } else {
943 mcp->status = !!data[mcp->gp_idx];
944 mcp->gpio_dir = data[mcp->gp_idx + 1];
945 }
946 break;
947 default:
948 mcp->status = -EAGAIN;
949 }
950 complete(&mcp->wait_in_report);
951 break;
952
953 case MCP2221_GPIO_SET:
954 switch (data[1]) {
955 case MCP2221_SUCCESS:
956 if ((data[mcp->gp_idx] == MCP2221_ALT_F_NOT_GPIOV) ||
957 (data[mcp->gp_idx - 1] == MCP2221_ALT_F_NOT_GPIOV)) {
958 mcp->status = -ENOENT;
959 } else {
960 mcp->status = 0;
961 }
962 break;
963 default:
964 mcp->status = -EAGAIN;
965 }
966 complete(&mcp->wait_in_report);
967 break;
968
969 case MCP2221_SET_SRAM_SETTINGS:
970 switch (data[1]) {
971 case MCP2221_SUCCESS:
972 mcp->status = 0;
973 break;
974 default:
975 mcp->status = -EAGAIN;
976 }
977 complete(&mcp->wait_in_report);
978 break;
979
980 case MCP2221_GET_SRAM_SETTINGS:
981 switch (data[1]) {
982 case MCP2221_SUCCESS:
983 memcpy(&mcp->mode, &data[22], 4);
984#if IS_REACHABLE(CONFIG_IIO)
985 mcp->dac_value = data[6] & GENMASK(4, 0);
986#endif
987 mcp->status = 0;
988 break;
989 default:
990 mcp->status = -EAGAIN;
991 }
992 complete(&mcp->wait_in_report);
993 break;
994
995 case MCP2221_READ_FLASH_DATA:
996 switch (data[1]) {
997 case MCP2221_SUCCESS:
998 mcp->status = 0;
999
1000 /* Only handles CHIP SETTINGS subpage currently */
1001 if (mcp->txbuf[1] != 0) {
1002 mcp->status = -EIO;
1003 break;
1004 }
1005
1006#if IS_REACHABLE(CONFIG_IIO)
1007 {
1008 u8 tmp;
1009 /* DAC scale value */
1010 tmp = FIELD_GET(GENMASK(7, 6), data[6]);
1011 if ((data[6] & BIT(5)) && tmp)
1012 mcp->dac_scale = tmp + 4;
1013 else
1014 mcp->dac_scale = 5;
1015
1016 /* ADC scale value */
1017 tmp = FIELD_GET(GENMASK(4, 3), data[7]);
1018 if ((data[7] & BIT(2)) && tmp)
1019 mcp->adc_scale = tmp - 1;
1020 else
1021 mcp->adc_scale = 0;
1022 }
1023#endif
1024
1025 break;
1026 default:
1027 mcp->status = -EAGAIN;
1028 }
1029 complete(&mcp->wait_in_report);
1030 break;
1031
1032 default:
1033 mcp->status = -EIO;
1034 complete(&mcp->wait_in_report);
1035 }
1036
1037 return 1;
1038}
1039
1040/* Device resource managed function for HID unregistration */
1041static void mcp2221_hid_unregister(void *ptr)
1042{
1043 struct hid_device *hdev = ptr;
1044
1045 hid_hw_close(hdev);
1046 hid_hw_stop(hdev);
1047}
1048
1049/* This is needed to be sure hid_hw_stop() isn't called twice by the subsystem */
1050static void mcp2221_remove(struct hid_device *hdev)
1051{
1052#if IS_REACHABLE(CONFIG_IIO)
1053 struct mcp2221 *mcp = hid_get_drvdata(hdev);
1054
1055 if (!gpio_mode_enforce)
1056 cancel_delayed_work_sync(&mcp->init_work);
1057#endif
1058}
1059
1060#if IS_REACHABLE(CONFIG_IIO)
1061static int mcp2221_read_raw(struct iio_dev *indio_dev,
1062 struct iio_chan_spec const *channel, int *val,
1063 int *val2, long mask)
1064{
1065 struct mcp2221_iio *priv = iio_priv(indio_dev);
1066 struct mcp2221 *mcp = priv->mcp;
1067 int ret;
1068
1069 if (mask == IIO_CHAN_INFO_SCALE) {
1070 if (channel->output)
1071 *val = 1 << mcp->dac_scale;
1072 else
1073 *val = 1 << mcp->adc_scale;
1074
1075 return IIO_VAL_INT;
1076 }
1077
1078 mutex_lock(&mcp->lock);
1079
1080 if (channel->output) {
1081 *val = mcp->dac_value;
1082 ret = IIO_VAL_INT;
1083 } else {
1084 /* Read ADC values */
1085 ret = mcp_chk_last_cmd_status(mcp);
1086
1087 if (!ret) {
1088 *val = le16_to_cpu((__force __le16) mcp->adc_values[channel->address]);
1089 if (*val >= BIT(10))
1090 ret = -EINVAL;
1091 else
1092 ret = IIO_VAL_INT;
1093 }
1094 }
1095
1096 mutex_unlock(&mcp->lock);
1097
1098 return ret;
1099}
1100
1101static int mcp2221_write_raw(struct iio_dev *indio_dev,
1102 struct iio_chan_spec const *chan,
1103 int val, int val2, long mask)
1104{
1105 struct mcp2221_iio *priv = iio_priv(indio_dev);
1106 struct mcp2221 *mcp = priv->mcp;
1107 int ret;
1108
1109 if (val < 0 || val >= BIT(5))
1110 return -EINVAL;
1111
1112 mutex_lock(&mcp->lock);
1113
1114 memset(mcp->txbuf, 0, 12);
1115 mcp->txbuf[0] = MCP2221_SET_SRAM_SETTINGS;
1116 mcp->txbuf[4] = BIT(7) | val;
1117
1118 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 12);
1119 if (!ret)
1120 mcp->dac_value = val;
1121
1122 mutex_unlock(&mcp->lock);
1123
1124 return ret;
1125}
1126
1127static const struct iio_info mcp2221_info = {
1128 .read_raw = &mcp2221_read_raw,
1129 .write_raw = &mcp2221_write_raw,
1130};
1131
1132static int mcp_iio_channels(struct mcp2221 *mcp)
1133{
1134 int idx, cnt = 0;
1135 bool dac_created = false;
1136
1137 /* GP0 doesn't have ADC/DAC alternative function */
1138 for (idx = 1; idx < MCP_NGPIO; idx++) {
1139 struct iio_chan_spec *chan = &mcp->iio_channels[cnt];
1140
1141 switch (mcp->mode[idx]) {
1142 case 2:
1143 chan->address = idx - 1;
1144 chan->channel = cnt++;
1145 break;
1146 case 3:
1147 /* GP1 doesn't have DAC alternative function */
1148 if (idx == 1 || dac_created)
1149 continue;
1150 /* DAC1 and DAC2 outputs are connected to the same DAC */
1151 dac_created = true;
1152 chan->output = 1;
1153 cnt++;
1154 break;
1155 default:
1156 continue;
1157 }
1158
1159 chan->type = IIO_VOLTAGE;
1160 chan->indexed = 1;
1161 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
1162 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
1163 chan->scan_index = -1;
1164 }
1165
1166 return cnt;
1167}
1168
1169static void mcp_init_work(struct work_struct *work)
1170{
1171 struct iio_dev *indio_dev;
1172 struct mcp2221 *mcp = container_of(work, struct mcp2221, init_work.work);
1173 struct mcp2221_iio *data;
1174 static int retries = 5;
1175 int ret, num_channels;
1176
1177 hid_hw_power(mcp->hdev, PM_HINT_FULLON);
1178 mutex_lock(&mcp->lock);
1179
1180 mcp->txbuf[0] = MCP2221_GET_SRAM_SETTINGS;
1181 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 1);
1182
1183 if (ret == -EAGAIN)
1184 goto reschedule_task;
1185
1186 num_channels = mcp_iio_channels(mcp);
1187 if (!num_channels)
1188 goto unlock;
1189
1190 mcp->txbuf[0] = MCP2221_READ_FLASH_DATA;
1191 mcp->txbuf[1] = 0;
1192 ret = mcp_send_data_req_status(mcp, mcp->txbuf, 2);
1193
1194 if (ret == -EAGAIN)
1195 goto reschedule_task;
1196
1197 indio_dev = devm_iio_device_alloc(&mcp->hdev->dev, sizeof(*data));
1198 if (!indio_dev)
1199 goto unlock;
1200
1201 data = iio_priv(indio_dev);
1202 data->mcp = mcp;
1203
1204 indio_dev->name = "mcp2221";
1205 indio_dev->modes = INDIO_DIRECT_MODE;
1206 indio_dev->info = &mcp2221_info;
1207 indio_dev->channels = mcp->iio_channels;
1208 indio_dev->num_channels = num_channels;
1209
1210 devm_iio_device_register(&mcp->hdev->dev, indio_dev);
1211
1212unlock:
1213 mutex_unlock(&mcp->lock);
1214 hid_hw_power(mcp->hdev, PM_HINT_NORMAL);
1215
1216 return;
1217
1218reschedule_task:
1219 mutex_unlock(&mcp->lock);
1220 hid_hw_power(mcp->hdev, PM_HINT_NORMAL);
1221
1222 if (!retries--)
1223 return;
1224
1225 /* Device is not ready to read SRAM or FLASH data, try again */
1226 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100));
1227}
1228#endif
1229
1230static int mcp2221_probe(struct hid_device *hdev,
1231 const struct hid_device_id *id)
1232{
1233 int ret;
1234 struct mcp2221 *mcp;
1235
1236 mcp = devm_kzalloc(&hdev->dev, sizeof(*mcp), GFP_KERNEL);
1237 if (!mcp)
1238 return -ENOMEM;
1239
1240 ret = hid_parse(hdev);
1241 if (ret) {
1242 hid_err(hdev, "can't parse reports\n");
1243 return ret;
1244 }
1245
1246 /*
1247 * This driver uses the .raw_event callback and therefore does not need any
1248 * HID_CONNECT_xxx flags.
1249 */
1250 ret = hid_hw_start(hdev, 0);
1251 if (ret) {
1252 hid_err(hdev, "can't start hardware\n");
1253 return ret;
1254 }
1255
1256 hid_info(hdev, "USB HID v%x.%02x Device [%s] on %s\n", hdev->version >> 8,
1257 hdev->version & 0xff, hdev->name, hdev->phys);
1258
1259 ret = hid_hw_open(hdev);
1260 if (ret) {
1261 hid_err(hdev, "can't open device\n");
1262 hid_hw_stop(hdev);
1263 return ret;
1264 }
1265
1266 mutex_init(&mcp->lock);
1267 init_completion(&mcp->wait_in_report);
1268 hid_set_drvdata(hdev, mcp);
1269 mcp->hdev = hdev;
1270
1271 ret = devm_add_action_or_reset(&hdev->dev, mcp2221_hid_unregister, hdev);
1272 if (ret)
1273 return ret;
1274
1275 hid_device_io_start(hdev);
1276
1277 /* Set I2C bus clock diviser */
1278 if (i2c_clk_freq > 400)
1279 i2c_clk_freq = 400;
1280 if (i2c_clk_freq < 50)
1281 i2c_clk_freq = 50;
1282 mcp->cur_i2c_clk_div = (12000000 / (i2c_clk_freq * 1000)) - 3;
1283 ret = mcp_set_i2c_speed(mcp);
1284 if (ret) {
1285 hid_err(hdev, "can't set i2c speed: %d\n", ret);
1286 return ret;
1287 }
1288
1289 mcp->adapter.owner = THIS_MODULE;
1290 mcp->adapter.class = I2C_CLASS_HWMON;
1291 mcp->adapter.algo = &mcp_i2c_algo;
1292 mcp->adapter.retries = 1;
1293 mcp->adapter.dev.parent = &hdev->dev;
1294 ACPI_COMPANION_SET(&mcp->adapter.dev, ACPI_COMPANION(hdev->dev.parent));
1295 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name),
1296 "MCP2221 usb-i2c bridge");
1297
1298 i2c_set_adapdata(&mcp->adapter, mcp);
1299 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter);
1300 if (ret) {
1301 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret);
1302 return ret;
1303 }
1304
1305#if IS_REACHABLE(CONFIG_GPIOLIB)
1306 /* Setup GPIO chip */
1307 mcp->gc = devm_kzalloc(&hdev->dev, sizeof(*mcp->gc), GFP_KERNEL);
1308 if (!mcp->gc)
1309 return -ENOMEM;
1310
1311 mcp->gc->label = "mcp2221_gpio";
1312 mcp->gc->direction_input = mcp_gpio_direction_input;
1313 mcp->gc->direction_output = mcp_gpio_direction_output;
1314 mcp->gc->get_direction = mcp_gpio_get_direction;
1315 mcp->gc->set = mcp_gpio_set;
1316 mcp->gc->get = mcp_gpio_get;
1317 mcp->gc->ngpio = MCP_NGPIO;
1318 mcp->gc->base = -1;
1319 mcp->gc->can_sleep = 1;
1320 mcp->gc->parent = &hdev->dev;
1321
1322 ret = devm_gpiochip_add_data(&hdev->dev, mcp->gc, mcp);
1323 if (ret)
1324 return ret;
1325
1326 mcp2221_check_gpio_pinfunc(mcp);
1327#endif
1328
1329#if IS_REACHABLE(CONFIG_IIO)
1330 if (!gpio_mode_enforce) {
1331 INIT_DELAYED_WORK(&mcp->init_work, mcp_init_work);
1332 schedule_delayed_work(&mcp->init_work, msecs_to_jiffies(100));
1333 }
1334#endif
1335
1336 return 0;
1337}
1338
1339static const struct hid_device_id mcp2221_devices[] = {
1340 { HID_USB_DEVICE(USB_VENDOR_ID_MICROCHIP, USB_DEVICE_ID_MCP2221) },
1341 { }
1342};
1343MODULE_DEVICE_TABLE(hid, mcp2221_devices);
1344
1345static struct hid_driver mcp2221_driver = {
1346 .name = "mcp2221",
1347 .id_table = mcp2221_devices,
1348 .probe = mcp2221_probe,
1349 .remove = mcp2221_remove,
1350 .raw_event = mcp2221_raw_event,
1351};
1352
1353/* Register with HID core */
1354module_hid_driver(mcp2221_driver);
1355
1356MODULE_AUTHOR("Rishi Gupta <gupt21@gmail.com>");
1357MODULE_DESCRIPTION("MCP2221 Microchip HID USB to I2C master bridge");
1358MODULE_LICENSE("GPL v2");