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1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2019 Intel Corporation
4 */
5
6#ifndef __INTEL_BW_H__
7#define __INTEL_BW_H__
8
9#include <drm/drm_atomic.h>
10
11struct intel_atomic_state;
12struct intel_bw_state;
13struct intel_crtc;
14struct intel_crtc_state;
15struct intel_display;
16struct intel_global_state;
17
18struct intel_bw_state *to_intel_bw_state(struct intel_global_state *obj_state);
19
20struct intel_bw_state *
21intel_atomic_get_old_bw_state(struct intel_atomic_state *state);
22
23struct intel_bw_state *
24intel_atomic_get_new_bw_state(struct intel_atomic_state *state);
25
26struct intel_bw_state *
27intel_atomic_get_bw_state(struct intel_atomic_state *state);
28
29void intel_bw_init_hw(struct intel_display *display);
30int intel_bw_init(struct intel_display *display);
31int intel_bw_atomic_check(struct intel_atomic_state *state);
32void intel_bw_update_hw_state(struct intel_display *display);
33void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc);
34
35bool intel_bw_pmdemand_needs_update(struct intel_atomic_state *state);
36bool intel_bw_can_enable_sagv(struct intel_display *display,
37 const struct intel_bw_state *bw_state);
38void icl_sagv_pre_plane_update(struct intel_atomic_state *state);
39void icl_sagv_post_plane_update(struct intel_atomic_state *state);
40int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state);
41
42#endif /* __INTEL_BW_H__ */