tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom
kernel / drivers / clk / Kconfig
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1# SPDX-License-Identifier: GPL-2.0 2 3config HAVE_CLK 4 bool 5 help 6 The <linux/clk.h> calls support software clock gating and 7 thus are a key power management tool on many systems. 8 9config HAVE_CLK_PREPARE 10 bool 11 12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated 13 bool 14 select HAVE_CLK 15 help 16 Select this option when the clock API in <linux/clk.h> is implemented 17 by platform/architecture code. This method is deprecated. Modern 18 code should select COMMON_CLK instead and not define a custom 19 'struct clk'. 20 21menuconfig COMMON_CLK 22 bool "Common Clock Framework" 23 depends on !HAVE_LEGACY_CLK 24 select HAVE_CLK_PREPARE 25 select HAVE_CLK 26 select RATIONAL 27 help 28 The common clock framework is a single definition of struct 29 clk, useful across many platforms, as well as an 30 implementation of the clock API in include/linux/clk.h. 31 Architectures utilizing the common struct clk should select 32 this option. 33 34if COMMON_CLK 35 36config COMMON_CLK_WM831X 37 tristate "Clock driver for WM831x/2x PMICs" 38 depends on MFD_WM831X 39 help 40 Supports the clocking subsystem of the WM831x/2x series of 41 PMICs from Wolfson Microelectronics. 42 43source "drivers/clk/versatile/Kconfig" 44 45config CLK_HSDK 46 bool "PLL Driver for HSDK platform" 47 depends on ARC_SOC_HSDK || COMPILE_TEST 48 depends on HAS_IOMEM 49 help 50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs 51 control. 52 53config LMK04832 54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 55 depends on SPI 56 select REGMAP_SPI 57 help 58 Say yes here to build support for Texas Instruments' LMK04832 Ultra 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 60 61config COMMON_CLK_APPLE_NCO 62 tristate "Clock driver for Apple SoC NCOs" 63 depends on ARCH_APPLE || COMPILE_TEST 64 help 65 This driver supports NCO (Numerically Controlled Oscillator) blocks 66 found on Apple SoCs such as t8103 (M1). The blocks are typically 67 generators of audio clocks. 68 69config COMMON_CLK_MAX77686 70 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 71 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST 72 help 73 This driver supports Maxim 77620/77686/77802 crystal oscillator 74 clock. 75 76config COMMON_CLK_MAX9485 77 tristate "Maxim 9485 Programmable Clock Generator" 78 depends on I2C 79 help 80 This driver supports Maxim 9485 Programmable Audio Clock Generator 81 82config COMMON_CLK_RK808 83 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 84 depends on MFD_RK8XX 85 help 86 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 88 Clkout1 is always on, Clkout2 can off by control register. 89 90config COMMON_CLK_RP1 91 tristate "Raspberry Pi RP1-based clock support" 92 depends on MISC_RP1 || COMPILE_TEST 93 default MISC_RP1 94 help 95 Enable common clock framework support for Raspberry Pi RP1. 96 This multi-function device has 3 main PLLs and several clock 97 generators to drive the internal sub-peripherals. 98 99config COMMON_CLK_HI655X 100 tristate "Clock driver for Hi655x" if EXPERT 101 depends on (MFD_HI655X_PMIC || COMPILE_TEST) 102 select REGMAP 103 default MFD_HI655X_PMIC 104 help 105 This driver supports the hi655x PMIC clock. This 106 multi-function device has one fixed-rate oscillator, clocked 107 at 32KHz. 108 109config COMMON_CLK_SCMI 110 tristate "Clock driver controlled via SCMI interface" 111 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 112 help 113 This driver provides support for clocks that are controlled 114 by firmware that implements the SCMI interface. 115 116 This driver uses SCMI Message Protocol to interact with the 117 firmware providing all the clock controls. 118 119config COMMON_CLK_SCPI 120 tristate "Clock driver controlled via SCPI interface" 121 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST 122 help 123 This driver provides support for clocks that are controlled 124 by firmware that implements the SCPI interface. 125 126 This driver uses SCPI Message Protocol to interact with the 127 firmware providing all the clock controls. 128 129config COMMON_CLK_SI5341 130 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices" 131 depends on I2C 132 select REGMAP_I2C 133 help 134 This driver supports Silicon Labs Si5341 and Si5340 programmable clock 135 generators. Not all features of these chips are currently supported 136 by the driver, in particular it only supports XTAL input. The chip can 137 be pre-programmed to support other configurations and features not yet 138 implemented in the driver. 139 140config COMMON_CLK_SI5351 141 tristate "Clock driver for SiLabs 5351A/B/C" 142 depends on I2C 143 select REGMAP_I2C 144 help 145 This driver supports Silicon Labs 5351A/B/C programmable clock 146 generators. 147 148config COMMON_CLK_SI514 149 tristate "Clock driver for SiLabs 514 devices" 150 depends on I2C 151 depends on OF 152 select REGMAP_I2C 153 help 154 This driver supports the Silicon Labs 514 programmable clock 155 generator. 156 157config COMMON_CLK_SI544 158 tristate "Clock driver for SiLabs 544 devices" 159 depends on I2C 160 select REGMAP_I2C 161 help 162 This driver supports the Silicon Labs 544 programmable clock 163 generator. 164 165config COMMON_CLK_SI570 166 tristate "Clock driver for SiLabs 570 and compatible devices" 167 depends on I2C 168 depends on OF 169 select REGMAP_I2C 170 help 171 This driver supports Silicon Labs 570/571/598/599 programmable 172 clock generators. 173 174config COMMON_CLK_BM1880 175 bool "Clock driver for Bitmain BM1880 SoC" 176 depends on ARCH_BITMAIN || COMPILE_TEST 177 default ARCH_BITMAIN 178 help 179 This driver supports the clocks on Bitmain BM1880 SoC. 180 181config COMMON_CLK_CDCE706 182 tristate "Clock driver for TI CDCE706 clock synthesizer" 183 depends on I2C 184 select REGMAP_I2C 185 help 186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 187 188config COMMON_CLK_TPS68470 189 tristate "Clock Driver for TI TPS68470 PMIC" 190 depends on I2C 191 depends on INTEL_SKL_INT3472 || COMPILE_TEST 192 select REGMAP_I2C 193 help 194 This driver supports the clocks provided by the TPS68470 PMIC. 195 196config COMMON_CLK_CDCE925 197 tristate "Clock driver for TI CDCE913/925/937/949 devices" 198 depends on I2C 199 depends on OF 200 select REGMAP_I2C 201 help 202 This driver supports the TI CDCE913/925/937/949 programmable clock 203 synthesizer. Each chip has different number of PLLs and outputs. 204 For example, the CDCE925 contains two PLLs with spread-spectrum 205 clocking support and five output dividers. The driver only supports 206 the following setup, and uses a fixed setting for the output muxes. 207 Y1 is derived from the input clock 208 Y2 and Y3 derive from PLL1 209 Y4 and Y5 derive from PLL2 210 Given a target output frequency, the driver will set the PLL and 211 divider to best approximate the desired output. 212 213config COMMON_CLK_CS2000_CP 214 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 215 depends on I2C 216 select REGMAP_I2C 217 help 218 If you say yes here you get support for the CS2000 clock multiplier. 219 220config COMMON_CLK_EN7523 221 bool "Clock driver for Airoha EN7523 SoC system clocks" 222 depends on OF 223 depends on ARCH_AIROHA || COMPILE_TEST 224 default ARCH_AIROHA 225 help 226 This driver provides the fixed clocks and gates present on Airoha 227 ARM silicon. 228 229config COMMON_CLK_EP93XX 230 tristate "Clock driver for Cirrus Logic ep93xx SoC" 231 depends on ARCH_EP93XX || COMPILE_TEST 232 select AUXILIARY_BUS 233 select REGMAP_MMIO 234 help 235 This driver supports the SoC clocks on the Cirrus Logic ep93xx. 236 237config COMMON_CLK_EYEQ 238 bool "Clock driver for the Mobileye EyeQ platform" 239 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST 240 select AUXILIARY_BUS 241 default MACH_EYEQ5 || MACH_EYEQ6H 242 help 243 This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H 244 SoCs. Controllers live in shared register regions called OLB. Driver 245 provides read-only PLLs, derived from the main crystal clock (which 246 must be constant). It also exposes some divider clocks. 247 248config COMMON_CLK_FSL_FLEXSPI 249 tristate "Clock driver for FlexSPI on Layerscape SoCs" 250 depends on ARCH_LAYERSCAPE || COMPILE_TEST 251 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI 252 help 253 On Layerscape SoCs there is a special clock for the FlexSPI 254 interface. 255 256config COMMON_CLK_FSL_SAI 257 bool "Clock driver for BCLK of Freescale SAI cores" 258 depends on ARCH_LAYERSCAPE || COMPILE_TEST 259 help 260 This driver supports the Freescale SAI (Synchronous Audio Interface) 261 to be used as a generic clock output. Some SoCs have restrictions 262 regarding the possible pin multiplexer settings. Eg. on some SoCs 263 two SAI interfaces can only be enabled together. If just one is 264 needed, the BCLK pin of the second one can be used as general 265 purpose clock output. Ideally, it can be used to drive an audio 266 codec (sometimes known as MCLK). 267 268config COMMON_CLK_GEMINI 269 bool "Clock driver for Cortina Systems Gemini SoC" 270 depends on ARCH_GEMINI || COMPILE_TEST 271 select MFD_SYSCON 272 select RESET_CONTROLLER 273 help 274 This driver supports the SoC clocks on the Cortina Systems Gemini 275 platform, also known as SL3516 or CS3516. 276 277config COMMON_CLK_LAN966X 278 tristate "Generic Clock Controller driver for LAN966X SoC" 279 depends on HAS_IOMEM 280 depends on OF 281 depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST 282 help 283 This driver provides support for Generic Clock Controller(GCK) on 284 LAN966X SoC. GCK generates and supplies clock to various peripherals 285 within the SoC. 286 287config COMMON_CLK_ASPEED 288 bool "Clock driver for Aspeed BMC SoCs" 289 depends on ARCH_ASPEED || COMPILE_TEST 290 default ARCH_ASPEED 291 select MFD_SYSCON 292 select RESET_CONTROLLER 293 help 294 This driver supports the SoC clocks on the Aspeed BMC platforms. 295 296 The G4 and G5 series, including the ast2400 and ast2500, are supported 297 by this driver. 298 299config COMMON_CLK_S2MPS11 300 tristate "Clock driver for S2MPS1X/S5M8767 MFD" 301 depends on MFD_SEC_CORE || COMPILE_TEST 302 help 303 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator 304 clock. These multi-function devices have two (S2MPS14) or three 305 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each. 306 307config CLK_TWL 308 tristate "Clock driver for the TWL PMIC family" 309 depends on TWL4030_CORE 310 help 311 Enable support for controlling the clock resources on TWL family 312 PMICs. These devices have some 32K clock outputs which can be 313 controlled by software. For now, the TWL6032 and TWL6030 clocks are 314 supported. 315 316config CLK_TWL6040 317 tristate "External McPDM functional clock from twl6040" 318 depends on TWL6040_CORE 319 help 320 Enable the external functional clock support on OMAP4+ platforms for 321 McPDM. McPDM module is using the external bit clock on the McPDM bus 322 as functional clock. 323 324config COMMON_CLK_AXI_CLKGEN 325 tristate "AXI clkgen driver" 326 depends on HAS_IOMEM || COMPILE_TEST 327 depends on OF 328 help 329 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 330 FPGAs. It is commonly used in Analog Devices' reference designs. 331 332config CLK_QORIQ 333 bool "Clock driver for Freescale QorIQ platforms" 334 depends on OF 335 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST 336 help 337 This adds the clock driver support for Freescale QorIQ platforms 338 using common clock framework. 339 340config CLK_LS1028A_PLLDIG 341 tristate "Clock driver for LS1028A Display output" 342 depends on ARCH_LAYERSCAPE || COMPILE_TEST 343 default ARCH_LAYERSCAPE 344 help 345 This driver support the Display output interfaces(LCD, DPHY) pixel clocks 346 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all 347 features of the PLL are currently supported by the driver. By default, 348 configured bypass mode with this PLL. 349 350config COMMON_CLK_XGENE 351 bool "Clock driver for APM XGene SoC" 352 default ARCH_XGENE 353 depends on ARM64 || COMPILE_TEST 354 help 355 Support for the APM X-Gene SoC reference, PLL, and device clocks. 356 357config COMMON_CLK_LOCHNAGAR 358 tristate "Cirrus Logic Lochnagar clock driver" 359 depends on MFD_LOCHNAGAR 360 help 361 This driver supports the clocking features of the Cirrus Logic 362 Lochnagar audio development board. 363 364config COMMON_CLK_NPCM8XX 365 tristate "Clock driver for the NPCM8XX SoC Family" 366 depends on ARCH_NPCM || COMPILE_TEST 367 select AUXILIARY_BUS 368 help 369 This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family, 370 all the clocks are initialized by the bootloader, so this driver 371 allows only reading of current settings directly from the hardware. 372 373config COMMON_CLK_LOONGSON2 374 bool "Clock driver for Loongson-2 SoC" 375 depends on LOONGARCH || COMPILE_TEST 376 help 377 This driver provides support for clock controller on Loongson-2 SoC. 378 The clock controller can generates and supplies clock to various 379 peripherals within the SoC. 380 Say Y here to support Loongson-2 SoC clock driver. 381 382config COMMON_CLK_NXP 383 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) 384 select REGMAP_MMIO if ARCH_LPC32XX 385 select MFD_SYSCON if ARCH_LPC18XX 386 help 387 Support for clock providers on NXP platforms. 388 389config COMMON_CLK_PALMAS 390 tristate "Clock driver for TI Palmas devices" 391 depends on MFD_PALMAS 392 help 393 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO 394 using common clock framework. 395 396config COMMON_CLK_PWM 397 tristate "Clock driver for PWMs used as clock outputs" 398 depends on PWM 399 help 400 Adapter driver so that any PWM output can be (mis)used as clock signal 401 at 50% duty cycle. 402 403config COMMON_CLK_PXA 404 def_bool COMMON_CLK && ARCH_PXA 405 help 406 Support for the Marvell PXA SoC. 407 408config COMMON_CLK_RS9_PCIE 409 tristate "Clock driver for Renesas 9-series PCIe clock generators" 410 depends on I2C 411 depends on OF 412 select REGMAP_I2C 413 help 414 This driver supports the Renesas 9-series PCIe clock generator 415 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ. 416 417config COMMON_CLK_SI521XX 418 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators" 419 depends on I2C 420 depends on OF 421 select REGMAP_I2C 422 help 423 This driver supports the SkyWorks Si521xx PCIe clock generator 424 models Si52144/Si52146/Si52147. 425 426config COMMON_CLK_VC3 427 tristate "Clock driver for Renesas VersaClock 3 devices" 428 depends on I2C 429 depends on OF 430 select REGMAP_I2C 431 help 432 This driver supports the Renesas VersaClock 3 programmable clock 433 generators. 434 435config COMMON_CLK_VC5 436 tristate "Clock driver for IDT VersaClock 5,6 devices" 437 depends on I2C 438 depends on OF 439 select REGMAP_I2C 440 help 441 This driver supports the IDT VersaClock 5 and VersaClock 6 442 programmable clock generators. 443 444config COMMON_CLK_VC7 445 tristate "Clock driver for Renesas Versaclock 7 devices" 446 depends on I2C 447 depends on OF 448 select REGMAP_I2C 449 help 450 Renesas Versaclock7 is a family of configurable clock generator 451 and jitter attenuator ICs with fractional and integer dividers. 452 453config COMMON_CLK_STM32F 454 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) 455 help 456 Support for stm32f4 and stm32f7 SoC families clocks 457 458config COMMON_CLK_STM32H7 459 def_bool COMMON_CLK && MACH_STM32H743 460 help 461 Support for stm32h7 SoC family clocks 462 463config COMMON_CLK_MMP2 464 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) 465 help 466 Support for Marvell MMP2 and MMP3 SoC clocks 467 468config COMMON_CLK_MMP2_AUDIO 469 tristate "Clock driver for MMP2 Audio subsystem" 470 depends on COMMON_CLK_MMP2 || COMPILE_TEST 471 help 472 This driver supports clocks for Audio subsystem on MMP2 SoC. 473 474config COMMON_CLK_BD718XX 475 tristate "Clock driver for 32K clk gates on ROHM PMICs" 476 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828 477 help 478 This driver supports ROHM BD71837, BD71847, BD71850, BD71815 479 and BD71828 PMICs clock gates. 480 481config COMMON_CLK_FIXED_MMIO 482 bool "Clock driver for Memory Mapped Fixed values" 483 depends on COMMON_CLK && OF 484 depends on HAS_IOMEM 485 help 486 Support for Memory Mapped IO Fixed clocks 487 488config COMMON_CLK_K210 489 bool "Clock driver for the Canaan Kendryte K210 SoC" 490 depends on OF && RISCV && SOC_CANAAN_K210 491 default SOC_CANAAN_K210 492 help 493 Support for the Canaan Kendryte K210 RISC-V SoC clocks. 494 495config COMMON_CLK_SP7021 496 tristate "Clock driver for Sunplus SP7021 SoC" 497 depends on SOC_SP7021 || COMPILE_TEST 498 default SOC_SP7021 499 help 500 This driver supports the Sunplus SP7021 SoC clocks. 501 It implements SP7021 PLLs/gate. 502 Not all features of the PLL are currently supported 503 by the driver. 504 505config COMMON_CLK_RPMI 506 tristate "Clock driver based on RISC-V RPMI" 507 depends on RISCV || COMPILE_TEST 508 depends on MAILBOX 509 default RISCV 510 help 511 Support for clocks based on the clock service group defined by 512 the RISC-V platform management interface (RPMI) specification. 513 514source "drivers/clk/actions/Kconfig" 515source "drivers/clk/analogbits/Kconfig" 516source "drivers/clk/baikal-t1/Kconfig" 517source "drivers/clk/bcm/Kconfig" 518source "drivers/clk/hisilicon/Kconfig" 519source "drivers/clk/imgtec/Kconfig" 520source "drivers/clk/imx/Kconfig" 521source "drivers/clk/ingenic/Kconfig" 522source "drivers/clk/keystone/Kconfig" 523source "drivers/clk/mediatek/Kconfig" 524source "drivers/clk/mmp/Kconfig" 525source "drivers/clk/meson/Kconfig" 526source "drivers/clk/mstar/Kconfig" 527source "drivers/clk/microchip/Kconfig" 528source "drivers/clk/mvebu/Kconfig" 529source "drivers/clk/nuvoton/Kconfig" 530source "drivers/clk/pistachio/Kconfig" 531source "drivers/clk/qcom/Kconfig" 532source "drivers/clk/ralink/Kconfig" 533source "drivers/clk/renesas/Kconfig" 534source "drivers/clk/rockchip/Kconfig" 535source "drivers/clk/samsung/Kconfig" 536source "drivers/clk/sifive/Kconfig" 537source "drivers/clk/socfpga/Kconfig" 538source "drivers/clk/sophgo/Kconfig" 539source "drivers/clk/spacemit/Kconfig" 540source "drivers/clk/sprd/Kconfig" 541source "drivers/clk/starfive/Kconfig" 542source "drivers/clk/sunxi/Kconfig" 543source "drivers/clk/sunxi-ng/Kconfig" 544source "drivers/clk/tegra/Kconfig" 545source "drivers/clk/thead/Kconfig" 546source "drivers/clk/stm32/Kconfig" 547source "drivers/clk/ti/Kconfig" 548source "drivers/clk/uniphier/Kconfig" 549source "drivers/clk/visconti/Kconfig" 550source "drivers/clk/x86/Kconfig" 551source "drivers/clk/xilinx/Kconfig" 552source "drivers/clk/zynqmp/Kconfig" 553 554# Kunit test cases 555config CLK_KUNIT_TEST 556 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS 557 depends on KUNIT 558 default KUNIT_ALL_TESTS 559 select DTC 560 help 561 Kunit tests for the common clock framework. 562 563config CLK_FIXED_RATE_KUNIT_TEST 564 tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS 565 depends on KUNIT 566 default KUNIT_ALL_TESTS 567 select DTC 568 help 569 KUnit tests for the basic fixed rate clk type. 570 571config CLK_GATE_KUNIT_TEST 572 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS 573 depends on KUNIT 574 depends on !S390 575 default KUNIT_ALL_TESTS 576 help 577 Kunit test for the basic clk gate type. 578 579config CLK_FD_KUNIT_TEST 580 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS 581 depends on KUNIT 582 default KUNIT_ALL_TESTS 583 help 584 Kunit test for the clk-fractional-divider type. 585 586endif