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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2000 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com)
4 * Copyright 2003 PathScale, Inc.
5 * Derived from include/asm-i386/pgtable.h
6 */
7
8#ifndef __UM_PGTABLE_H
9#define __UM_PGTABLE_H
10
11#include <asm/page.h>
12#include <linux/mm_types.h>
13
14#define _PAGE_PRESENT 0x001
15#define _PAGE_NEEDSYNC 0x002
16#define _PAGE_RW 0x020
17#define _PAGE_USER 0x040
18#define _PAGE_ACCESSED 0x080
19#define _PAGE_DIRTY 0x100
20/* If _PAGE_PRESENT is clear, we use these: */
21#define _PAGE_PROTNONE 0x010 /* if the user mapped it with PROT_NONE;
22 pte_present gives true */
23
24/* We borrow bit 10 to store the exclusive marker in swap PTEs. */
25#define _PAGE_SWP_EXCLUSIVE 0x400
26
27#if CONFIG_PGTABLE_LEVELS == 4
28#include <asm/pgtable-4level.h>
29#elif CONFIG_PGTABLE_LEVELS == 2
30#include <asm/pgtable-2level.h>
31#else
32#error "Unsupported number of page table levels"
33#endif
34
35extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
36
37/* zero page used for uninitialized stuff */
38extern unsigned long *empty_zero_page;
39
40/* Just any arbitrary offset to the start of the vmalloc VM area: the
41 * current 8MB value just means that there will be a 8MB "hole" after the
42 * physical memory until the kernel virtual memory starts. That means that
43 * any out-of-bounds memory accesses will hopefully be caught.
44 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
45 * area for the same reason. ;)
46 */
47
48#ifndef COMPILE_OFFSETS
49#include <as-layout.h> /* for high_physmem */
50#endif
51
52#define VMALLOC_OFFSET (__va_space)
53#define VMALLOC_START ((high_physmem + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
54#define VMALLOC_END (TASK_SIZE-2*PAGE_SIZE)
55#define MODULES_VADDR VMALLOC_START
56#define MODULES_END VMALLOC_END
57
58#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
59#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
60#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
61#define __PAGE_KERNEL_EXEC \
62 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
63#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
64#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED)
65#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
66#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
67#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED)
68#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
69
70/*
71 * The i386 can't do page protection for execute, and considers that the same
72 * are read.
73 * Also, write permissions imply read permissions. This is the closest we can
74 * get..
75 */
76
77/*
78 * ZERO_PAGE is a global shared page that is always zero: used
79 * for zero-mapped memory areas etc..
80 */
81#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
82
83#define pte_clear(mm, addr, xp) pte_set_val(*(xp), (phys_t) 0, __pgprot(_PAGE_NEEDSYNC))
84
85#define pmd_none(x) (!((unsigned long)pmd_val(x) & ~_PAGE_NEEDSYNC))
86#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
87
88#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
89#define pmd_clear(xp) do { pmd_val(*(xp)) = _PAGE_NEEDSYNC; } while (0)
90
91#define pmd_needsync(x) (pmd_val(x) & _PAGE_NEEDSYNC)
92#define pmd_mkuptodate(x) (pmd_val(x) &= ~_PAGE_NEEDSYNC)
93
94#define pud_needsync(x) (pud_val(x) & _PAGE_NEEDSYNC)
95#define pud_mkuptodate(x) (pud_val(x) &= ~_PAGE_NEEDSYNC)
96
97#define p4d_needsync(x) (p4d_val(x) & _PAGE_NEEDSYNC)
98#define p4d_mkuptodate(x) (p4d_val(x) &= ~_PAGE_NEEDSYNC)
99
100#define pmd_pfn(pmd) (pmd_val(pmd) >> PAGE_SHIFT)
101#define pmd_page(pmd) phys_to_page(pmd_val(pmd) & PAGE_MASK)
102
103#define pte_page(x) pfn_to_page(pte_pfn(x))
104
105#define pte_present(x) pte_get_bits(x, (_PAGE_PRESENT | _PAGE_PROTNONE))
106
107/*
108 * =================================
109 * Flags checking section.
110 * =================================
111 */
112
113static inline int pte_none(pte_t pte)
114{
115 return pte_is_zero(pte);
116}
117
118/*
119 * The following only work if pte_present() is true.
120 * Undefined behaviour if not..
121 */
122static inline int pte_read(pte_t pte)
123{
124 return((pte_get_bits(pte, _PAGE_USER)) &&
125 !(pte_get_bits(pte, _PAGE_PROTNONE)));
126}
127
128static inline int pte_exec(pte_t pte){
129 return((pte_get_bits(pte, _PAGE_USER)) &&
130 !(pte_get_bits(pte, _PAGE_PROTNONE)));
131}
132
133static inline int pte_write(pte_t pte)
134{
135 return((pte_get_bits(pte, _PAGE_RW)) &&
136 !(pte_get_bits(pte, _PAGE_PROTNONE)));
137}
138
139static inline int pte_dirty(pte_t pte)
140{
141 return pte_get_bits(pte, _PAGE_DIRTY);
142}
143
144static inline int pte_young(pte_t pte)
145{
146 return pte_get_bits(pte, _PAGE_ACCESSED);
147}
148
149static inline int pte_needsync(pte_t pte)
150{
151 return pte_get_bits(pte, _PAGE_NEEDSYNC);
152}
153
154/*
155 * =================================
156 * Flags setting section.
157 * =================================
158 */
159
160static inline pte_t pte_mkclean(pte_t pte)
161{
162 pte_clear_bits(pte, _PAGE_DIRTY);
163 return(pte);
164}
165
166static inline pte_t pte_mkold(pte_t pte)
167{
168 pte_clear_bits(pte, _PAGE_ACCESSED);
169 return(pte);
170}
171
172static inline pte_t pte_wrprotect(pte_t pte)
173{
174 pte_clear_bits(pte, _PAGE_RW);
175 return pte;
176}
177
178static inline pte_t pte_mkread(pte_t pte)
179{
180 pte_set_bits(pte, _PAGE_USER);
181 return pte;
182}
183
184static inline pte_t pte_mkdirty(pte_t pte)
185{
186 pte_set_bits(pte, _PAGE_DIRTY);
187 return(pte);
188}
189
190static inline pte_t pte_mkyoung(pte_t pte)
191{
192 pte_set_bits(pte, _PAGE_ACCESSED);
193 return(pte);
194}
195
196static inline pte_t pte_mkwrite_novma(pte_t pte)
197{
198 pte_set_bits(pte, _PAGE_RW);
199 return pte;
200}
201
202static inline pte_t pte_mkuptodate(pte_t pte)
203{
204 pte_clear_bits(pte, _PAGE_NEEDSYNC);
205 return pte;
206}
207
208static inline pte_t pte_mkneedsync(pte_t pte)
209{
210 pte_set_bits(pte, _PAGE_NEEDSYNC);
211 return(pte);
212}
213
214static inline void set_pte(pte_t *pteptr, pte_t pteval)
215{
216 pte_copy(*pteptr, pteval);
217
218 /* If it's a swap entry, it needs to be marked _PAGE_NEEDSYNC so
219 * update_pte_range knows to unmap it.
220 */
221
222 *pteptr = pte_mkneedsync(*pteptr);
223}
224
225#define PFN_PTE_SHIFT PAGE_SHIFT
226
227static inline void um_tlb_mark_sync(struct mm_struct *mm, unsigned long start,
228 unsigned long end)
229{
230 guard(spinlock_irqsave)(&mm->context.sync_tlb_lock);
231
232 if (!mm->context.sync_tlb_range_to) {
233 mm->context.sync_tlb_range_from = start;
234 mm->context.sync_tlb_range_to = end;
235 } else {
236 if (start < mm->context.sync_tlb_range_from)
237 mm->context.sync_tlb_range_from = start;
238 if (end > mm->context.sync_tlb_range_to)
239 mm->context.sync_tlb_range_to = end;
240 }
241}
242
243#define set_ptes set_ptes
244static inline void set_ptes(struct mm_struct *mm, unsigned long addr,
245 pte_t *ptep, pte_t pte, int nr)
246{
247 /* Basically the default implementation */
248 size_t length = nr * PAGE_SIZE;
249
250 for (;;) {
251 set_pte(ptep, pte);
252 if (--nr == 0)
253 break;
254 ptep++;
255 pte = __pte(pte_val(pte) + (nr << PFN_PTE_SHIFT));
256 }
257
258 um_tlb_mark_sync(mm, addr, addr + length);
259}
260
261#define __HAVE_ARCH_PTE_SAME
262static inline int pte_same(pte_t pte_a, pte_t pte_b)
263{
264 return !((pte_val(pte_a) ^ pte_val(pte_b)) & ~_PAGE_NEEDSYNC);
265}
266
267#define __virt_to_page(virt) phys_to_page(__pa(virt))
268#define virt_to_page(addr) __virt_to_page((const unsigned long) addr)
269
270static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
271{
272 pte_t pte;
273
274 pte_set_val(pte, pfn_to_phys(pfn), pgprot);
275
276 return pte;
277}
278
279static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
280{
281 pte_set_val(pte, (pte_val(pte) & _PAGE_CHG_MASK), newprot);
282 return pte;
283}
284
285/*
286 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
287 *
288 * this macro returns the index of the entry in the pmd page which would
289 * control the given virtual address
290 */
291#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
292
293struct mm_struct;
294extern pte_t *virt_to_pte(struct mm_struct *mm, unsigned long addr);
295
296#define update_mmu_cache(vma,address,ptep) do {} while (0)
297#define update_mmu_cache_range(vmf, vma, address, ptep, nr) do {} while (0)
298
299/*
300 * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
301 * are !pte_none() && !pte_present().
302 *
303 * Format of swap PTEs:
304 *
305 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
306 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
307 * <--------------- offset ----------------> E < type -> 0 0 0 1 0
308 *
309 * E is the exclusive marker that is not stored in swap entries.
310 * _PAGE_NEEDSYNC (bit 1) is always set to 1 in set_pte().
311 */
312#define __swp_type(x) (((x).val >> 5) & 0x1f)
313#define __swp_offset(x) ((x).val >> 11)
314
315#define __swp_entry(type, offset) \
316 ((swp_entry_t) { (((type) & 0x1f) << 5) | ((offset) << 11) })
317#define __pte_to_swp_entry(pte) \
318 ((swp_entry_t) { pte_val(pte_mkuptodate(pte)) })
319#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
320
321static inline bool pte_swp_exclusive(pte_t pte)
322{
323 return pte_get_bits(pte, _PAGE_SWP_EXCLUSIVE);
324}
325
326static inline pte_t pte_swp_mkexclusive(pte_t pte)
327{
328 pte_set_bits(pte, _PAGE_SWP_EXCLUSIVE);
329 return pte;
330}
331
332static inline pte_t pte_swp_clear_exclusive(pte_t pte)
333{
334 pte_clear_bits(pte, _PAGE_SWP_EXCLUSIVE);
335 return pte;
336}
337
338#endif