tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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kernel / arch / csky / Kconfig
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1# SPDX-License-Identifier: GPL-2.0-only 2config CSKY 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAS_DMA_PREP_COHERENT 7 select ARCH_HAS_GCOV_PROFILE_ALL 8 select ARCH_HAS_SYNC_DMA_FOR_CPU 9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 10 select ARCH_USE_BUILTIN_BSWAP 11 select ARCH_USE_QUEUED_RWLOCKS 12 select ARCH_USE_QUEUED_SPINLOCKS 13 select ARCH_HAS_CURRENT_STACK_POINTER 14 select ARCH_INLINE_READ_LOCK if !PREEMPTION 15 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION 16 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION 17 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION 18 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION 19 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION 20 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION 21 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION 22 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION 23 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION 24 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION 25 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION 26 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION 27 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION 28 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION 29 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION 30 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION 31 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION 32 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION 33 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION 34 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION 35 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION 36 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION 37 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION 38 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION 39 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION 40 select ARCH_NEED_CMPXCHG_1_EMU 41 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace) 42 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT 43 select COMMON_CLK 44 select CLKSRC_MMIO 45 select CSKY_MPINTC if CPU_CK860 46 select CSKY_MP_TIMER if CPU_CK860 47 select CSKY_APB_INTC 48 select DMA_DIRECT_REMAP 49 select IRQ_DOMAIN 50 select DW_APB_TIMER_OF 51 select GENERIC_IOREMAP 52 select GENERIC_LIB_ASHLDI3 53 select GENERIC_LIB_ASHRDI3 54 select GENERIC_LIB_LSHRDI3 55 select GENERIC_LIB_MULDI3 56 select GENERIC_LIB_CMPDI2 57 select GENERIC_LIB_UCMPDI2 58 select GENERIC_ALLOCATOR 59 select GENERIC_ATOMIC64 60 select GENERIC_CPU_DEVICES 61 select GENERIC_IRQ_CHIP 62 select GENERIC_IRQ_PROBE 63 select GENERIC_IRQ_SHOW 64 select GENERIC_IRQ_MULTI_HANDLER 65 select GENERIC_SCHED_CLOCK 66 select GENERIC_SMP_IDLE_THREAD 67 select GX6605S_TIMER if CPU_CK610 68 select HAVE_ARCH_TRACEHOOK 69 select HAVE_ARCH_AUDITSYSCALL 70 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610 71 select HAVE_ARCH_JUMP_LABEL_RELATIVE 72 select HAVE_ARCH_MMAP_RND_BITS 73 select HAVE_ARCH_SECCOMP_FILTER 74 select HAVE_CONTEXT_TRACKING_USER 75 select HAVE_VIRT_CPU_ACCOUNTING_GEN 76 select HAVE_DEBUG_BUGVERBOSE 77 select HAVE_DEBUG_KMEMLEAK 78 select HAVE_DYNAMIC_FTRACE 79 select HAVE_DYNAMIC_FTRACE_WITH_REGS 80 select HAVE_FUNCTION_TRACER 81 select HAVE_FUNCTION_GRAPH_TRACER 82 select HAVE_FUNCTION_ERROR_INJECTION 83 select HAVE_KERNEL_GZIP 84 select HAVE_KERNEL_LZO 85 select HAVE_KERNEL_LZMA 86 select HAVE_KPROBES if !CPU_CK610 87 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610 88 select HAVE_KRETPROBES if !CPU_CK610 89 select HAVE_PAGE_SIZE_4KB 90 select HAVE_PERF_EVENTS 91 select HAVE_PERF_REGS 92 select HAVE_PERF_USER_STACK_DUMP 93 select HAVE_DMA_CONTIGUOUS 94 select HAVE_REGS_AND_STACK_ACCESS_API 95 select HAVE_STACKPROTECTOR 96 select HAVE_SYSCALL_TRACEPOINTS 97 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU 98 select LOCK_MM_AND_FIND_VMA 99 select MAY_HAVE_SPARSE_IRQ 100 select MODULES_USE_ELF_RELA if MODULES 101 select OF 102 select OF_EARLY_FLATTREE 103 select PERF_USE_VMALLOC if CPU_CK610 104 select RTC_LIB 105 select TIMER_OF 106 select GENERIC_PCI_IOMAP 107 select HAVE_PCI 108 select PCI_DOMAINS_GENERIC if PCI 109 select PCI_SYSCALL if PCI 110 select PCI_MSI if PCI 111 select TRACE_IRQFLAGS_SUPPORT 112 113config LOCKDEP_SUPPORT 114 def_bool y 115 116config ARCH_SUPPORTS_UPROBES 117 def_bool y if !CPU_CK610 118 119config CPU_HAS_CACHEV2 120 bool 121 122config CPU_HAS_FPUV2 123 bool 124 125config CPU_HAS_HILO 126 bool 127 128config CPU_HAS_TLBI 129 bool 130 131config CPU_HAS_LDSTEX 132 bool 133 help 134 For SMP, CPU needs "ldex&stex" instructions for atomic operations. 135 136config CPU_NEED_TLBSYNC 137 bool 138 139config CPU_NEED_SOFTALIGN 140 bool 141 142config CPU_NO_USER_BKPT 143 bool 144 help 145 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because 146 abiv2 is 16/32bit instruction set and "trap 1" is 32bit. 147 So we need a 16bit instruction as user space bkpt, and it will cause an illegal 148 instruction exception. 149 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not. 150 151config GENERIC_CALIBRATE_DELAY 152 def_bool y 153 154config GENERIC_CSUM 155 def_bool y 156 157config GENERIC_HWEIGHT 158 def_bool y 159 160config MMU 161 def_bool y 162 163config STACKTRACE_SUPPORT 164 def_bool y 165 166config TIME_LOW_RES 167 def_bool y 168 169config CPU_ASID_BITS 170 int 171 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810) 172 default "12" if (CPU_CK860) 173 174config L1_CACHE_SHIFT 175 int 176 default "4" if (CPU_CK610) 177 default "5" if (CPU_CK807 || CPU_CK810) 178 default "6" if (CPU_CK860) 179 180config ARCH_MMAP_RND_BITS_MIN 181 default 8 182 183# max bits determined by the following formula: 184# VA_BITS - PAGE_SHIFT - 3 185config ARCH_MMAP_RND_BITS_MAX 186 default 17 187 188menu "Processor type and features" 189 190choice 191 prompt "CPU MODEL" 192 default CPU_CK807 193 194config CPU_CK610 195 bool "CSKY CPU ck610" 196 select CPU_NEED_TLBSYNC 197 select CPU_NEED_SOFTALIGN 198 select CPU_NO_USER_BKPT 199 200config CPU_CK810 201 bool "CSKY CPU ck810" 202 select CPU_HAS_HILO 203 select CPU_NEED_TLBSYNC 204 205config CPU_CK807 206 bool "CSKY CPU ck807" 207 select CPU_HAS_HILO 208 209config CPU_CK860 210 bool "CSKY CPU ck860" 211 select CPU_HAS_TLBI 212 select CPU_HAS_CACHEV2 213 select CPU_HAS_LDSTEX 214 select CPU_HAS_FPUV2 215endchoice 216 217choice 218 prompt "PAGE OFFSET" 219 default PAGE_OFFSET_80000000 220 221config PAGE_OFFSET_80000000 222 bool "PAGE OFFSET 2G (user:kernel = 2:2)" 223 224config PAGE_OFFSET_A0000000 225 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)" 226endchoice 227 228config PAGE_OFFSET 229 hex 230 default 0x80000000 if PAGE_OFFSET_80000000 231 default 0xa0000000 if PAGE_OFFSET_A0000000 232choice 233 234 prompt "C-SKY PMU type" 235 depends on PERF_EVENTS 236 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 237 238config CPU_PMU_NONE 239 bool "None" 240 241config CSKY_PMU_V1 242 bool "Performance Monitoring Unit Ver.1" 243 244endchoice 245 246choice 247 prompt "Power Manager Instruction (wait/doze/stop)" 248 default CPU_PM_NONE 249 250config CPU_PM_NONE 251 bool "None" 252 253config CPU_PM_WAIT 254 bool "wait" 255 256config CPU_PM_DOZE 257 bool "doze" 258 259config CPU_PM_STOP 260 bool "stop" 261endchoice 262 263menuconfig HAVE_TCM 264 bool "Tightly-Coupled/Sram Memory" 265 depends on !COMPILE_TEST 266 help 267 The implementation are not only used by TCM (Tightly-Coupled Memory) 268 but also used by sram on SOC bus. It follow existed linux tcm 269 software interface, so that old tcm application codes could be 270 re-used directly. 271 272if HAVE_TCM 273config ITCM_RAM_BASE 274 hex "ITCM ram base" 275 default 0xffffffff 276 277config ITCM_NR_PAGES 278 int "Page count of ITCM size: NR*4KB" 279 range 1 256 280 default 32 281 282config HAVE_DTCM 283 bool "DTCM Support" 284 285config DTCM_RAM_BASE 286 hex "DTCM ram base" 287 depends on HAVE_DTCM 288 default 0xffffffff 289 290config DTCM_NR_PAGES 291 int "Page count of DTCM size: NR*4KB" 292 depends on HAVE_DTCM 293 range 1 256 294 default 32 295endif 296 297config CPU_HAS_VDSP 298 bool "CPU has VDSP coprocessor" 299 depends on CPU_HAS_FPU && CPU_HAS_FPUV2 300 301config CPU_HAS_FPU 302 bool "CPU has FPU coprocessor" 303 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 304 305config CPU_HAS_ICACHE_INS 306 bool "CPU has Icache invalidate instructions" 307 depends on CPU_HAS_CACHEV2 308 309config CPU_HAS_TEE 310 bool "CPU has Trusted Execution Environment" 311 depends on CPU_CK810 312 313config SMP 314 bool "Symmetric Multi-Processing (SMP) support for C-SKY" 315 depends on CPU_CK860 316 default n 317 318config NR_CPUS 319 int "Maximum number of CPUs (2-32)" 320 range 2 32 321 depends on SMP 322 default "4" 323 324config HIGHMEM 325 bool "High Memory Support" 326 depends on !CPU_CK610 327 select KMAP_LOCAL 328 default y 329 330config DRAM_BASE 331 hex "DRAM start addr (the same with memory-section in dts)" 332 default 0x0 333 334config HOTPLUG_CPU 335 bool "Support for hot-pluggable CPUs" 336 select GENERIC_IRQ_MIGRATION 337 depends on SMP 338 help 339 Say Y here to allow turning CPUs off and on. CPUs can be 340 controlled through /sys/devices/system/cpu/cpu1/hotplug/target. 341 342 Say N if you want to disable CPU hotplug. 343 344config HAVE_EFFICIENT_UNALIGNED_STRING_OPS 345 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2" 346 depends on CPU_CK807 || CPU_CK810 || CPU_CK860 347 help 348 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could 349 deal with unaligned access by hardware. 350 351endmenu 352 353source "arch/csky/Kconfig.platforms" 354 355source "kernel/Kconfig.hz"