Linux kernel mirror (for testing)
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1.. SPDX-License-Identifier: GPL-2.0
2.. include:: <isonum.txt>
3
4=====================================================
5User Interface for Resource Control feature (resctrl)
6=====================================================
7
8:Copyright: |copy| 2016 Intel Corporation
9:Authors: - Fenghua Yu <fenghua.yu@intel.com>
10 - Tony Luck <tony.luck@intel.com>
11 - Vikas Shivappa <vikas.shivappa@intel.com>
12
13
14Intel refers to this feature as Intel Resource Director Technology(Intel(R) RDT).
15AMD refers to this feature as AMD Platform Quality of Service(AMD QoS).
16
17This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo
18flag bits:
19
20=============================================================== ================================
21RDT (Resource Director Technology) Allocation "rdt_a"
22CAT (Cache Allocation Technology) "cat_l3", "cat_l2"
23CDP (Code and Data Prioritization) "cdp_l3", "cdp_l2"
24CQM (Cache QoS Monitoring) "cqm_llc", "cqm_occup_llc"
25MBM (Memory Bandwidth Monitoring) "cqm_mbm_total", "cqm_mbm_local"
26MBA (Memory Bandwidth Allocation) "mba"
27SMBA (Slow Memory Bandwidth Allocation) ""
28BMEC (Bandwidth Monitoring Event Configuration) ""
29ABMC (Assignable Bandwidth Monitoring Counters) ""
30SDCIAE (Smart Data Cache Injection Allocation Enforcement) ""
31=============================================================== ================================
32
33Historically, new features were made visible by default in /proc/cpuinfo. This
34resulted in the feature flags becoming hard to parse by humans. Adding a new
35flag to /proc/cpuinfo should be avoided if user space can obtain information
36about the feature from resctrl's info directory.
37
38To use the feature mount the file system::
39
40 # mount -t resctrl resctrl [-o cdp[,cdpl2][,mba_MBps][,debug]] /sys/fs/resctrl
41
42mount options are:
43
44"cdp":
45 Enable code/data prioritization in L3 cache allocations.
46"cdpl2":
47 Enable code/data prioritization in L2 cache allocations.
48"mba_MBps":
49 Enable the MBA Software Controller(mba_sc) to specify MBA
50 bandwidth in MiBps
51"debug":
52 Make debug files accessible. Available debug files are annotated with
53 "Available only with debug option".
54
55L2 and L3 CDP are controlled separately.
56
57RDT features are orthogonal. A particular system may support only
58monitoring, only control, or both monitoring and control. Cache
59pseudo-locking is a unique way of using cache control to "pin" or
60"lock" data in the cache. Details can be found in
61"Cache Pseudo-Locking".
62
63
64The mount succeeds if either of allocation or monitoring is present, but
65only those files and directories supported by the system will be created.
66For more details on the behavior of the interface during monitoring
67and allocation, see the "Resource alloc and monitor groups" section.
68
69Info directory
70==============
71
72The 'info' directory contains information about the enabled
73resources. Each resource has its own subdirectory. The subdirectory
74names reflect the resource names.
75
76Most of the files in the resource's subdirectory are read-only, and
77describe properties of the resource. Resources that support global
78configuration options also include writable files that can be used
79to modify those settings.
80
81Each subdirectory contains the following files with respect to
82allocation:
83
84Cache resource(L3/L2) subdirectory contains the following files
85related to allocation:
86
87"num_closids":
88 The number of CLOSIDs which are valid for this
89 resource. The kernel uses the smallest number of
90 CLOSIDs of all enabled resources as limit.
91"cbm_mask":
92 The bitmask which is valid for this resource.
93 This mask is equivalent to 100%.
94"min_cbm_bits":
95 The minimum number of consecutive bits which
96 must be set when writing a mask.
97
98"shareable_bits":
99 Bitmask of shareable resource with other executing entities
100 (e.g. I/O). Applies to all instances of this resource. User
101 can use this when setting up exclusive cache partitions.
102 Note that some platforms support devices that have their
103 own settings for cache use which can over-ride these bits.
104
105 When "io_alloc" is enabled, a portion of each cache instance can
106 be configured for shared use between hardware and software.
107 "bit_usage" should be used to see which portions of each cache
108 instance is configured for hardware use via "io_alloc" feature
109 because every cache instance can have its "io_alloc" bitmask
110 configured independently via "io_alloc_cbm".
111
112"bit_usage":
113 Annotated capacity bitmasks showing how all
114 instances of the resource are used. The legend is:
115
116 "0":
117 Corresponding region is unused. When the system's
118 resources have been allocated and a "0" is found
119 in "bit_usage" it is a sign that resources are
120 wasted.
121
122 "H":
123 Corresponding region is used by hardware only
124 but available for software use. If a resource
125 has bits set in "shareable_bits" or "io_alloc_cbm"
126 but not all of these bits appear in the resource
127 groups' schemata then the bits appearing in
128 "shareable_bits" or "io_alloc_cbm" but no
129 resource group will be marked as "H".
130 "X":
131 Corresponding region is available for sharing and
132 used by hardware and software. These are the bits
133 that appear in "shareable_bits" or "io_alloc_cbm"
134 as well as a resource group's allocation.
135 "S":
136 Corresponding region is used by software
137 and available for sharing.
138 "E":
139 Corresponding region is used exclusively by
140 one resource group. No sharing allowed.
141 "P":
142 Corresponding region is pseudo-locked. No
143 sharing allowed.
144"sparse_masks":
145 Indicates if non-contiguous 1s value in CBM is supported.
146
147 "0":
148 Only contiguous 1s value in CBM is supported.
149 "1":
150 Non-contiguous 1s value in CBM is supported.
151
152"io_alloc":
153 "io_alloc" enables system software to configure the portion of
154 the cache allocated for I/O traffic. File may only exist if the
155 system supports this feature on some of its cache resources.
156
157 "disabled":
158 Resource supports "io_alloc" but the feature is disabled.
159 Portions of cache used for allocation of I/O traffic cannot
160 be configured.
161 "enabled":
162 Portions of cache used for allocation of I/O traffic
163 can be configured using "io_alloc_cbm".
164 "not supported":
165 Support not available for this resource.
166
167 The feature can be modified by writing to the interface, for example:
168
169 To enable::
170
171 # echo 1 > /sys/fs/resctrl/info/L3/io_alloc
172
173 To disable::
174
175 # echo 0 > /sys/fs/resctrl/info/L3/io_alloc
176
177 The underlying implementation may reduce resources available to
178 general (CPU) cache allocation. See architecture specific notes
179 below. Depending on usage requirements the feature can be enabled
180 or disabled.
181
182 On AMD systems, io_alloc feature is supported by the L3 Smart
183 Data Cache Injection Allocation Enforcement (SDCIAE). The CLOSID for
184 io_alloc is the highest CLOSID supported by the resource. When
185 io_alloc is enabled, the highest CLOSID is dedicated to io_alloc and
186 no longer available for general (CPU) cache allocation. When CDP is
187 enabled, io_alloc routes I/O traffic using the highest CLOSID allocated
188 for the instruction cache (CDP_CODE), making this CLOSID no longer
189 available for general (CPU) cache allocation for both the CDP_CODE
190 and CDP_DATA resources.
191
192"io_alloc_cbm":
193 Capacity bitmasks that describe the portions of cache instances to
194 which I/O traffic from supported I/O devices are routed when "io_alloc"
195 is enabled.
196
197 CBMs are displayed in the following format:
198
199 <cache_id0>=<cbm>;<cache_id1>=<cbm>;...
200
201 Example::
202
203 # cat /sys/fs/resctrl/info/L3/io_alloc_cbm
204 0=ffff;1=ffff
205
206 CBMs can be configured by writing to the interface.
207
208 Example::
209
210 # echo 1=ff > /sys/fs/resctrl/info/L3/io_alloc_cbm
211 # cat /sys/fs/resctrl/info/L3/io_alloc_cbm
212 0=ffff;1=00ff
213
214 # echo "0=ff;1=f" > /sys/fs/resctrl/info/L3/io_alloc_cbm
215 # cat /sys/fs/resctrl/info/L3/io_alloc_cbm
216 0=00ff;1=000f
217
218 When CDP is enabled "io_alloc_cbm" associated with the CDP_DATA and CDP_CODE
219 resources may reflect the same values. For example, values read from and
220 written to /sys/fs/resctrl/info/L3DATA/io_alloc_cbm may be reflected by
221 /sys/fs/resctrl/info/L3CODE/io_alloc_cbm and vice versa.
222
223Memory bandwidth(MB) subdirectory contains the following files
224with respect to allocation:
225
226"min_bandwidth":
227 The minimum memory bandwidth percentage which
228 user can request.
229
230"bandwidth_gran":
231 The granularity in which the memory bandwidth
232 percentage is allocated. The allocated
233 b/w percentage is rounded off to the next
234 control step available on the hardware. The
235 available bandwidth control steps are:
236 min_bandwidth + N * bandwidth_gran.
237
238"delay_linear":
239 Indicates if the delay scale is linear or
240 non-linear. This field is purely informational
241 only.
242
243"thread_throttle_mode":
244 Indicator on Intel systems of how tasks running on threads
245 of a physical core are throttled in cases where they
246 request different memory bandwidth percentages:
247
248 "max":
249 the smallest percentage is applied
250 to all threads
251 "per-thread":
252 bandwidth percentages are directly applied to
253 the threads running on the core
254
255If L3 monitoring is available there will be an "L3_MON" directory
256with the following files:
257
258"num_rmids":
259 The number of RMIDs supported by hardware for
260 L3 monitoring events.
261
262"mon_features":
263 Lists the monitoring events if
264 monitoring is enabled for the resource.
265 Example::
266
267 # cat /sys/fs/resctrl/info/L3_MON/mon_features
268 llc_occupancy
269 mbm_total_bytes
270 mbm_local_bytes
271
272 If the system supports Bandwidth Monitoring Event
273 Configuration (BMEC), then the bandwidth events will
274 be configurable. The output will be::
275
276 # cat /sys/fs/resctrl/info/L3_MON/mon_features
277 llc_occupancy
278 mbm_total_bytes
279 mbm_total_bytes_config
280 mbm_local_bytes
281 mbm_local_bytes_config
282
283"mbm_total_bytes_config", "mbm_local_bytes_config":
284 Read/write files containing the configuration for the mbm_total_bytes
285 and mbm_local_bytes events, respectively, when the Bandwidth
286 Monitoring Event Configuration (BMEC) feature is supported.
287 The event configuration settings are domain specific and affect
288 all the CPUs in the domain. When either event configuration is
289 changed, the bandwidth counters for all RMIDs of both events
290 (mbm_total_bytes as well as mbm_local_bytes) are cleared for that
291 domain. The next read for every RMID will report "Unavailable"
292 and subsequent reads will report the valid value.
293
294 Following are the types of events supported:
295
296 ==== ========================================================
297 Bits Description
298 ==== ========================================================
299 6 Dirty Victims from the QOS domain to all types of memory
300 5 Reads to slow memory in the non-local NUMA domain
301 4 Reads to slow memory in the local NUMA domain
302 3 Non-temporal writes to non-local NUMA domain
303 2 Non-temporal writes to local NUMA domain
304 1 Reads to memory in the non-local NUMA domain
305 0 Reads to memory in the local NUMA domain
306 ==== ========================================================
307
308 By default, the mbm_total_bytes configuration is set to 0x7f to count
309 all the event types and the mbm_local_bytes configuration is set to
310 0x15 to count all the local memory events.
311
312 Examples:
313
314 * To view the current configuration::
315 ::
316
317 # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config
318 0=0x7f;1=0x7f;2=0x7f;3=0x7f
319
320 # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config
321 0=0x15;1=0x15;3=0x15;4=0x15
322
323 * To change the mbm_total_bytes to count only reads on domain 0,
324 the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary
325 (in hexadecimal 0x33):
326 ::
327
328 # echo "0=0x33" > /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config
329
330 # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config
331 0=0x33;1=0x7f;2=0x7f;3=0x7f
332
333 * To change the mbm_local_bytes to count all the slow memory reads on
334 domain 0 and 1, the bits 4 and 5 needs to be set, which is 110000b
335 in binary (in hexadecimal 0x30):
336 ::
337
338 # echo "0=0x30;1=0x30" > /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config
339
340 # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config
341 0=0x30;1=0x30;3=0x15;4=0x15
342
343"mbm_assign_mode":
344 The supported counter assignment modes. The enclosed brackets indicate which mode
345 is enabled. The MBM events associated with counters may reset when "mbm_assign_mode"
346 is changed.
347 ::
348
349 # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
350 [mbm_event]
351 default
352
353 "mbm_event":
354
355 mbm_event mode allows users to assign a hardware counter to an RMID, event
356 pair and monitor the bandwidth usage as long as it is assigned. The hardware
357 continues to track the assigned counter until it is explicitly unassigned by
358 the user. Each event within a resctrl group can be assigned independently.
359
360 In this mode, a monitoring event can only accumulate data while it is backed
361 by a hardware counter. Use "mbm_L3_assignments" found in each CTRL_MON and MON
362 group to specify which of the events should have a counter assigned. The number
363 of counters available is described in the "num_mbm_cntrs" file. Changing the
364 mode may cause all counters on the resource to reset.
365
366 Moving to mbm_event counter assignment mode requires users to assign the counters
367 to the events. Otherwise, the MBM event counters will return 'Unassigned' when read.
368
369 The mode is beneficial for AMD platforms that support more CTRL_MON
370 and MON groups than available hardware counters. By default, this
371 feature is enabled on AMD platforms with the ABMC (Assignable Bandwidth
372 Monitoring Counters) capability, ensuring counters remain assigned even
373 when the corresponding RMID is not actively used by any processor.
374
375 "default":
376
377 In default mode, resctrl assumes there is a hardware counter for each
378 event within every CTRL_MON and MON group. On AMD platforms, it is
379 recommended to use the mbm_event mode, if supported, to prevent reset of MBM
380 events between reads resulting from hardware re-allocating counters. This can
381 result in misleading values or display "Unavailable" if no counter is assigned
382 to the event.
383
384 * To enable "mbm_event" counter assignment mode:
385 ::
386
387 # echo "mbm_event" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
388
389 * To enable "default" monitoring mode:
390 ::
391
392 # echo "default" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
393
394"num_mbm_cntrs":
395 The maximum number of counters (total of available and assigned counters) in
396 each domain when the system supports mbm_event mode.
397
398 For example, on a system with maximum of 32 memory bandwidth monitoring
399 counters in each of its L3 domains:
400 ::
401
402 # cat /sys/fs/resctrl/info/L3_MON/num_mbm_cntrs
403 0=32;1=32
404
405"available_mbm_cntrs":
406 The number of counters available for assignment in each domain when mbm_event
407 mode is enabled on the system.
408
409 For example, on a system with 30 available [hardware] assignable counters
410 in each of its L3 domains:
411 ::
412
413 # cat /sys/fs/resctrl/info/L3_MON/available_mbm_cntrs
414 0=30;1=30
415
416"event_configs":
417 Directory that exists when "mbm_event" counter assignment mode is supported.
418 Contains a sub-directory for each MBM event that can be assigned to a counter.
419
420 Two MBM events are supported by default: mbm_local_bytes and mbm_total_bytes.
421 Each MBM event's sub-directory contains a file named "event_filter" that is
422 used to view and modify which memory transactions the MBM event is configured
423 with. The file is accessible only when "mbm_event" counter assignment mode is
424 enabled.
425
426 List of memory transaction types supported:
427
428 ========================== ========================================================
429 Name Description
430 ========================== ========================================================
431 dirty_victim_writes_all Dirty Victims from the QOS domain to all types of memory
432 remote_reads_slow_memory Reads to slow memory in the non-local NUMA domain
433 local_reads_slow_memory Reads to slow memory in the local NUMA domain
434 remote_non_temporal_writes Non-temporal writes to non-local NUMA domain
435 local_non_temporal_writes Non-temporal writes to local NUMA domain
436 remote_reads Reads to memory in the non-local NUMA domain
437 local_reads Reads to memory in the local NUMA domain
438 ========================== ========================================================
439
440 For example::
441
442 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter
443 local_reads,remote_reads,local_non_temporal_writes,remote_non_temporal_writes,
444 local_reads_slow_memory,remote_reads_slow_memory,dirty_victim_writes_all
445
446 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter
447 local_reads,local_non_temporal_writes,local_reads_slow_memory
448
449 Modify the event configuration by writing to the "event_filter" file within
450 the "event_configs" directory. The read/write "event_filter" file contains the
451 configuration of the event that reflects which memory transactions are counted by it.
452
453 For example::
454
455 # echo "local_reads, local_non_temporal_writes" >
456 /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter
457
458 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter
459 local_reads,local_non_temporal_writes
460
461"mbm_assign_on_mkdir":
462 Exists when "mbm_event" counter assignment mode is supported. Accessible
463 only when "mbm_event" counter assignment mode is enabled.
464
465 Determines if a counter will automatically be assigned to an RMID, MBM event
466 pair when its associated monitor group is created via mkdir. Enabled by default
467 on boot, also when switched from "default" mode to "mbm_event" counter assignment
468 mode. Users can disable this capability by writing to the interface.
469
470 "0":
471 Auto assignment is disabled.
472 "1":
473 Auto assignment is enabled.
474
475 Example::
476
477 # echo 0 > /sys/fs/resctrl/info/L3_MON/mbm_assign_on_mkdir
478 # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_on_mkdir
479 0
480
481"max_threshold_occupancy":
482 Read/write file provides the largest value (in
483 bytes) at which a previously used LLC_occupancy
484 counter can be considered for reuse.
485
486If telemetry monitoring is available there will be a "PERF_PKG_MON" directory
487with the following files:
488
489"num_rmids":
490 The number of RMIDs for telemetry monitoring events.
491
492 On Intel resctrl will not enable telemetry events if the number of
493 RMIDs that can be tracked concurrently is lower than the total number
494 of RMIDs supported. Telemetry events can be force-enabled with the
495 "rdt=" kernel parameter, but this may reduce the number of
496 monitoring groups that can be created.
497
498"mon_features":
499 Lists the telemetry monitoring events that are enabled on this system.
500
501The upper bound for how many "CTRL_MON" + "MON" can be created
502is the smaller of the L3_MON and PERF_PKG_MON "num_rmids" values.
503
504Finally, in the top level of the "info" directory there is a file
505named "last_cmd_status". This is reset with every "command" issued
506via the file system (making new directories or writing to any of the
507control files). If the command was successful, it will read as "ok".
508If the command failed, it will provide more information that can be
509conveyed in the error returns from file operations. E.g.
510::
511
512 # echo L3:0=f7 > schemata
513 bash: echo: write error: Invalid argument
514 # cat info/last_cmd_status
515 mask f7 has non-consecutive 1-bits
516
517Resource alloc and monitor groups
518=================================
519
520Resource groups are represented as directories in the resctrl file
521system. The default group is the root directory which, immediately
522after mounting, owns all the tasks and cpus in the system and can make
523full use of all resources.
524
525On a system with RDT control features additional directories can be
526created in the root directory that specify different amounts of each
527resource (see "schemata" below). The root and these additional top level
528directories are referred to as "CTRL_MON" groups below.
529
530On a system with RDT monitoring the root directory and other top level
531directories contain a directory named "mon_groups" in which additional
532directories can be created to monitor subsets of tasks in the CTRL_MON
533group that is their ancestor. These are called "MON" groups in the rest
534of this document.
535
536Removing a directory will move all tasks and cpus owned by the group it
537represents to the parent. Removing one of the created CTRL_MON groups
538will automatically remove all MON groups below it.
539
540Moving MON group directories to a new parent CTRL_MON group is supported
541for the purpose of changing the resource allocations of a MON group
542without impacting its monitoring data or assigned tasks. This operation
543is not allowed for MON groups which monitor CPUs. No other move
544operation is currently allowed other than simply renaming a CTRL_MON or
545MON group.
546
547All groups contain the following files:
548
549"tasks":
550 Reading this file shows the list of all tasks that belong to
551 this group. Writing a task id to the file will add a task to the
552 group. Multiple tasks can be added by separating the task ids
553 with commas. Tasks will be assigned sequentially. Multiple
554 failures are not supported. A single failure encountered while
555 attempting to assign a task will cause the operation to abort and
556 already added tasks before the failure will remain in the group.
557 Failures will be logged to /sys/fs/resctrl/info/last_cmd_status.
558
559 If the group is a CTRL_MON group the task is removed from
560 whichever previous CTRL_MON group owned the task and also from
561 any MON group that owned the task. If the group is a MON group,
562 then the task must already belong to the CTRL_MON parent of this
563 group. The task is removed from any previous MON group.
564
565
566"cpus":
567 Reading this file shows a bitmask of the logical CPUs owned by
568 this group. Writing a mask to this file will add and remove
569 CPUs to/from this group. As with the tasks file a hierarchy is
570 maintained where MON groups may only include CPUs owned by the
571 parent CTRL_MON group.
572 When the resource group is in pseudo-locked mode this file will
573 only be readable, reflecting the CPUs associated with the
574 pseudo-locked region.
575
576
577"cpus_list":
578 Just like "cpus", only using ranges of CPUs instead of bitmasks.
579
580
581When control is enabled all CTRL_MON groups will also contain:
582
583"schemata":
584 A list of all the resources available to this group.
585 Each resource has its own line and format - see below for details.
586
587"size":
588 Mirrors the display of the "schemata" file to display the size in
589 bytes of each allocation instead of the bits representing the
590 allocation.
591
592"mode":
593 The "mode" of the resource group dictates the sharing of its
594 allocations. A "shareable" resource group allows sharing of its
595 allocations while an "exclusive" resource group does not. A
596 cache pseudo-locked region is created by first writing
597 "pseudo-locksetup" to the "mode" file before writing the cache
598 pseudo-locked region's schemata to the resource group's "schemata"
599 file. On successful pseudo-locked region creation the mode will
600 automatically change to "pseudo-locked".
601
602"ctrl_hw_id":
603 Available only with debug option. The identifier used by hardware
604 for the control group. On x86 this is the CLOSID.
605
606When monitoring is enabled all MON groups will also contain:
607
608"mon_data":
609 This contains directories for each monitor domain.
610
611 If L3 monitoring is enabled, there will be a "mon_L3_XX" directory for
612 each instance of an L3 cache. Each directory contains files for the enabled
613 L3 events (e.g. "llc_occupancy", "mbm_total_bytes", and "mbm_local_bytes").
614
615 If telemetry monitoring is enabled, there will be a "mon_PERF_PKG_YY"
616 directory for each physical processor package. Each directory contains
617 files for the enabled telemetry events (e.g. "core_energy". "activity",
618 "uops_retired", etc.)
619
620 The info/`*`/mon_features files provide the full list of enabled
621 event/file names.
622
623 "core energy" reports a floating point number for the energy (in Joules)
624 consumed by cores (registers, arithmetic units, TLB and L1/L2 caches)
625 during execution of instructions summed across all logical CPUs on a
626 package for the current monitoring group.
627
628 "activity" also reports a floating point value (in Farads). This provides
629 an estimate of work done independent of the frequency that the CPUs used
630 for execution.
631
632 Note that "core energy" and "activity" only measure energy/activity in the
633 "core" of the CPU (arithmetic units, TLB, L1 and L2 caches, etc.). They
634 do not include L3 cache, memory, I/O devices etc.
635
636 All other events report decimal integer values.
637
638 In a MON group these files provide a read out of the current value of
639 the event for all tasks in the group. In CTRL_MON groups these files
640 provide the sum for all tasks in the CTRL_MON group and all tasks in
641 MON groups. Please see example section for more details on usage.
642
643 On systems with Sub-NUMA Cluster (SNC) enabled there are extra
644 directories for each node (located within the "mon_L3_XX" directory
645 for the L3 cache they occupy). These are named "mon_sub_L3_YY"
646 where "YY" is the node number.
647
648 When the 'mbm_event' counter assignment mode is enabled, reading
649 an MBM event of a MON group returns 'Unassigned' if no hardware
650 counter is assigned to it. For CTRL_MON groups, 'Unassigned' is
651 returned if the MBM event does not have an assigned counter in the
652 CTRL_MON group nor in any of its associated MON groups.
653
654"mon_hw_id":
655 Available only with debug option. The identifier used by hardware
656 for the monitor group. On x86 this is the RMID.
657
658When monitoring is enabled all MON groups may also contain:
659
660"mbm_L3_assignments":
661 Exists when "mbm_event" counter assignment mode is supported and lists the
662 counter assignment states of the group.
663
664 The assignment list is displayed in the following format:
665
666 <Event>:<Domain ID>=<Assignment state>;<Domain ID>=<Assignment state>
667
668 Event: A valid MBM event in the
669 /sys/fs/resctrl/info/L3_MON/event_configs directory.
670
671 Domain ID: A valid domain ID. When writing, '*' applies the changes
672 to all the domains.
673
674 Assignment states:
675
676 _ : No counter assigned.
677
678 e : Counter assigned exclusively.
679
680 Example:
681
682 To display the counter assignment states for the default group.
683 ::
684
685 # cd /sys/fs/resctrl
686 # cat /sys/fs/resctrl/mbm_L3_assignments
687 mbm_total_bytes:0=e;1=e
688 mbm_local_bytes:0=e;1=e
689
690 Assignments can be modified by writing to the interface.
691
692 Examples:
693
694 To unassign the counter associated with the mbm_total_bytes event on domain 0:
695 ::
696
697 # echo "mbm_total_bytes:0=_" > /sys/fs/resctrl/mbm_L3_assignments
698 # cat /sys/fs/resctrl/mbm_L3_assignments
699 mbm_total_bytes:0=_;1=e
700 mbm_local_bytes:0=e;1=e
701
702 To unassign the counter associated with the mbm_total_bytes event on all the domains:
703 ::
704
705 # echo "mbm_total_bytes:*=_" > /sys/fs/resctrl/mbm_L3_assignments
706 # cat /sys/fs/resctrl/mbm_L3_assignments
707 mbm_total_bytes:0=_;1=_
708 mbm_local_bytes:0=e;1=e
709
710 To assign a counter associated with the mbm_total_bytes event on all domains in
711 exclusive mode:
712 ::
713
714 # echo "mbm_total_bytes:*=e" > /sys/fs/resctrl/mbm_L3_assignments
715 # cat /sys/fs/resctrl/mbm_L3_assignments
716 mbm_total_bytes:0=e;1=e
717 mbm_local_bytes:0=e;1=e
718
719When the "mba_MBps" mount option is used all CTRL_MON groups will also contain:
720
721"mba_MBps_event":
722 Reading this file shows which memory bandwidth event is used
723 as input to the software feedback loop that keeps memory bandwidth
724 below the value specified in the schemata file. Writing the
725 name of one of the supported memory bandwidth events found in
726 /sys/fs/resctrl/info/L3_MON/mon_features changes the input
727 event.
728
729Resource allocation rules
730-------------------------
731
732When a task is running the following rules define which resources are
733available to it:
734
7351) If the task is a member of a non-default group, then the schemata
736 for that group is used.
737
7382) Else if the task belongs to the default group, but is running on a
739 CPU that is assigned to some specific group, then the schemata for the
740 CPU's group is used.
741
7423) Otherwise the schemata for the default group is used.
743
744Resource monitoring rules
745-------------------------
7461) If a task is a member of a MON group, or non-default CTRL_MON group
747 then RDT events for the task will be reported in that group.
748
7492) If a task is a member of the default CTRL_MON group, but is running
750 on a CPU that is assigned to some specific group, then the RDT events
751 for the task will be reported in that group.
752
7533) Otherwise RDT events for the task will be reported in the root level
754 "mon_data" group.
755
756
757Notes on cache occupancy monitoring and control
758===============================================
759When moving a task from one group to another you should remember that
760this only affects *new* cache allocations by the task. E.g. you may have
761a task in a monitor group showing 3 MB of cache occupancy. If you move
762to a new group and immediately check the occupancy of the old and new
763groups you will likely see that the old group is still showing 3 MB and
764the new group zero. When the task accesses locations still in cache from
765before the move, the h/w does not update any counters. On a busy system
766you will likely see the occupancy in the old group go down as cache lines
767are evicted and re-used while the occupancy in the new group rises as
768the task accesses memory and loads into the cache are counted based on
769membership in the new group.
770
771The same applies to cache allocation control. Moving a task to a group
772with a smaller cache partition will not evict any cache lines. The
773process may continue to use them from the old partition.
774
775Hardware uses CLOSid(Class of service ID) and an RMID(Resource monitoring ID)
776to identify a control group and a monitoring group respectively. Each of
777the resource groups are mapped to these IDs based on the kind of group. The
778number of CLOSid and RMID are limited by the hardware and hence the creation of
779a "CTRL_MON" directory may fail if we run out of either CLOSID or RMID
780and creation of "MON" group may fail if we run out of RMIDs.
781
782max_threshold_occupancy - generic concepts
783------------------------------------------
784
785Note that an RMID once freed may not be immediately available for use as
786the RMID is still tagged the cache lines of the previous user of RMID.
787Hence such RMIDs are placed on limbo list and checked back if the cache
788occupancy has gone down. If there is a time when system has a lot of
789limbo RMIDs but which are not ready to be used, user may see an -EBUSY
790during mkdir.
791
792max_threshold_occupancy is a user configurable value to determine the
793occupancy at which an RMID can be freed.
794
795The mon_llc_occupancy_limbo tracepoint gives the precise occupancy in bytes
796for a subset of RMID that are not immediately available for allocation.
797This can't be relied on to produce output every second, it may be necessary
798to attempt to create an empty monitor group to force an update. Output may
799only be produced if creation of a control or monitor group fails.
800
801Schemata files - general concepts
802---------------------------------
803Each line in the file describes one resource. The line starts with
804the name of the resource, followed by specific values to be applied
805in each of the instances of that resource on the system.
806
807Cache IDs
808---------
809On current generation systems there is one L3 cache per socket and L2
810caches are generally just shared by the hyperthreads on a core, but this
811isn't an architectural requirement. We could have multiple separate L3
812caches on a socket, multiple cores could share an L2 cache. So instead
813of using "socket" or "core" to define the set of logical cpus sharing
814a resource we use a "Cache ID". At a given cache level this will be a
815unique number across the whole system (but it isn't guaranteed to be a
816contiguous sequence, there may be gaps). To find the ID for each logical
817CPU look in /sys/devices/system/cpu/cpu*/cache/index*/id
818
819Cache Bit Masks (CBM)
820---------------------
821For cache resources we describe the portion of the cache that is available
822for allocation using a bitmask. The maximum value of the mask is defined
823by each cpu model (and may be different for different cache levels). It
824is found using CPUID, but is also provided in the "info" directory of
825the resctrl file system in "info/{resource}/cbm_mask". Some Intel hardware
826requires that these masks have all the '1' bits in a contiguous block. So
8270x3, 0x6 and 0xC are legal 4-bit masks with two bits set, but 0x5, 0x9
828and 0xA are not. Check /sys/fs/resctrl/info/{resource}/sparse_masks
829if non-contiguous 1s value is supported. On a system with a 20-bit mask
830each bit represents 5% of the capacity of the cache. You could partition
831the cache into four equal parts with masks: 0x1f, 0x3e0, 0x7c00, 0xf8000.
832
833Notes on Sub-NUMA Cluster mode
834==============================
835When SNC mode is enabled, Linux may load balance tasks between Sub-NUMA
836nodes much more readily than between regular NUMA nodes since the CPUs
837on Sub-NUMA nodes share the same L3 cache and the system may report
838the NUMA distance between Sub-NUMA nodes with a lower value than used
839for regular NUMA nodes.
840
841The top-level monitoring files in each "mon_L3_XX" directory provide
842the sum of data across all SNC nodes sharing an L3 cache instance.
843Users who bind tasks to the CPUs of a specific Sub-NUMA node can read
844the "llc_occupancy", "mbm_total_bytes", and "mbm_local_bytes" in the
845"mon_sub_L3_YY" directories to get node local data.
846
847Memory bandwidth allocation is still performed at the L3 cache
848level. I.e. throttling controls are applied to all SNC nodes.
849
850L3 cache allocation bitmaps also apply to all SNC nodes. But note that
851the amount of L3 cache represented by each bit is divided by the number
852of SNC nodes per L3 cache. E.g. with a 100MB cache on a system with 10-bit
853allocation masks each bit normally represents 10MB. With SNC mode enabled
854with two SNC nodes per L3 cache, each bit only represents 5MB.
855
856Memory bandwidth Allocation and monitoring
857==========================================
858
859For Memory bandwidth resource, by default the user controls the resource
860by indicating the percentage of total memory bandwidth.
861
862The minimum bandwidth percentage value for each cpu model is predefined
863and can be looked up through "info/MB/min_bandwidth". The bandwidth
864granularity that is allocated is also dependent on the cpu model and can
865be looked up at "info/MB/bandwidth_gran". The available bandwidth
866control steps are: min_bw + N * bw_gran. Intermediate values are rounded
867to the next control step available on the hardware.
868
869The bandwidth throttling is a core specific mechanism on some of Intel
870SKUs. Using a high bandwidth and a low bandwidth setting on two threads
871sharing a core may result in both threads being throttled to use the
872low bandwidth (see "thread_throttle_mode").
873
874The fact that Memory bandwidth allocation(MBA) may be a core
875specific mechanism where as memory bandwidth monitoring(MBM) is done at
876the package level may lead to confusion when users try to apply control
877via the MBA and then monitor the bandwidth to see if the controls are
878effective. Below are such scenarios:
879
8801. User may *not* see increase in actual bandwidth when percentage
881 values are increased:
882
883This can occur when aggregate L2 external bandwidth is more than L3
884external bandwidth. Consider an SKL SKU with 24 cores on a package and
885where L2 external is 10GBps (hence aggregate L2 external bandwidth is
886240GBps) and L3 external bandwidth is 100GBps. Now a workload with '20
887threads, having 50% bandwidth, each consuming 5GBps' consumes the max L3
888bandwidth of 100GBps although the percentage value specified is only 50%
889<< 100%. Hence increasing the bandwidth percentage will not yield any
890more bandwidth. This is because although the L2 external bandwidth still
891has capacity, the L3 external bandwidth is fully used. Also note that
892this would be dependent on number of cores the benchmark is run on.
893
8942. Same bandwidth percentage may mean different actual bandwidth
895 depending on # of threads:
896
897For the same SKU in #1, a 'single thread, with 10% bandwidth' and '4
898thread, with 10% bandwidth' can consume up to 10GBps and 40GBps although
899they have same percentage bandwidth of 10%. This is simply because as
900threads start using more cores in an rdtgroup, the actual bandwidth may
901increase or vary although user specified bandwidth percentage is same.
902
903In order to mitigate this and make the interface more user friendly,
904resctrl added support for specifying the bandwidth in MiBps as well. The
905kernel underneath would use a software feedback mechanism or a "Software
906Controller(mba_sc)" which reads the actual bandwidth using MBM counters
907and adjust the memory bandwidth percentages to ensure::
908
909 "actual bandwidth < user specified bandwidth".
910
911By default, the schemata would take the bandwidth percentage values
912where as user can switch to the "MBA software controller" mode using
913a mount option 'mba_MBps'. The schemata format is specified in the below
914sections.
915
916L3 schemata file details (code and data prioritization disabled)
917----------------------------------------------------------------
918With CDP disabled the L3 schemata format is::
919
920 L3:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
921
922L3 schemata file details (CDP enabled via mount option to resctrl)
923------------------------------------------------------------------
924When CDP is enabled L3 control is split into two separate resources
925so you can specify independent masks for code and data like this::
926
927 L3DATA:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
928 L3CODE:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
929
930L2 schemata file details
931------------------------
932CDP is supported at L2 using the 'cdpl2' mount option. The schemata
933format is either::
934
935 L2:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
936
937or
938
939 L2DATA:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
940 L2CODE:<cache_id0>=<cbm>;<cache_id1>=<cbm>;...
941
942
943Memory bandwidth Allocation (default mode)
944------------------------------------------
945
946Memory b/w domain is L3 cache.
947::
948
949 MB:<cache_id0>=bandwidth0;<cache_id1>=bandwidth1;...
950
951Memory bandwidth Allocation specified in MiBps
952----------------------------------------------
953
954Memory bandwidth domain is L3 cache.
955::
956
957 MB:<cache_id0>=bw_MiBps0;<cache_id1>=bw_MiBps1;...
958
959Slow Memory Bandwidth Allocation (SMBA)
960---------------------------------------
961AMD hardware supports Slow Memory Bandwidth Allocation (SMBA).
962CXL.memory is the only supported "slow" memory device. With the
963support of SMBA, the hardware enables bandwidth allocation on
964the slow memory devices. If there are multiple such devices in
965the system, the throttling logic groups all the slow sources
966together and applies the limit on them as a whole.
967
968The presence of SMBA (with CXL.memory) is independent of slow memory
969devices presence. If there are no such devices on the system, then
970configuring SMBA will have no impact on the performance of the system.
971
972The bandwidth domain for slow memory is L3 cache. Its schemata file
973is formatted as:
974::
975
976 SMBA:<cache_id0>=bandwidth0;<cache_id1>=bandwidth1;...
977
978Reading/writing the schemata file
979---------------------------------
980Reading the schemata file will show the state of all resources
981on all domains. When writing you only need to specify those values
982which you wish to change. E.g.
983::
984
985 # cat schemata
986 L3DATA:0=fffff;1=fffff;2=fffff;3=fffff
987 L3CODE:0=fffff;1=fffff;2=fffff;3=fffff
988 # echo "L3DATA:2=3c0;" > schemata
989 # cat schemata
990 L3DATA:0=fffff;1=fffff;2=3c0;3=fffff
991 L3CODE:0=fffff;1=fffff;2=fffff;3=fffff
992
993Reading/writing the schemata file (on AMD systems)
994--------------------------------------------------
995Reading the schemata file will show the current bandwidth limit on all
996domains. The allocated resources are in multiples of one eighth GB/s.
997When writing to the file, you need to specify what cache id you wish to
998configure the bandwidth limit.
999
1000For example, to allocate 2GB/s limit on the first cache id:
1001
1002::
1003
1004 # cat schemata
1005 MB:0=2048;1=2048;2=2048;3=2048
1006 L3:0=ffff;1=ffff;2=ffff;3=ffff
1007
1008 # echo "MB:1=16" > schemata
1009 # cat schemata
1010 MB:0=2048;1= 16;2=2048;3=2048
1011 L3:0=ffff;1=ffff;2=ffff;3=ffff
1012
1013Reading/writing the schemata file (on AMD systems) with SMBA feature
1014--------------------------------------------------------------------
1015Reading and writing the schemata file is the same as without SMBA in
1016above section.
1017
1018For example, to allocate 8GB/s limit on the first cache id:
1019
1020::
1021
1022 # cat schemata
1023 SMBA:0=2048;1=2048;2=2048;3=2048
1024 MB:0=2048;1=2048;2=2048;3=2048
1025 L3:0=ffff;1=ffff;2=ffff;3=ffff
1026
1027 # echo "SMBA:1=64" > schemata
1028 # cat schemata
1029 SMBA:0=2048;1= 64;2=2048;3=2048
1030 MB:0=2048;1=2048;2=2048;3=2048
1031 L3:0=ffff;1=ffff;2=ffff;3=ffff
1032
1033Cache Pseudo-Locking
1034====================
1035CAT enables a user to specify the amount of cache space that an
1036application can fill. Cache pseudo-locking builds on the fact that a
1037CPU can still read and write data pre-allocated outside its current
1038allocated area on a cache hit. With cache pseudo-locking, data can be
1039preloaded into a reserved portion of cache that no application can
1040fill, and from that point on will only serve cache hits. The cache
1041pseudo-locked memory is made accessible to user space where an
1042application can map it into its virtual address space and thus have
1043a region of memory with reduced average read latency.
1044
1045The creation of a cache pseudo-locked region is triggered by a request
1046from the user to do so that is accompanied by a schemata of the region
1047to be pseudo-locked. The cache pseudo-locked region is created as follows:
1048
1049- Create a CAT allocation CLOSNEW with a CBM matching the schemata
1050 from the user of the cache region that will contain the pseudo-locked
1051 memory. This region must not overlap with any current CAT allocation/CLOS
1052 on the system and no future overlap with this cache region is allowed
1053 while the pseudo-locked region exists.
1054- Create a contiguous region of memory of the same size as the cache
1055 region.
1056- Flush the cache, disable hardware prefetchers, disable preemption.
1057- Make CLOSNEW the active CLOS and touch the allocated memory to load
1058 it into the cache.
1059- Set the previous CLOS as active.
1060- At this point the closid CLOSNEW can be released - the cache
1061 pseudo-locked region is protected as long as its CBM does not appear in
1062 any CAT allocation. Even though the cache pseudo-locked region will from
1063 this point on not appear in any CBM of any CLOS an application running with
1064 any CLOS will be able to access the memory in the pseudo-locked region since
1065 the region continues to serve cache hits.
1066- The contiguous region of memory loaded into the cache is exposed to
1067 user-space as a character device.
1068
1069Cache pseudo-locking increases the probability that data will remain
1070in the cache via carefully configuring the CAT feature and controlling
1071application behavior. There is no guarantee that data is placed in
1072cache. Instructions like INVD, WBINVD, CLFLUSH, etc. can still evict
1073“locked” data from cache. Power management C-states may shrink or
1074power off cache. Deeper C-states will automatically be restricted on
1075pseudo-locked region creation.
1076
1077It is required that an application using a pseudo-locked region runs
1078with affinity to the cores (or a subset of the cores) associated
1079with the cache on which the pseudo-locked region resides. A sanity check
1080within the code will not allow an application to map pseudo-locked memory
1081unless it runs with affinity to cores associated with the cache on which the
1082pseudo-locked region resides. The sanity check is only done during the
1083initial mmap() handling, there is no enforcement afterwards and the
1084application self needs to ensure it remains affine to the correct cores.
1085
1086Pseudo-locking is accomplished in two stages:
1087
10881) During the first stage the system administrator allocates a portion
1089 of cache that should be dedicated to pseudo-locking. At this time an
1090 equivalent portion of memory is allocated, loaded into allocated
1091 cache portion, and exposed as a character device.
10922) During the second stage a user-space application maps (mmap()) the
1093 pseudo-locked memory into its address space.
1094
1095Cache Pseudo-Locking Interface
1096------------------------------
1097A pseudo-locked region is created using the resctrl interface as follows:
1098
10991) Create a new resource group by creating a new directory in /sys/fs/resctrl.
11002) Change the new resource group's mode to "pseudo-locksetup" by writing
1101 "pseudo-locksetup" to the "mode" file.
11023) Write the schemata of the pseudo-locked region to the "schemata" file. All
1103 bits within the schemata should be "unused" according to the "bit_usage"
1104 file.
1105
1106On successful pseudo-locked region creation the "mode" file will contain
1107"pseudo-locked" and a new character device with the same name as the resource
1108group will exist in /dev/pseudo_lock. This character device can be mmap()'ed
1109by user space in order to obtain access to the pseudo-locked memory region.
1110
1111An example of cache pseudo-locked region creation and usage can be found below.
1112
1113Cache Pseudo-Locking Debugging Interface
1114----------------------------------------
1115The pseudo-locking debugging interface is enabled by default (if
1116CONFIG_DEBUG_FS is enabled) and can be found in /sys/kernel/debug/resctrl.
1117
1118There is no explicit way for the kernel to test if a provided memory
1119location is present in the cache. The pseudo-locking debugging interface uses
1120the tracing infrastructure to provide two ways to measure cache residency of
1121the pseudo-locked region:
1122
11231) Memory access latency using the pseudo_lock_mem_latency tracepoint. Data
1124 from these measurements are best visualized using a hist trigger (see
1125 example below). In this test the pseudo-locked region is traversed at
1126 a stride of 32 bytes while hardware prefetchers and preemption
1127 are disabled. This also provides a substitute visualization of cache
1128 hits and misses.
11292) Cache hit and miss measurements using model specific precision counters if
1130 available. Depending on the levels of cache on the system the pseudo_lock_l2
1131 and pseudo_lock_l3 tracepoints are available.
1132
1133When a pseudo-locked region is created a new debugfs directory is created for
1134it in debugfs as /sys/kernel/debug/resctrl/<newdir>. A single
1135write-only file, pseudo_lock_measure, is present in this directory. The
1136measurement of the pseudo-locked region depends on the number written to this
1137debugfs file:
1138
11391:
1140 writing "1" to the pseudo_lock_measure file will trigger the latency
1141 measurement captured in the pseudo_lock_mem_latency tracepoint. See
1142 example below.
11432:
1144 writing "2" to the pseudo_lock_measure file will trigger the L2 cache
1145 residency (cache hits and misses) measurement captured in the
1146 pseudo_lock_l2 tracepoint. See example below.
11473:
1148 writing "3" to the pseudo_lock_measure file will trigger the L3 cache
1149 residency (cache hits and misses) measurement captured in the
1150 pseudo_lock_l3 tracepoint.
1151
1152All measurements are recorded with the tracing infrastructure. This requires
1153the relevant tracepoints to be enabled before the measurement is triggered.
1154
1155Example of latency debugging interface
1156~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1157In this example a pseudo-locked region named "newlock" was created. Here is
1158how we can measure the latency in cycles of reading from this region and
1159visualize this data with a histogram that is available if CONFIG_HIST_TRIGGERS
1160is set::
1161
1162 # :> /sys/kernel/tracing/trace
1163 # echo 'hist:keys=latency' > /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/trigger
1164 # echo 1 > /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/enable
1165 # echo 1 > /sys/kernel/debug/resctrl/newlock/pseudo_lock_measure
1166 # echo 0 > /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/enable
1167 # cat /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/hist
1168
1169 # event histogram
1170 #
1171 # trigger info: hist:keys=latency:vals=hitcount:sort=hitcount:size=2048 [active]
1172 #
1173
1174 { latency: 456 } hitcount: 1
1175 { latency: 50 } hitcount: 83
1176 { latency: 36 } hitcount: 96
1177 { latency: 44 } hitcount: 174
1178 { latency: 48 } hitcount: 195
1179 { latency: 46 } hitcount: 262
1180 { latency: 42 } hitcount: 693
1181 { latency: 40 } hitcount: 3204
1182 { latency: 38 } hitcount: 3484
1183
1184 Totals:
1185 Hits: 8192
1186 Entries: 9
1187 Dropped: 0
1188
1189Example of cache hits/misses debugging
1190~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1191In this example a pseudo-locked region named "newlock" was created on the L2
1192cache of a platform. Here is how we can obtain details of the cache hits
1193and misses using the platform's precision counters.
1194::
1195
1196 # :> /sys/kernel/tracing/trace
1197 # echo 1 > /sys/kernel/tracing/events/resctrl/pseudo_lock_l2/enable
1198 # echo 2 > /sys/kernel/debug/resctrl/newlock/pseudo_lock_measure
1199 # echo 0 > /sys/kernel/tracing/events/resctrl/pseudo_lock_l2/enable
1200 # cat /sys/kernel/tracing/trace
1201
1202 # tracer: nop
1203 #
1204 # _-----=> irqs-off
1205 # / _----=> need-resched
1206 # | / _---=> hardirq/softirq
1207 # || / _--=> preempt-depth
1208 # ||| / delay
1209 # TASK-PID CPU# |||| TIMESTAMP FUNCTION
1210 # | | | |||| | |
1211 pseudo_lock_mea-1672 [002] .... 3132.860500: pseudo_lock_l2: hits=4097 miss=0
1212
1213
1214Examples for RDT allocation usage
1215~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1216
12171) Example 1
1218
1219On a two socket machine (one L3 cache per socket) with just four bits
1220for cache bit masks, minimum b/w of 10% with a memory bandwidth
1221granularity of 10%.
1222::
1223
1224 # mount -t resctrl resctrl /sys/fs/resctrl
1225 # cd /sys/fs/resctrl
1226 # mkdir p0 p1
1227 # echo "L3:0=3;1=c\nMB:0=50;1=50" > /sys/fs/resctrl/p0/schemata
1228 # echo "L3:0=3;1=3\nMB:0=50;1=50" > /sys/fs/resctrl/p1/schemata
1229
1230The default resource group is unmodified, so we have access to all parts
1231of all caches (its schemata file reads "L3:0=f;1=f").
1232
1233Tasks that are under the control of group "p0" may only allocate from the
1234"lower" 50% on cache ID 0, and the "upper" 50% of cache ID 1.
1235Tasks in group "p1" use the "lower" 50% of cache on both sockets.
1236
1237Similarly, tasks that are under the control of group "p0" may use a
1238maximum memory b/w of 50% on socket0 and 50% on socket 1.
1239Tasks in group "p1" may also use 50% memory b/w on both sockets.
1240Note that unlike cache masks, memory b/w cannot specify whether these
1241allocations can overlap or not. The allocations specifies the maximum
1242b/w that the group may be able to use and the system admin can configure
1243the b/w accordingly.
1244
1245If resctrl is using the software controller (mba_sc) then user can enter the
1246max b/w in MB rather than the percentage values.
1247::
1248
1249 # echo "L3:0=3;1=c\nMB:0=1024;1=500" > /sys/fs/resctrl/p0/schemata
1250 # echo "L3:0=3;1=3\nMB:0=1024;1=500" > /sys/fs/resctrl/p1/schemata
1251
1252In the above example the tasks in "p1" and "p0" on socket 0 would use a max b/w
1253of 1024MB where as on socket 1 they would use 500MB.
1254
12552) Example 2
1256
1257Again two sockets, but this time with a more realistic 20-bit mask.
1258
1259Two real time tasks pid=1234 running on processor 0 and pid=5678 running on
1260processor 1 on socket 0 on a 2-socket and dual core machine. To avoid noisy
1261neighbors, each of the two real-time tasks exclusively occupies one quarter
1262of L3 cache on socket 0.
1263::
1264
1265 # mount -t resctrl resctrl /sys/fs/resctrl
1266 # cd /sys/fs/resctrl
1267
1268First we reset the schemata for the default group so that the "upper"
126950% of the L3 cache on socket 0 and 50% of memory b/w cannot be used by
1270ordinary tasks::
1271
1272 # echo "L3:0=3ff;1=fffff\nMB:0=50;1=100" > schemata
1273
1274Next we make a resource group for our first real time task and give
1275it access to the "top" 25% of the cache on socket 0.
1276::
1277
1278 # mkdir p0
1279 # echo "L3:0=f8000;1=fffff" > p0/schemata
1280
1281Finally we move our first real time task into this resource group. We
1282also use taskset(1) to ensure the task always runs on a dedicated CPU
1283on socket 0. Most uses of resource groups will also constrain which
1284processors tasks run on.
1285::
1286
1287 # echo 1234 > p0/tasks
1288 # taskset -cp 1 1234
1289
1290Ditto for the second real time task (with the remaining 25% of cache)::
1291
1292 # mkdir p1
1293 # echo "L3:0=7c00;1=fffff" > p1/schemata
1294 # echo 5678 > p1/tasks
1295 # taskset -cp 2 5678
1296
1297For the same 2 socket system with memory b/w resource and CAT L3 the
1298schemata would look like(Assume min_bandwidth 10 and bandwidth_gran is
129910):
1300
1301For our first real time task this would request 20% memory b/w on socket 0.
1302::
1303
1304 # echo -e "L3:0=f8000;1=fffff\nMB:0=20;1=100" > p0/schemata
1305
1306For our second real time task this would request an other 20% memory b/w
1307on socket 0.
1308::
1309
1310 # echo -e "L3:0=f8000;1=fffff\nMB:0=20;1=100" > p0/schemata
1311
13123) Example 3
1313
1314A single socket system which has real-time tasks running on core 4-7 and
1315non real-time workload assigned to core 0-3. The real-time tasks share text
1316and data, so a per task association is not required and due to interaction
1317with the kernel it's desired that the kernel on these cores shares L3 with
1318the tasks.
1319::
1320
1321 # mount -t resctrl resctrl /sys/fs/resctrl
1322 # cd /sys/fs/resctrl
1323
1324First we reset the schemata for the default group so that the "upper"
132550% of the L3 cache on socket 0, and 50% of memory bandwidth on socket 0
1326cannot be used by ordinary tasks::
1327
1328 # echo "L3:0=3ff\nMB:0=50" > schemata
1329
1330Next we make a resource group for our real time cores and give it access
1331to the "top" 50% of the cache on socket 0 and 50% of memory bandwidth on
1332socket 0.
1333::
1334
1335 # mkdir p0
1336 # echo "L3:0=ffc00\nMB:0=50" > p0/schemata
1337
1338Finally we move core 4-7 over to the new group and make sure that the
1339kernel and the tasks running there get 50% of the cache. They should
1340also get 50% of memory bandwidth assuming that the cores 4-7 are SMT
1341siblings and only the real time threads are scheduled on the cores 4-7.
1342::
1343
1344 # echo F0 > p0/cpus
1345
13464) Example 4
1347
1348The resource groups in previous examples were all in the default "shareable"
1349mode allowing sharing of their cache allocations. If one resource group
1350configures a cache allocation then nothing prevents another resource group
1351to overlap with that allocation.
1352
1353In this example a new exclusive resource group will be created on a L2 CAT
1354system with two L2 cache instances that can be configured with an 8-bit
1355capacity bitmask. The new exclusive resource group will be configured to use
135625% of each cache instance.
1357::
1358
1359 # mount -t resctrl resctrl /sys/fs/resctrl/
1360 # cd /sys/fs/resctrl
1361
1362First, we observe that the default group is configured to allocate to all L2
1363cache::
1364
1365 # cat schemata
1366 L2:0=ff;1=ff
1367
1368We could attempt to create the new resource group at this point, but it will
1369fail because of the overlap with the schemata of the default group::
1370
1371 # mkdir p0
1372 # echo 'L2:0=0x3;1=0x3' > p0/schemata
1373 # cat p0/mode
1374 shareable
1375 # echo exclusive > p0/mode
1376 -sh: echo: write error: Invalid argument
1377 # cat info/last_cmd_status
1378 schemata overlaps
1379
1380To ensure that there is no overlap with another resource group the default
1381resource group's schemata has to change, making it possible for the new
1382resource group to become exclusive.
1383::
1384
1385 # echo 'L2:0=0xfc;1=0xfc' > schemata
1386 # echo exclusive > p0/mode
1387 # grep . p0/*
1388 p0/cpus:0
1389 p0/mode:exclusive
1390 p0/schemata:L2:0=03;1=03
1391 p0/size:L2:0=262144;1=262144
1392
1393A new resource group will on creation not overlap with an exclusive resource
1394group::
1395
1396 # mkdir p1
1397 # grep . p1/*
1398 p1/cpus:0
1399 p1/mode:shareable
1400 p1/schemata:L2:0=fc;1=fc
1401 p1/size:L2:0=786432;1=786432
1402
1403The bit_usage will reflect how the cache is used::
1404
1405 # cat info/L2/bit_usage
1406 0=SSSSSSEE;1=SSSSSSEE
1407
1408A resource group cannot be forced to overlap with an exclusive resource group::
1409
1410 # echo 'L2:0=0x1;1=0x1' > p1/schemata
1411 -sh: echo: write error: Invalid argument
1412 # cat info/last_cmd_status
1413 overlaps with exclusive group
1414
1415Example of Cache Pseudo-Locking
1416~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1417Lock portion of L2 cache from cache id 1 using CBM 0x3. Pseudo-locked
1418region is exposed at /dev/pseudo_lock/newlock that can be provided to
1419application for argument to mmap().
1420::
1421
1422 # mount -t resctrl resctrl /sys/fs/resctrl/
1423 # cd /sys/fs/resctrl
1424
1425Ensure that there are bits available that can be pseudo-locked, since only
1426unused bits can be pseudo-locked the bits to be pseudo-locked needs to be
1427removed from the default resource group's schemata::
1428
1429 # cat info/L2/bit_usage
1430 0=SSSSSSSS;1=SSSSSSSS
1431 # echo 'L2:1=0xfc' > schemata
1432 # cat info/L2/bit_usage
1433 0=SSSSSSSS;1=SSSSSS00
1434
1435Create a new resource group that will be associated with the pseudo-locked
1436region, indicate that it will be used for a pseudo-locked region, and
1437configure the requested pseudo-locked region capacity bitmask::
1438
1439 # mkdir newlock
1440 # echo pseudo-locksetup > newlock/mode
1441 # echo 'L2:1=0x3' > newlock/schemata
1442
1443On success the resource group's mode will change to pseudo-locked, the
1444bit_usage will reflect the pseudo-locked region, and the character device
1445exposing the pseudo-locked region will exist::
1446
1447 # cat newlock/mode
1448 pseudo-locked
1449 # cat info/L2/bit_usage
1450 0=SSSSSSSS;1=SSSSSSPP
1451 # ls -l /dev/pseudo_lock/newlock
1452 crw------- 1 root root 243, 0 Apr 3 05:01 /dev/pseudo_lock/newlock
1453
1454::
1455
1456 /*
1457 * Example code to access one page of pseudo-locked cache region
1458 * from user space.
1459 */
1460 #define _GNU_SOURCE
1461 #include <fcntl.h>
1462 #include <sched.h>
1463 #include <stdio.h>
1464 #include <stdlib.h>
1465 #include <unistd.h>
1466 #include <sys/mman.h>
1467
1468 /*
1469 * It is required that the application runs with affinity to only
1470 * cores associated with the pseudo-locked region. Here the cpu
1471 * is hardcoded for convenience of example.
1472 */
1473 static int cpuid = 2;
1474
1475 int main(int argc, char *argv[])
1476 {
1477 cpu_set_t cpuset;
1478 long page_size;
1479 void *mapping;
1480 int dev_fd;
1481 int ret;
1482
1483 page_size = sysconf(_SC_PAGESIZE);
1484
1485 CPU_ZERO(&cpuset);
1486 CPU_SET(cpuid, &cpuset);
1487 ret = sched_setaffinity(0, sizeof(cpuset), &cpuset);
1488 if (ret < 0) {
1489 perror("sched_setaffinity");
1490 exit(EXIT_FAILURE);
1491 }
1492
1493 dev_fd = open("/dev/pseudo_lock/newlock", O_RDWR);
1494 if (dev_fd < 0) {
1495 perror("open");
1496 exit(EXIT_FAILURE);
1497 }
1498
1499 mapping = mmap(0, page_size, PROT_READ | PROT_WRITE, MAP_SHARED,
1500 dev_fd, 0);
1501 if (mapping == MAP_FAILED) {
1502 perror("mmap");
1503 close(dev_fd);
1504 exit(EXIT_FAILURE);
1505 }
1506
1507 /* Application interacts with pseudo-locked memory @mapping */
1508
1509 ret = munmap(mapping, page_size);
1510 if (ret < 0) {
1511 perror("munmap");
1512 close(dev_fd);
1513 exit(EXIT_FAILURE);
1514 }
1515
1516 close(dev_fd);
1517 exit(EXIT_SUCCESS);
1518 }
1519
1520Locking between applications
1521----------------------------
1522
1523Certain operations on the resctrl filesystem, composed of read/writes
1524to/from multiple files, must be atomic.
1525
1526As an example, the allocation of an exclusive reservation of L3 cache
1527involves:
1528
1529 1. Read the cbmmasks from each directory or the per-resource "bit_usage"
1530 2. Find a contiguous set of bits in the global CBM bitmask that is clear
1531 in any of the directory cbmmasks
1532 3. Create a new directory
1533 4. Set the bits found in step 2 to the new directory "schemata" file
1534
1535If two applications attempt to allocate space concurrently then they can
1536end up allocating the same bits so the reservations are shared instead of
1537exclusive.
1538
1539To coordinate atomic operations on the resctrlfs and to avoid the problem
1540above, the following locking procedure is recommended:
1541
1542Locking is based on flock, which is available in libc and also as a shell
1543script command
1544
1545Write lock:
1546
1547 A) Take flock(LOCK_EX) on /sys/fs/resctrl
1548 B) Read/write the directory structure.
1549 C) funlock
1550
1551Read lock:
1552
1553 A) Take flock(LOCK_SH) on /sys/fs/resctrl
1554 B) If success read the directory structure.
1555 C) funlock
1556
1557Example with bash::
1558
1559 # Atomically read directory structure
1560 $ flock -s /sys/fs/resctrl/ find /sys/fs/resctrl
1561
1562 # Read directory contents and create new subdirectory
1563
1564 $ cat create-dir.sh
1565 find /sys/fs/resctrl/ > output.txt
1566 mask = function-of(output.txt)
1567 mkdir /sys/fs/resctrl/newres/
1568 echo mask > /sys/fs/resctrl/newres/schemata
1569
1570 $ flock /sys/fs/resctrl/ ./create-dir.sh
1571
1572Example with C::
1573
1574 /*
1575 * Example code do take advisory locks
1576 * before accessing resctrl filesystem
1577 */
1578 #include <sys/file.h>
1579 #include <stdlib.h>
1580
1581 void resctrl_take_shared_lock(int fd)
1582 {
1583 int ret;
1584
1585 /* take shared lock on resctrl filesystem */
1586 ret = flock(fd, LOCK_SH);
1587 if (ret) {
1588 perror("flock");
1589 exit(-1);
1590 }
1591 }
1592
1593 void resctrl_take_exclusive_lock(int fd)
1594 {
1595 int ret;
1596
1597 /* release lock on resctrl filesystem */
1598 ret = flock(fd, LOCK_EX);
1599 if (ret) {
1600 perror("flock");
1601 exit(-1);
1602 }
1603 }
1604
1605 void resctrl_release_lock(int fd)
1606 {
1607 int ret;
1608
1609 /* take shared lock on resctrl filesystem */
1610 ret = flock(fd, LOCK_UN);
1611 if (ret) {
1612 perror("flock");
1613 exit(-1);
1614 }
1615 }
1616
1617 void main(void)
1618 {
1619 int fd, ret;
1620
1621 fd = open("/sys/fs/resctrl", O_DIRECTORY);
1622 if (fd == -1) {
1623 perror("open");
1624 exit(-1);
1625 }
1626 resctrl_take_shared_lock(fd);
1627 /* code to read directory contents */
1628 resctrl_release_lock(fd);
1629
1630 resctrl_take_exclusive_lock(fd);
1631 /* code to read and write directory contents */
1632 resctrl_release_lock(fd);
1633 }
1634
1635Examples for RDT Monitoring along with allocation usage
1636=======================================================
1637Reading monitored data
1638----------------------
1639Reading an event file (for ex: mon_data/mon_L3_00/llc_occupancy) would
1640show the current snapshot of LLC occupancy of the corresponding MON
1641group or CTRL_MON group.
1642
1643
1644Example 1 (Monitor CTRL_MON group and subset of tasks in CTRL_MON group)
1645------------------------------------------------------------------------
1646On a two socket machine (one L3 cache per socket) with just four bits
1647for cache bit masks::
1648
1649 # mount -t resctrl resctrl /sys/fs/resctrl
1650 # cd /sys/fs/resctrl
1651 # mkdir p0 p1
1652 # echo "L3:0=3;1=c" > /sys/fs/resctrl/p0/schemata
1653 # echo "L3:0=3;1=3" > /sys/fs/resctrl/p1/schemata
1654 # echo 5678 > p1/tasks
1655 # echo 5679 > p1/tasks
1656
1657The default resource group is unmodified, so we have access to all parts
1658of all caches (its schemata file reads "L3:0=f;1=f").
1659
1660Tasks that are under the control of group "p0" may only allocate from the
1661"lower" 50% on cache ID 0, and the "upper" 50% of cache ID 1.
1662Tasks in group "p1" use the "lower" 50% of cache on both sockets.
1663
1664Create monitor groups and assign a subset of tasks to each monitor group.
1665::
1666
1667 # cd /sys/fs/resctrl/p1/mon_groups
1668 # mkdir m11 m12
1669 # echo 5678 > m11/tasks
1670 # echo 5679 > m12/tasks
1671
1672fetch data (data shown in bytes)
1673::
1674
1675 # cat m11/mon_data/mon_L3_00/llc_occupancy
1676 16234000
1677 # cat m11/mon_data/mon_L3_01/llc_occupancy
1678 14789000
1679 # cat m12/mon_data/mon_L3_00/llc_occupancy
1680 16789000
1681
1682The parent ctrl_mon group shows the aggregated data.
1683::
1684
1685 # cat /sys/fs/resctrl/p1/mon_data/mon_l3_00/llc_occupancy
1686 31234000
1687
1688Example 2 (Monitor a task from its creation)
1689--------------------------------------------
1690On a two socket machine (one L3 cache per socket)::
1691
1692 # mount -t resctrl resctrl /sys/fs/resctrl
1693 # cd /sys/fs/resctrl
1694 # mkdir p0 p1
1695
1696An RMID is allocated to the group once its created and hence the <cmd>
1697below is monitored from its creation.
1698::
1699
1700 # echo $$ > /sys/fs/resctrl/p1/tasks
1701 # <cmd>
1702
1703Fetch the data::
1704
1705 # cat /sys/fs/resctrl/p1/mon_data/mon_l3_00/llc_occupancy
1706 31789000
1707
1708Example 3 (Monitor without CAT support or before creating CAT groups)
1709---------------------------------------------------------------------
1710
1711Assume a system like HSW has only CQM and no CAT support. In this case
1712the resctrl will still mount but cannot create CTRL_MON directories.
1713But user can create different MON groups within the root group thereby
1714able to monitor all tasks including kernel threads.
1715
1716This can also be used to profile jobs cache size footprint before being
1717able to allocate them to different allocation groups.
1718::
1719
1720 # mount -t resctrl resctrl /sys/fs/resctrl
1721 # cd /sys/fs/resctrl
1722 # mkdir mon_groups/m01
1723 # mkdir mon_groups/m02
1724
1725 # echo 3478 > /sys/fs/resctrl/mon_groups/m01/tasks
1726 # echo 2467 > /sys/fs/resctrl/mon_groups/m02/tasks
1727
1728Monitor the groups separately and also get per domain data. From the
1729below its apparent that the tasks are mostly doing work on
1730domain(socket) 0.
1731::
1732
1733 # cat /sys/fs/resctrl/mon_groups/m01/mon_L3_00/llc_occupancy
1734 31234000
1735 # cat /sys/fs/resctrl/mon_groups/m01/mon_L3_01/llc_occupancy
1736 34555
1737 # cat /sys/fs/resctrl/mon_groups/m02/mon_L3_00/llc_occupancy
1738 31234000
1739 # cat /sys/fs/resctrl/mon_groups/m02/mon_L3_01/llc_occupancy
1740 32789
1741
1742
1743Example 4 (Monitor real time tasks)
1744-----------------------------------
1745
1746A single socket system which has real time tasks running on cores 4-7
1747and non real time tasks on other cpus. We want to monitor the cache
1748occupancy of the real time threads on these cores.
1749::
1750
1751 # mount -t resctrl resctrl /sys/fs/resctrl
1752 # cd /sys/fs/resctrl
1753 # mkdir p1
1754
1755Move the cpus 4-7 over to p1::
1756
1757 # echo f0 > p1/cpus
1758
1759View the llc occupancy snapshot::
1760
1761 # cat /sys/fs/resctrl/p1/mon_data/mon_L3_00/llc_occupancy
1762 11234000
1763
1764
1765Examples on working with mbm_assign_mode
1766========================================
1767
1768a. Check if MBM counter assignment mode is supported.
1769::
1770
1771 # mount -t resctrl resctrl /sys/fs/resctrl/
1772
1773 # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
1774 [mbm_event]
1775 default
1776
1777The "mbm_event" mode is detected and enabled.
1778
1779b. Check how many assignable counters are supported.
1780::
1781
1782 # cat /sys/fs/resctrl/info/L3_MON/num_mbm_cntrs
1783 0=32;1=32
1784
1785c. Check how many assignable counters are available for assignment in each domain.
1786::
1787
1788 # cat /sys/fs/resctrl/info/L3_MON/available_mbm_cntrs
1789 0=30;1=30
1790
1791d. To list the default group's assign states.
1792::
1793
1794 # cat /sys/fs/resctrl/mbm_L3_assignments
1795 mbm_total_bytes:0=e;1=e
1796 mbm_local_bytes:0=e;1=e
1797
1798e. To unassign the counter associated with the mbm_total_bytes event on domain 0.
1799::
1800
1801 # echo "mbm_total_bytes:0=_" > /sys/fs/resctrl/mbm_L3_assignments
1802 # cat /sys/fs/resctrl/mbm_L3_assignments
1803 mbm_total_bytes:0=_;1=e
1804 mbm_local_bytes:0=e;1=e
1805
1806f. To unassign the counter associated with the mbm_total_bytes event on all domains.
1807::
1808
1809 # echo "mbm_total_bytes:*=_" > /sys/fs/resctrl/mbm_L3_assignments
1810 # cat /sys/fs/resctrl/mbm_L3_assignment
1811 mbm_total_bytes:0=_;1=_
1812 mbm_local_bytes:0=e;1=e
1813
1814g. To assign a counter associated with the mbm_total_bytes event on all domains in
1815exclusive mode.
1816::
1817
1818 # echo "mbm_total_bytes:*=e" > /sys/fs/resctrl/mbm_L3_assignments
1819 # cat /sys/fs/resctrl/mbm_L3_assignments
1820 mbm_total_bytes:0=e;1=e
1821 mbm_local_bytes:0=e;1=e
1822
1823h. Read the events mbm_total_bytes and mbm_local_bytes of the default group. There is
1824no change in reading the events with the assignment.
1825::
1826
1827 # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_total_bytes
1828 779247936
1829 # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_total_bytes
1830 562324232
1831 # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes
1832 212122123
1833 # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes
1834 121212144
1835
1836i. Check the event configurations.
1837::
1838
1839 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_total_bytes/event_filter
1840 local_reads,remote_reads,local_non_temporal_writes,remote_non_temporal_writes,
1841 local_reads_slow_memory,remote_reads_slow_memory,dirty_victim_writes_all
1842
1843 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter
1844 local_reads,local_non_temporal_writes,local_reads_slow_memory
1845
1846j. Change the event configuration for mbm_local_bytes.
1847::
1848
1849 # echo "local_reads, local_non_temporal_writes, local_reads_slow_memory, remote_reads" >
1850 /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter
1851
1852 # cat /sys/fs/resctrl/info/L3_MON/event_configs/mbm_local_bytes/event_filter
1853 local_reads,local_non_temporal_writes,local_reads_slow_memory,remote_reads
1854
1855k. Now read the local events again. The first read may come back with "Unavailable"
1856status. The subsequent read of mbm_local_bytes will display the current value.
1857::
1858
1859 # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes
1860 Unavailable
1861 # cat /sys/fs/resctrl/mon_data/mon_L3_00/mbm_local_bytes
1862 2252323
1863 # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes
1864 Unavailable
1865 # cat /sys/fs/resctrl/mon_data/mon_L3_01/mbm_local_bytes
1866 1566565
1867
1868l. Users have the option to go back to 'default' mbm_assign_mode if required. This can be
1869done using the following command. Note that switching the mbm_assign_mode may reset all
1870the MBM counters (and thus all MBM events) of all the resctrl groups.
1871::
1872
1873 # echo "default" > /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
1874 # cat /sys/fs/resctrl/info/L3_MON/mbm_assign_mode
1875 mbm_event
1876 [default]
1877
1878m. Unmount the resctrl filesystem.
1879::
1880
1881 # umount /sys/fs/resctrl/
1882
1883Intel RDT Errata
1884================
1885
1886Intel MBM Counters May Report System Memory Bandwidth Incorrectly
1887-----------------------------------------------------------------
1888
1889Errata SKX99 for Skylake server and BDF102 for Broadwell server.
1890
1891Problem: Intel Memory Bandwidth Monitoring (MBM) counters track metrics
1892according to the assigned Resource Monitor ID (RMID) for that logical
1893core. The IA32_QM_CTR register (MSR 0xC8E), used to report these
1894metrics, may report incorrect system bandwidth for certain RMID values.
1895
1896Implication: Due to the errata, system memory bandwidth may not match
1897what is reported.
1898
1899Workaround: MBM total and local readings are corrected according to the
1900following correction factor table:
1901
1902+---------------+---------------+---------------+-----------------+
1903|core count |rmid count |rmid threshold |correction factor|
1904+---------------+---------------+---------------+-----------------+
1905|1 |8 |0 |1.000000 |
1906+---------------+---------------+---------------+-----------------+
1907|2 |16 |0 |1.000000 |
1908+---------------+---------------+---------------+-----------------+
1909|3 |24 |15 |0.969650 |
1910+---------------+---------------+---------------+-----------------+
1911|4 |32 |0 |1.000000 |
1912+---------------+---------------+---------------+-----------------+
1913|6 |48 |31 |0.969650 |
1914+---------------+---------------+---------------+-----------------+
1915|7 |56 |47 |1.142857 |
1916+---------------+---------------+---------------+-----------------+
1917|8 |64 |0 |1.000000 |
1918+---------------+---------------+---------------+-----------------+
1919|9 |72 |63 |1.185115 |
1920+---------------+---------------+---------------+-----------------+
1921|10 |80 |63 |1.066553 |
1922+---------------+---------------+---------------+-----------------+
1923|11 |88 |79 |1.454545 |
1924+---------------+---------------+---------------+-----------------+
1925|12 |96 |0 |1.000000 |
1926+---------------+---------------+---------------+-----------------+
1927|13 |104 |95 |1.230769 |
1928+---------------+---------------+---------------+-----------------+
1929|14 |112 |95 |1.142857 |
1930+---------------+---------------+---------------+-----------------+
1931|15 |120 |95 |1.066667 |
1932+---------------+---------------+---------------+-----------------+
1933|16 |128 |0 |1.000000 |
1934+---------------+---------------+---------------+-----------------+
1935|17 |136 |127 |1.254863 |
1936+---------------+---------------+---------------+-----------------+
1937|18 |144 |127 |1.185255 |
1938+---------------+---------------+---------------+-----------------+
1939|19 |152 |0 |1.000000 |
1940+---------------+---------------+---------------+-----------------+
1941|20 |160 |127 |1.066667 |
1942+---------------+---------------+---------------+-----------------+
1943|21 |168 |0 |1.000000 |
1944+---------------+---------------+---------------+-----------------+
1945|22 |176 |159 |1.454334 |
1946+---------------+---------------+---------------+-----------------+
1947|23 |184 |0 |1.000000 |
1948+---------------+---------------+---------------+-----------------+
1949|24 |192 |127 |0.969744 |
1950+---------------+---------------+---------------+-----------------+
1951|25 |200 |191 |1.280246 |
1952+---------------+---------------+---------------+-----------------+
1953|26 |208 |191 |1.230921 |
1954+---------------+---------------+---------------+-----------------+
1955|27 |216 |0 |1.000000 |
1956+---------------+---------------+---------------+-----------------+
1957|28 |224 |191 |1.143118 |
1958+---------------+---------------+---------------+-----------------+
1959
1960If rmid > rmid threshold, MBM total and local values should be multiplied
1961by the correction factor.
1962
1963See:
1964
19651. Erratum SKX99 in Intel Xeon Processor Scalable Family Specification Update:
1966http://web.archive.org/web/20200716124958/https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html
1967
19682. Erratum BDF102 in Intel Xeon E5-2600 v4 Processor Product Family Specification Update:
1969http://web.archive.org/web/20191125200531/https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-e5-v4-spec-update.pdf
1970
19713. The errata in Intel Resource Director Technology (Intel RDT) on 2nd Generation Intel Xeon Scalable Processors Reference Manual:
1972https://software.intel.com/content/www/us/en/develop/articles/intel-resource-director-technology-rdt-reference-manual.html
1973
1974for further information.