tjh.dev
Linux kernel mirror (for testing)
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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/renesas,scif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11
12properties:
13 compatible:
14 oneOf:
15 - enum:
16 - renesas,scif-r7s9210 # RZ/A2
17 - renesas,scif-r9a07g044 # RZ/G2{L,LC}
18 - renesas,scif-r9a09g057 # RZ/V2H(P)
19
20 - items:
21 - enum:
22 - renesas,scif-r7s72100 # RZ/A1H
23 - const: renesas,scif # generic SCIF compatible UART
24
25 - items:
26 - enum:
27 - renesas,scif-r8a7778 # R-Car M1
28 - renesas,scif-r8a7779 # R-Car H1
29 - const: renesas,rcar-gen1-scif # R-Car Gen1
30 - const: renesas,scif # generic SCIF compatible UART
31
32 - items:
33 - enum:
34 - renesas,scif-r8a7742 # RZ/G1H
35 - renesas,scif-r8a7743 # RZ/G1M
36 - renesas,scif-r8a7744 # RZ/G1N
37 - renesas,scif-r8a7745 # RZ/G1E
38 - renesas,scif-r8a77470 # RZ/G1C
39 - renesas,scif-r8a7790 # R-Car H2
40 - renesas,scif-r8a7791 # R-Car M2-W
41 - renesas,scif-r8a7792 # R-Car V2H
42 - renesas,scif-r8a7793 # R-Car M2-N
43 - renesas,scif-r8a7794 # R-Car E2
44 - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
45 - const: renesas,scif # generic SCIF compatible UART
46
47 - items:
48 - enum:
49 - renesas,scif-r8a774a1 # RZ/G2M
50 - renesas,scif-r8a774a3 # RZ/G2M v3.0
51 - renesas,scif-r8a774b1 # RZ/G2N
52 - renesas,scif-r8a774c0 # RZ/G2E
53 - renesas,scif-r8a774e1 # RZ/G2H
54 - renesas,scif-r8a7795 # R-Car H3
55 - renesas,scif-r8a7796 # R-Car M3-W
56 - renesas,scif-r8a77961 # R-Car M3-W+
57 - renesas,scif-r8a77965 # R-Car M3-N
58 - renesas,scif-r8a77970 # R-Car V3M
59 - renesas,scif-r8a77980 # R-Car V3H
60 - renesas,scif-r8a77990 # R-Car E3
61 - renesas,scif-r8a77995 # R-Car D3
62 - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
63 - const: renesas,scif # generic SCIF compatible UART
64
65 - items:
66 - enum:
67 - renesas,scif-r8a779a0 # R-Car V3U
68 - renesas,scif-r8a779f0 # R-Car S4-8
69 - renesas,scif-r8a779g0 # R-Car V4H
70 - renesas,scif-r8a779h0 # R-Car V4M
71 - const: renesas,rcar-gen4-scif # R-Car Gen4
72 - const: renesas,scif # generic SCIF compatible UART
73
74 - items:
75 - enum:
76 - renesas,scif-r8a78000 # R-Car X5H
77 - const: renesas,rcar-gen5-scif # R-Car Gen5
78 - const: renesas,scif # generic SCIF compatible UART
79
80 - items:
81 - enum:
82 - renesas,scif-r9a07g043 # RZ/G2UL and RZ/Five
83 - renesas,scif-r9a07g054 # RZ/V2L
84 - renesas,scif-r9a08g045 # RZ/G3S
85 - renesas,scif-r9a08g046 # RZ/G3L
86 - const: renesas,scif-r9a07g044 # RZ/G2{L,LC} fallback
87
88 - items:
89 - enum:
90 - renesas,scif-r9a09g047 # RZ/G3E
91 - renesas,scif-r9a09g056 # RZ/V2N
92 - const: renesas,scif-r9a09g057 # RZ/V2H fallback
93
94 reg:
95 maxItems: 1
96
97 interrupts:
98 oneOf:
99 - items:
100 - description: A combined interrupt
101 - items:
102 - description: Error interrupt
103 - description: Receive buffer full interrupt
104 - description: Transmit buffer empty interrupt
105 - description: Break interrupt
106 - description: Data Ready interrupt
107 - description: Transmit End interrupt
108 - description: Transmit End/Data Ready interrupt
109 - description: Receive buffer full interrupt (EDGE trigger)
110 - description: Transmit buffer empty interrupt (EDGE trigger)
111 minItems: 4
112
113 interrupt-names:
114 minItems: 4
115 items:
116 - const: eri
117 - const: rxi
118 - const: txi
119 - const: bri
120 - const: dri
121 - const: tei
122 - const: tei-dri
123 - const: rxi-edge
124 - const: txi-edge
125
126 clocks:
127 minItems: 1
128 maxItems: 4
129
130 clock-names:
131 minItems: 1
132 maxItems: 4
133 items:
134 enum:
135 - fck # UART functional clock
136 - sck # optional external clock input
137 - brg_int # optional internal clock source for BRG frequency divider
138 - scif_clk # optional external clock source for BRG frequency divider
139
140 power-domains:
141 maxItems: 1
142
143 resets:
144 maxItems: 1
145
146 dmas:
147 minItems: 2
148 maxItems: 4
149 description:
150 Must contain a list of pairs of references to DMA specifiers, one for
151 transmission, and one for reception.
152
153 dma-names:
154 minItems: 2
155 maxItems: 4
156 items:
157 enum:
158 - tx
159 - rx
160
161required:
162 - compatible
163 - reg
164 - interrupts
165 - clocks
166 - clock-names
167 - power-domains
168
169allOf:
170 - $ref: serial.yaml#
171
172 - if:
173 properties:
174 compatible:
175 contains:
176 enum:
177 - renesas,rcar-gen2-scif
178 - renesas,rcar-gen3-scif
179 - renesas,rcar-gen4-scif
180 - renesas,rcar-gen5-scif
181 - renesas,scif-r9a07g044
182 - renesas,scif-r9a09g057
183 then:
184 required:
185 - resets
186
187 - if:
188 properties:
189 compatible:
190 contains:
191 enum:
192 - renesas,rcar-gen1-scif
193 - renesas,rcar-gen2-scif
194 - renesas,rcar-gen3-scif
195 - renesas,rcar-gen4-scif
196 - renesas,rcar-gen5-scif
197 then:
198 properties:
199 interrupts:
200 maxItems: 1
201
202 interrupt-names: false
203 else:
204 required:
205 - interrupt-names
206
207 - if:
208 properties:
209 compatible:
210 contains:
211 enum:
212 - renesas,scif-r7s72100
213 then:
214 properties:
215 interrupts:
216 minItems: 4
217 maxItems: 4
218
219 interrupt-names:
220 maxItems: 4
221
222 - if:
223 properties:
224 compatible:
225 contains:
226 enum:
227 - renesas,scif-r7s9210
228 - renesas,scif-r9a07g044
229 then:
230 properties:
231 interrupts:
232 minItems: 6
233 maxItems: 6
234
235 interrupt-names:
236 minItems: 6
237 maxItems: 6
238
239 - if:
240 properties:
241 compatible:
242 contains:
243 const: renesas,scif-r9a09g057
244 then:
245 properties:
246 clocks:
247 maxItems: 1
248
249 clock-names:
250 maxItems: 1
251
252 interrupts:
253 minItems: 9
254
255 interrupt-names:
256 minItems: 9
257
258unevaluatedProperties: false
259
260examples:
261 - |
262 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
263 #include <dt-bindings/interrupt-controller/arm-gic.h>
264 #include <dt-bindings/power/r8a7791-sysc.h>
265 aliases {
266 serial0 = &scif0;
267 };
268
269 scif0: serial@e6e60000 {
270 compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
271 "renesas,scif";
272 reg = <0xe6e60000 64>;
273 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
274 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
275 <&scif_clk>;
276 clock-names = "fck", "brg_int", "scif_clk";
277 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
278 dma-names = "tx", "rx", "tx", "rx";
279 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
280 resets = <&cpg 721>;
281 };