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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) 9 10maintainers: 11 - Richard Genoud <richard.genoud@bootlin.com> 12 13properties: 14 compatible: 15 oneOf: 16 - enum: 17 - atmel,at91rm9200-usart 18 - atmel,at91sam9260-usart 19 - items: 20 - const: atmel,at91rm9200-dbgu 21 - const: atmel,at91rm9200-usart 22 - items: 23 - const: atmel,at91sam9260-dbgu 24 - const: atmel,at91sam9260-usart 25 - items: 26 - enum: 27 - microchip,lan9691-usart 28 - microchip,sam9x60-usart 29 - microchip,sam9x7-usart 30 - microchip,sama7d65-usart 31 - const: atmel,at91sam9260-usart 32 - items: 33 - const: microchip,sam9x60-dbgu 34 - const: microchip,sam9x60-usart 35 - const: atmel,at91sam9260-dbgu 36 - const: atmel,at91sam9260-usart 37 - items: 38 - const: microchip,sam9x7-dbgu 39 - const: atmel,at91sam9260-dbgu 40 - const: microchip,sam9x7-usart 41 - const: atmel,at91sam9260-usart 42 43 reg: 44 maxItems: 1 45 46 interrupts: 47 maxItems: 1 48 49 clock-names: 50 minItems: 1 51 items: 52 - const: usart 53 - const: gclk 54 55 clocks: 56 minItems: 1 57 items: 58 - description: USART Peripheral Clock 59 - description: USART Generic Clock 60 61 dmas: 62 items: 63 - description: TX DMA Channel 64 - description: RX DMA Channel 65 66 dma-names: 67 items: 68 - const: tx 69 - const: rx 70 71 atmel,usart-mode: 72 $ref: /schemas/types.yaml#/definitions/uint32 73 description: 74 Must be either <AT91_USART_MODE_SPI> for SPI or 75 <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h). 76 enum: [ 0, 1 ] 77 78 atmel,use-dma-rx: 79 type: boolean 80 description: use of PDC or DMA for receiving data 81 82 atmel,use-dma-tx: 83 type: boolean 84 description: use of PDC or DMA for transmitting data 85 86 atmel,fifo-size: 87 $ref: /schemas/types.yaml#/definitions/uint32 88 description: 89 Maximum number of data the RX and TX FIFOs can store for FIFO 90 capable USARTS. 91 enum: [ 16, 32 ] 92 93required: 94 - compatible 95 - reg 96 - interrupts 97 - clock-names 98 - clocks 99 - atmel,usart-mode 100 101allOf: 102 - if: 103 properties: 104 atmel,usart-mode: 105 const: 1 106 then: 107 allOf: 108 - $ref: /schemas/spi/spi-controller.yaml# 109 110 properties: 111 atmel,use-dma-rx: false 112 113 atmel,use-dma-tx: false 114 115 atmel,fifo-size: false 116 117 "#size-cells": 118 const: 0 119 120 "#address-cells": 121 const: 1 122 123 required: 124 - "#size-cells" 125 - "#address-cells" 126 127 else: 128 allOf: 129 - $ref: /schemas/serial/serial.yaml# 130 - $ref: /schemas/serial/rs485.yaml# 131 132unevaluatedProperties: false 133 134examples: 135 - | 136 #include <dt-bindings/gpio/gpio.h> 137 #include <dt-bindings/interrupt-controller/irq.h> 138 #include <dt-bindings/mfd/at91-usart.h> 139 #include <dt-bindings/dma/at91.h> 140 141 /* use PDC */ 142 usart0: serial@fff8c000 { 143 compatible = "atmel,at91sam9260-usart"; 144 reg = <0xfff8c000 0x4000>; 145 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 146 interrupts = <7>; 147 clocks = <&usart0_clk>; 148 clock-names = "usart"; 149 atmel,use-dma-rx; 150 atmel,use-dma-tx; 151 rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>; 152 cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>; 153 dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>; 154 dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>; 155 dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>; 156 rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>; 157 }; 158 159 - | 160 #include <dt-bindings/gpio/gpio.h> 161 #include <dt-bindings/interrupt-controller/irq.h> 162 #include <dt-bindings/mfd/at91-usart.h> 163 #include <dt-bindings/dma/at91.h> 164 165 /* use DMA */ 166 usart1: serial@f001c000 { 167 compatible = "atmel,at91sam9260-usart"; 168 reg = <0xf001c000 0x100>; 169 atmel,usart-mode = <AT91_USART_MODE_SERIAL>; 170 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 171 clocks = <&usart0_clk>; 172 clock-names = "usart"; 173 atmel,use-dma-rx; 174 atmel,use-dma-tx; 175 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 176 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 177 dma-names = "tx", "rx"; 178 atmel,fifo-size = <32>; 179 }; 180 181 - | 182 #include <dt-bindings/gpio/gpio.h> 183 #include <dt-bindings/interrupt-controller/irq.h> 184 #include <dt-bindings/mfd/at91-usart.h> 185 #include <dt-bindings/dma/at91.h> 186 187 /* SPI mode */ 188 spi0: spi@f001c000 { 189 compatible = "atmel,at91sam9260-usart"; 190 reg = <0xf001c000 0x100>; 191 #address-cells = <1>; 192 #size-cells = <0>; 193 atmel,usart-mode = <AT91_USART_MODE_SPI>; 194 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; 195 clocks = <&usart0_clk>; 196 clock-names = "usart"; 197 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>, 198 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>; 199 dma-names = "tx", "rx"; 200 cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>; 201 };