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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale i.MX8MQ USB3 PHY 8 9maintainers: 10 - Li Jun <jun.li@nxp.com> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - fsl,imx8mq-usb-phy 17 - fsl,imx8mp-usb-phy 18 - items: 19 - const: fsl,imx95-usb-phy 20 - const: fsl,imx8mp-usb-phy 21 22 reg: 23 minItems: 1 24 maxItems: 2 25 26 "#phy-cells": 27 const: 0 28 29 clocks: 30 minItems: 1 31 items: 32 - description: PHY configuration clock 33 - description: Alternate PHY reference clock 34 35 clock-names: 36 minItems: 1 37 items: 38 - const: phy 39 - const: alt 40 41 power-domains: 42 maxItems: 1 43 44 vbus-supply: 45 description: 46 A phandle to the regulator for USB VBUS. 47 48 fsl,phy-tx-vref-tune-percent: 49 description: 50 Tunes the HS DC level relative to the nominal level 51 minimum: 90 52 maximum: 124 53 54 fsl,phy-tx-rise-tune-percent: 55 description: 56 Adjusts the rise/fall time duration of the HS waveform relative to 57 its nominal value 58 minimum: 90 59 maximum: 120 60 61 fsl,phy-tx-preemp-amp-tune-microamp: 62 description: 63 Adjust amount of current sourced to DPn and DMn after a J-to-K 64 or K-to-J transition. Default is 0 (disabled). 65 minimum: 0 66 maximum: 1800 67 68 fsl,phy-tx-vboost-level-microvolt: 69 description: 70 Adjust the boosted transmit launch pk-pk differential amplitude 71 enum: [844, 1008, 1156] 72 73 fsl,phy-comp-dis-tune-percent: 74 description: 75 Adjust the voltage level used to detect a disconnect event at the host 76 relative to the nominal value 77 minimum: 91 78 maximum: 115 79 80 fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: 81 description: 82 Adjust TX de-emphasis attenuation in dB at nominal 83 3.5dB point as per USB specification 84 minimum: 0 85 maximum: 36 86 87 fsl,phy-pcs-tx-swing-full-percent: 88 description: 89 Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt 90 minimum: 0 91 maximum: 100 92 93required: 94 - compatible 95 - reg 96 - "#phy-cells" 97 - clocks 98 - clock-names 99 100allOf: 101 - if: 102 properties: 103 compatible: 104 contains: 105 enum: 106 - fsl,imx95-usb-phy 107 then: 108 properties: 109 reg: 110 items: 111 - description: USB PHY Control range 112 - description: USB PHY TCA Block range 113 else: 114 properties: 115 reg: 116 maxItems: 1 117 118 - if: 119 properties: 120 compatible: 121 enum: 122 - fsl,imx8mq-usb-phy 123 - fsl,imx8mp-usb-phy 124 then: 125 properties: 126 fsl,phy-tx-vref-tune-percent: 127 minimum: 94 128 fsl,phy-tx-rise-tune-percent: 129 minimum: 97 130 maximum: 103 131 132 - if: 133 properties: 134 compatible: 135 contains: 136 enum: 137 - fsl,imx95-usb-phy 138 then: 139 properties: 140 fsl,phy-tx-vref-tune-percent: 141 maximum: 108 142 fsl,phy-comp-dis-tune-percent: 143 minimum: 94 144 maximum: 104 145 146 - if: 147 required: 148 - orientation-switch 149 then: 150 allOf: 151 - $ref: /schemas/usb/usb-switch.yaml# 152 - $ref: /schemas/usb/usb-switch-ports.yaml# 153 154unevaluatedProperties: false 155 156examples: 157 - | 158 #include <dt-bindings/clock/imx8mq-clock.h> 159 usb3_phy0: phy@381f0040 { 160 compatible = "fsl,imx8mq-usb-phy"; 161 reg = <0x381f0040 0x40>; 162 clocks = <&clk IMX8MQ_CLK_USB1_PHY_ROOT>; 163 clock-names = "phy"; 164 #phy-cells = <0>; 165 };