Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at cba767175becadc5c4016cceb7bfdd2c7fe722f4 2862 lines 74 kB view raw
1/* 2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 3 * 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 6 * 7 * This code is loosely based on the 1.8 moxa driver which is based on 8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 9 * others. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 18 * www.moxa.com. 19 * - Fixed x86_64 cleanness 20 */ 21 22#include <linux/module.h> 23#include <linux/errno.h> 24#include <linux/signal.h> 25#include <linux/sched.h> 26#include <linux/timer.h> 27#include <linux/interrupt.h> 28#include <linux/tty.h> 29#include <linux/tty_flip.h> 30#include <linux/serial.h> 31#include <linux/serial_reg.h> 32#include <linux/major.h> 33#include <linux/string.h> 34#include <linux/fcntl.h> 35#include <linux/ptrace.h> 36#include <linux/gfp.h> 37#include <linux/ioport.h> 38#include <linux/mm.h> 39#include <linux/delay.h> 40#include <linux/pci.h> 41#include <linux/bitops.h> 42 43#include <asm/system.h> 44#include <asm/io.h> 45#include <asm/irq.h> 46#include <asm/uaccess.h> 47 48#include "mxser.h" 49 50#define MXSER_VERSION "2.0.4" /* 1.12 */ 51#define MXSERMAJOR 174 52 53#define MXSER_BOARDS 4 /* Max. boards */ 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 56#define MXSER_ISR_PASS_LIMIT 100 57 58/*CheckIsMoxaMust return value*/ 59#define MOXA_OTHER_UART 0x00 60#define MOXA_MUST_MU150_HWID 0x01 61#define MOXA_MUST_MU860_HWID 0x02 62 63#define WAKEUP_CHARS 256 64 65#define UART_MCR_AFE 0x20 66#define UART_LSR_SPECIAL 0x1E 67 68#define PCI_DEVICE_ID_POS104UL 0x1044 69#define PCI_DEVICE_ID_CB108 0x1080 70#define PCI_DEVICE_ID_CP102UF 0x1023 71#define PCI_DEVICE_ID_CB114 0x1142 72#define PCI_DEVICE_ID_CP114UL 0x1143 73#define PCI_DEVICE_ID_CB134I 0x1341 74#define PCI_DEVICE_ID_CP138U 0x1380 75 76 77#define C168_ASIC_ID 1 78#define C104_ASIC_ID 2 79#define C102_ASIC_ID 0xB 80#define CI132_ASIC_ID 4 81#define CI134_ASIC_ID 3 82#define CI104J_ASIC_ID 5 83 84#define MXSER_HIGHBAUD 1 85#define MXSER_HAS2 2 86 87/* This is only for PCI */ 88static const struct { 89 int type; 90 int tx_fifo; 91 int rx_fifo; 92 int xmit_fifo_size; 93 int rx_high_water; 94 int rx_trigger; 95 int rx_low_water; 96 long max_baud; 97} Gpci_uart_info[] = { 98 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 99 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 100 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 101}; 102#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 103 104struct mxser_cardinfo { 105 char *name; 106 unsigned int nports; 107 unsigned int flags; 108}; 109 110static const struct mxser_cardinfo mxser_cards[] = { 111/* 0*/ { "C168 series", 8, }, 112 { "C104 series", 4, }, 113 { "CI-104J series", 4, }, 114 { "C168H/PCI series", 8, }, 115 { "C104H/PCI series", 4, }, 116/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 117 { "CI-132 series", 4, MXSER_HAS2 }, 118 { "CI-134 series", 4, }, 119 { "CP-132 series", 2, }, 120 { "CP-114 series", 4, }, 121/*10*/ { "CT-114 series", 4, }, 122 { "CP-102 series", 2, MXSER_HIGHBAUD }, 123 { "CP-104U series", 4, }, 124 { "CP-168U series", 8, }, 125 { "CP-132U series", 2, }, 126/*15*/ { "CP-134U series", 4, }, 127 { "CP-104JU series", 4, }, 128 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 129 { "CP-118U series", 8, }, 130 { "CP-102UL series", 2, }, 131/*20*/ { "CP-102U series", 2, }, 132 { "CP-118EL series", 8, }, 133 { "CP-168EL series", 8, }, 134 { "CP-104EL series", 4, }, 135 { "CB-108 series", 8, }, 136/*25*/ { "CB-114 series", 4, }, 137 { "CB-134I series", 4, }, 138 { "CP-138U series", 8, }, 139 { "POS-104UL series", 4, }, 140 { "CP-114UL series", 4, }, 141/*30*/ { "CP-102UF series", 2, } 142}; 143 144/* driver_data correspond to the lines in the structure above 145 see also ISA probe function before you change something */ 146static struct pci_device_id mxser_pcibrds[] = { 147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 172 { } 173}; 174MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 175 176static unsigned long ioaddr[MXSER_BOARDS]; 177static int ttymajor = MXSERMAJOR; 178 179/* Variables for insmod */ 180 181MODULE_AUTHOR("Casper Yang"); 182MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 183module_param_array(ioaddr, ulong, NULL, 0); 184MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 185module_param(ttymajor, int, 0); 186MODULE_LICENSE("GPL"); 187 188struct mxser_log { 189 int tick; 190 unsigned long rxcnt[MXSER_PORTS]; 191 unsigned long txcnt[MXSER_PORTS]; 192}; 193 194struct mxser_mon { 195 unsigned long rxcnt; 196 unsigned long txcnt; 197 unsigned long up_rxcnt; 198 unsigned long up_txcnt; 199 int modem_status; 200 unsigned char hold_reason; 201}; 202 203struct mxser_mon_ext { 204 unsigned long rx_cnt[32]; 205 unsigned long tx_cnt[32]; 206 unsigned long up_rxcnt[32]; 207 unsigned long up_txcnt[32]; 208 int modem_status[32]; 209 210 long baudrate[32]; 211 int databits[32]; 212 int stopbits[32]; 213 int parity[32]; 214 int flowctrl[32]; 215 int fifo[32]; 216 int iftype[32]; 217}; 218 219struct mxser_board; 220 221struct mxser_port { 222 struct tty_port port; 223 struct mxser_board *board; 224 225 unsigned long ioaddr; 226 unsigned long opmode_ioaddr; 227 int max_baud; 228 229 int rx_high_water; 230 int rx_trigger; /* Rx fifo trigger level */ 231 int rx_low_water; 232 int baud_base; /* max. speed */ 233 int type; /* UART type */ 234 235 int x_char; /* xon/xoff character */ 236 int IER; /* Interrupt Enable Register */ 237 int MCR; /* Modem control register */ 238 239 unsigned char stop_rx; 240 unsigned char ldisc_stop_rx; 241 242 int custom_divisor; 243 unsigned char err_shadow; 244 245 struct async_icount icount; /* kernel counters for 4 input interrupts */ 246 int timeout; 247 248 int read_status_mask; 249 int ignore_status_mask; 250 int xmit_fifo_size; 251 int xmit_head; 252 int xmit_tail; 253 int xmit_cnt; 254 255 struct ktermios normal_termios; 256 257 struct mxser_mon mon_data; 258 259 spinlock_t slock; 260 wait_queue_head_t delta_msr_wait; 261}; 262 263struct mxser_board { 264 unsigned int idx; 265 int irq; 266 const struct mxser_cardinfo *info; 267 unsigned long vector; 268 unsigned long vector_mask; 269 270 int chip_flag; 271 int uart_type; 272 273 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 274}; 275 276struct mxser_mstatus { 277 tcflag_t cflag; 278 int cts; 279 int dsr; 280 int ri; 281 int dcd; 282}; 283 284static struct mxser_board mxser_boards[MXSER_BOARDS]; 285static struct tty_driver *mxvar_sdriver; 286static struct mxser_log mxvar_log; 287static int mxser_set_baud_method[MXSER_PORTS + 1]; 288 289static void mxser_enable_must_enchance_mode(unsigned long baseio) 290{ 291 u8 oldlcr; 292 u8 efr; 293 294 oldlcr = inb(baseio + UART_LCR); 295 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 296 297 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 298 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 299 300 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 301 outb(oldlcr, baseio + UART_LCR); 302} 303 304static void mxser_disable_must_enchance_mode(unsigned long baseio) 305{ 306 u8 oldlcr; 307 u8 efr; 308 309 oldlcr = inb(baseio + UART_LCR); 310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 311 312 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 313 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 314 315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 316 outb(oldlcr, baseio + UART_LCR); 317} 318 319static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 320{ 321 u8 oldlcr; 322 u8 efr; 323 324 oldlcr = inb(baseio + UART_LCR); 325 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 326 327 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 328 efr &= ~MOXA_MUST_EFR_BANK_MASK; 329 efr |= MOXA_MUST_EFR_BANK0; 330 331 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 332 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 333 outb(oldlcr, baseio + UART_LCR); 334} 335 336static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 337{ 338 u8 oldlcr; 339 u8 efr; 340 341 oldlcr = inb(baseio + UART_LCR); 342 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 343 344 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 345 efr &= ~MOXA_MUST_EFR_BANK_MASK; 346 efr |= MOXA_MUST_EFR_BANK0; 347 348 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 349 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 350 outb(oldlcr, baseio + UART_LCR); 351} 352 353static void mxser_set_must_fifo_value(struct mxser_port *info) 354{ 355 u8 oldlcr; 356 u8 efr; 357 358 oldlcr = inb(info->ioaddr + UART_LCR); 359 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 360 361 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 362 efr &= ~MOXA_MUST_EFR_BANK_MASK; 363 efr |= MOXA_MUST_EFR_BANK1; 364 365 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 366 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 367 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 368 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 369 outb(oldlcr, info->ioaddr + UART_LCR); 370} 371 372static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 373{ 374 u8 oldlcr; 375 u8 efr; 376 377 oldlcr = inb(baseio + UART_LCR); 378 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 379 380 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 381 efr &= ~MOXA_MUST_EFR_BANK_MASK; 382 efr |= MOXA_MUST_EFR_BANK2; 383 384 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 385 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 386 outb(oldlcr, baseio + UART_LCR); 387} 388 389static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 390{ 391 u8 oldlcr; 392 u8 efr; 393 394 oldlcr = inb(baseio + UART_LCR); 395 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 396 397 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 398 efr &= ~MOXA_MUST_EFR_BANK_MASK; 399 efr |= MOXA_MUST_EFR_BANK2; 400 401 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 402 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 403 outb(oldlcr, baseio + UART_LCR); 404} 405 406static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 407{ 408 u8 oldlcr; 409 u8 efr; 410 411 oldlcr = inb(baseio + UART_LCR); 412 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 413 414 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 415 efr &= ~MOXA_MUST_EFR_SF_MASK; 416 417 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 418 outb(oldlcr, baseio + UART_LCR); 419} 420 421static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 422{ 423 u8 oldlcr; 424 u8 efr; 425 426 oldlcr = inb(baseio + UART_LCR); 427 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 428 429 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 430 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 431 efr |= MOXA_MUST_EFR_SF_TX1; 432 433 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 434 outb(oldlcr, baseio + UART_LCR); 435} 436 437static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 438{ 439 u8 oldlcr; 440 u8 efr; 441 442 oldlcr = inb(baseio + UART_LCR); 443 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 444 445 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 446 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 447 448 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 449 outb(oldlcr, baseio + UART_LCR); 450} 451 452static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 453{ 454 u8 oldlcr; 455 u8 efr; 456 457 oldlcr = inb(baseio + UART_LCR); 458 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 459 460 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 461 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 462 efr |= MOXA_MUST_EFR_SF_RX1; 463 464 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 465 outb(oldlcr, baseio + UART_LCR); 466} 467 468static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 469{ 470 u8 oldlcr; 471 u8 efr; 472 473 oldlcr = inb(baseio + UART_LCR); 474 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 475 476 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 477 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 478 479 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 480 outb(oldlcr, baseio + UART_LCR); 481} 482 483#ifdef CONFIG_PCI 484static int __devinit CheckIsMoxaMust(unsigned long io) 485{ 486 u8 oldmcr, hwid; 487 int i; 488 489 outb(0, io + UART_LCR); 490 mxser_disable_must_enchance_mode(io); 491 oldmcr = inb(io + UART_MCR); 492 outb(0, io + UART_MCR); 493 mxser_set_must_xon1_value(io, 0x11); 494 if ((hwid = inb(io + UART_MCR)) != 0) { 495 outb(oldmcr, io + UART_MCR); 496 return MOXA_OTHER_UART; 497 } 498 499 mxser_get_must_hardware_id(io, &hwid); 500 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 501 if (hwid == Gpci_uart_info[i].type) 502 return (int)hwid; 503 } 504 return MOXA_OTHER_UART; 505} 506#endif 507 508static void process_txrx_fifo(struct mxser_port *info) 509{ 510 int i; 511 512 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 513 info->rx_trigger = 1; 514 info->rx_high_water = 1; 515 info->rx_low_water = 1; 516 info->xmit_fifo_size = 1; 517 } else 518 for (i = 0; i < UART_INFO_NUM; i++) 519 if (info->board->chip_flag == Gpci_uart_info[i].type) { 520 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 521 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 522 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 523 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 524 break; 525 } 526} 527 528static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 529{ 530 static unsigned char mxser_msr[MXSER_PORTS + 1]; 531 unsigned char status = 0; 532 533 status = inb(baseaddr + UART_MSR); 534 535 mxser_msr[port] &= 0x0F; 536 mxser_msr[port] |= status; 537 status = mxser_msr[port]; 538 if (mode) 539 mxser_msr[port] = 0; 540 541 return status; 542} 543 544static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, 545 struct mxser_port *port) 546{ 547 DECLARE_WAITQUEUE(wait, current); 548 int retval; 549 int do_clocal = 0; 550 unsigned long flags; 551 552 /* 553 * If non-blocking mode is set, or the port is not enabled, 554 * then make the check up front and then exit. 555 */ 556 if ((filp->f_flags & O_NONBLOCK) || 557 test_bit(TTY_IO_ERROR, &tty->flags)) { 558 port->port.flags |= ASYNC_NORMAL_ACTIVE; 559 return 0; 560 } 561 562 if (tty->termios->c_cflag & CLOCAL) 563 do_clocal = 1; 564 565 /* 566 * Block waiting for the carrier detect and the line to become 567 * free (i.e., not in use by the callout). While we are in 568 * this loop, port->port.count is dropped by one, so that 569 * mxser_close() knows when to free things. We restore it upon 570 * exit, either normal or abnormal. 571 */ 572 retval = 0; 573 add_wait_queue(&port->port.open_wait, &wait); 574 575 spin_lock_irqsave(&port->slock, flags); 576 if (!tty_hung_up_p(filp)) 577 port->port.count--; 578 spin_unlock_irqrestore(&port->slock, flags); 579 port->port.blocked_open++; 580 while (1) { 581 spin_lock_irqsave(&port->slock, flags); 582 outb(inb(port->ioaddr + UART_MCR) | 583 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR); 584 spin_unlock_irqrestore(&port->slock, flags); 585 set_current_state(TASK_INTERRUPTIBLE); 586 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) { 587 if (port->port.flags & ASYNC_HUP_NOTIFY) 588 retval = -EAGAIN; 589 else 590 retval = -ERESTARTSYS; 591 break; 592 } 593 if (!(port->port.flags & ASYNC_CLOSING) && 594 (do_clocal || 595 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD))) 596 break; 597 if (signal_pending(current)) { 598 retval = -ERESTARTSYS; 599 break; 600 } 601 schedule(); 602 } 603 set_current_state(TASK_RUNNING); 604 remove_wait_queue(&port->port.open_wait, &wait); 605 if (!tty_hung_up_p(filp)) 606 port->port.count++; 607 port->port.blocked_open--; 608 if (retval) 609 return retval; 610 port->port.flags |= ASYNC_NORMAL_ACTIVE; 611 return 0; 612} 613 614static int mxser_set_baud(struct tty_struct *tty, long newspd) 615{ 616 struct mxser_port *info = tty->driver_data; 617 int quot = 0, baud; 618 unsigned char cval; 619 620 if (!info->ioaddr) 621 return -1; 622 623 if (newspd > info->max_baud) 624 return -1; 625 626 if (newspd == 134) { 627 quot = 2 * info->baud_base / 269; 628 tty_encode_baud_rate(tty, 134, 134); 629 } else if (newspd) { 630 quot = info->baud_base / newspd; 631 if (quot == 0) 632 quot = 1; 633 baud = info->baud_base/quot; 634 tty_encode_baud_rate(tty, baud, baud); 635 } else { 636 quot = 0; 637 } 638 639 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); 640 info->timeout += HZ / 50; /* Add .02 seconds of slop */ 641 642 if (quot) { 643 info->MCR |= UART_MCR_DTR; 644 outb(info->MCR, info->ioaddr + UART_MCR); 645 } else { 646 info->MCR &= ~UART_MCR_DTR; 647 outb(info->MCR, info->ioaddr + UART_MCR); 648 return 0; 649 } 650 651 cval = inb(info->ioaddr + UART_LCR); 652 653 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 654 655 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 656 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 657 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 658 659#ifdef BOTHER 660 if (C_BAUD(tty) == BOTHER) { 661 quot = info->baud_base % newspd; 662 quot *= 8; 663 if (quot % newspd > newspd / 2) { 664 quot /= newspd; 665 quot++; 666 } else 667 quot /= newspd; 668 669 mxser_set_must_enum_value(info->ioaddr, quot); 670 } else 671#endif 672 mxser_set_must_enum_value(info->ioaddr, 0); 673 674 return 0; 675} 676 677/* 678 * This routine is called to set the UART divisor registers to match 679 * the specified baud rate for a serial port. 680 */ 681static int mxser_change_speed(struct tty_struct *tty, 682 struct ktermios *old_termios) 683{ 684 struct mxser_port *info = tty->driver_data; 685 unsigned cflag, cval, fcr; 686 int ret = 0; 687 unsigned char status; 688 689 cflag = tty->termios->c_cflag; 690 if (!info->ioaddr) 691 return ret; 692 693 if (mxser_set_baud_method[tty->index] == 0) 694 mxser_set_baud(tty, tty_get_baud_rate(tty)); 695 696 /* byte size and parity */ 697 switch (cflag & CSIZE) { 698 case CS5: 699 cval = 0x00; 700 break; 701 case CS6: 702 cval = 0x01; 703 break; 704 case CS7: 705 cval = 0x02; 706 break; 707 case CS8: 708 cval = 0x03; 709 break; 710 default: 711 cval = 0x00; 712 break; /* too keep GCC shut... */ 713 } 714 if (cflag & CSTOPB) 715 cval |= 0x04; 716 if (cflag & PARENB) 717 cval |= UART_LCR_PARITY; 718 if (!(cflag & PARODD)) 719 cval |= UART_LCR_EPAR; 720 if (cflag & CMSPAR) 721 cval |= UART_LCR_SPAR; 722 723 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 724 if (info->board->chip_flag) { 725 fcr = UART_FCR_ENABLE_FIFO; 726 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 727 mxser_set_must_fifo_value(info); 728 } else 729 fcr = 0; 730 } else { 731 fcr = UART_FCR_ENABLE_FIFO; 732 if (info->board->chip_flag) { 733 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 734 mxser_set_must_fifo_value(info); 735 } else { 736 switch (info->rx_trigger) { 737 case 1: 738 fcr |= UART_FCR_TRIGGER_1; 739 break; 740 case 4: 741 fcr |= UART_FCR_TRIGGER_4; 742 break; 743 case 8: 744 fcr |= UART_FCR_TRIGGER_8; 745 break; 746 default: 747 fcr |= UART_FCR_TRIGGER_14; 748 break; 749 } 750 } 751 } 752 753 /* CTS flow control flag and modem status interrupts */ 754 info->IER &= ~UART_IER_MSI; 755 info->MCR &= ~UART_MCR_AFE; 756 if (cflag & CRTSCTS) { 757 info->port.flags |= ASYNC_CTS_FLOW; 758 info->IER |= UART_IER_MSI; 759 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 760 info->MCR |= UART_MCR_AFE; 761 } else { 762 status = inb(info->ioaddr + UART_MSR); 763 if (tty->hw_stopped) { 764 if (status & UART_MSR_CTS) { 765 tty->hw_stopped = 0; 766 if (info->type != PORT_16550A && 767 !info->board->chip_flag) { 768 outb(info->IER & ~UART_IER_THRI, 769 info->ioaddr + 770 UART_IER); 771 info->IER |= UART_IER_THRI; 772 outb(info->IER, info->ioaddr + 773 UART_IER); 774 } 775 tty_wakeup(tty); 776 } 777 } else { 778 if (!(status & UART_MSR_CTS)) { 779 tty->hw_stopped = 1; 780 if ((info->type != PORT_16550A) && 781 (!info->board->chip_flag)) { 782 info->IER &= ~UART_IER_THRI; 783 outb(info->IER, info->ioaddr + 784 UART_IER); 785 } 786 } 787 } 788 } 789 } else { 790 info->port.flags &= ~ASYNC_CTS_FLOW; 791 } 792 outb(info->MCR, info->ioaddr + UART_MCR); 793 if (cflag & CLOCAL) { 794 info->port.flags &= ~ASYNC_CHECK_CD; 795 } else { 796 info->port.flags |= ASYNC_CHECK_CD; 797 info->IER |= UART_IER_MSI; 798 } 799 outb(info->IER, info->ioaddr + UART_IER); 800 801 /* 802 * Set up parity check flag 803 */ 804 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 805 if (I_INPCK(tty)) 806 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 807 if (I_BRKINT(tty) || I_PARMRK(tty)) 808 info->read_status_mask |= UART_LSR_BI; 809 810 info->ignore_status_mask = 0; 811 812 if (I_IGNBRK(tty)) { 813 info->ignore_status_mask |= UART_LSR_BI; 814 info->read_status_mask |= UART_LSR_BI; 815 /* 816 * If we're ignore parity and break indicators, ignore 817 * overruns too. (For real raw support). 818 */ 819 if (I_IGNPAR(tty)) { 820 info->ignore_status_mask |= 821 UART_LSR_OE | 822 UART_LSR_PE | 823 UART_LSR_FE; 824 info->read_status_mask |= 825 UART_LSR_OE | 826 UART_LSR_PE | 827 UART_LSR_FE; 828 } 829 } 830 if (info->board->chip_flag) { 831 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 832 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 833 if (I_IXON(tty)) { 834 mxser_enable_must_rx_software_flow_control( 835 info->ioaddr); 836 } else { 837 mxser_disable_must_rx_software_flow_control( 838 info->ioaddr); 839 } 840 if (I_IXOFF(tty)) { 841 mxser_enable_must_tx_software_flow_control( 842 info->ioaddr); 843 } else { 844 mxser_disable_must_tx_software_flow_control( 845 info->ioaddr); 846 } 847 } 848 849 850 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 851 outb(cval, info->ioaddr + UART_LCR); 852 853 return ret; 854} 855 856static void mxser_check_modem_status(struct tty_struct *tty, 857 struct mxser_port *port, int status) 858{ 859 /* update input line counters */ 860 if (status & UART_MSR_TERI) 861 port->icount.rng++; 862 if (status & UART_MSR_DDSR) 863 port->icount.dsr++; 864 if (status & UART_MSR_DDCD) 865 port->icount.dcd++; 866 if (status & UART_MSR_DCTS) 867 port->icount.cts++; 868 port->mon_data.modem_status = status; 869 wake_up_interruptible(&port->delta_msr_wait); 870 871 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { 872 if (status & UART_MSR_DCD) 873 wake_up_interruptible(&port->port.open_wait); 874 } 875 876 tty = tty_port_tty_get(&port->port); 877 if (port->port.flags & ASYNC_CTS_FLOW) { 878 if (tty->hw_stopped) { 879 if (status & UART_MSR_CTS) { 880 tty->hw_stopped = 0; 881 882 if ((port->type != PORT_16550A) && 883 (!port->board->chip_flag)) { 884 outb(port->IER & ~UART_IER_THRI, 885 port->ioaddr + UART_IER); 886 port->IER |= UART_IER_THRI; 887 outb(port->IER, port->ioaddr + 888 UART_IER); 889 } 890 tty_wakeup(tty); 891 } 892 } else { 893 if (!(status & UART_MSR_CTS)) { 894 tty->hw_stopped = 1; 895 if (port->type != PORT_16550A && 896 !port->board->chip_flag) { 897 port->IER &= ~UART_IER_THRI; 898 outb(port->IER, port->ioaddr + 899 UART_IER); 900 } 901 } 902 } 903 } 904} 905 906static int mxser_startup(struct tty_struct *tty) 907{ 908 struct mxser_port *info = tty->driver_data; 909 unsigned long page; 910 unsigned long flags; 911 912 page = __get_free_page(GFP_KERNEL); 913 if (!page) 914 return -ENOMEM; 915 916 spin_lock_irqsave(&info->slock, flags); 917 918 if (info->port.flags & ASYNC_INITIALIZED) { 919 free_page(page); 920 spin_unlock_irqrestore(&info->slock, flags); 921 return 0; 922 } 923 924 if (!info->ioaddr || !info->type) { 925 set_bit(TTY_IO_ERROR, &tty->flags); 926 free_page(page); 927 spin_unlock_irqrestore(&info->slock, flags); 928 return 0; 929 } 930 if (info->port.xmit_buf) 931 free_page(page); 932 else 933 info->port.xmit_buf = (unsigned char *) page; 934 935 /* 936 * Clear the FIFO buffers and disable them 937 * (they will be reenabled in mxser_change_speed()) 938 */ 939 if (info->board->chip_flag) 940 outb((UART_FCR_CLEAR_RCVR | 941 UART_FCR_CLEAR_XMIT | 942 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 943 else 944 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 945 info->ioaddr + UART_FCR); 946 947 /* 948 * At this point there's no way the LSR could still be 0xFF; 949 * if it is, then bail out, because there's likely no UART 950 * here. 951 */ 952 if (inb(info->ioaddr + UART_LSR) == 0xff) { 953 spin_unlock_irqrestore(&info->slock, flags); 954 if (capable(CAP_SYS_ADMIN)) { 955 if (tty) 956 set_bit(TTY_IO_ERROR, &tty->flags); 957 return 0; 958 } else 959 return -ENODEV; 960 } 961 962 /* 963 * Clear the interrupt registers. 964 */ 965 (void) inb(info->ioaddr + UART_LSR); 966 (void) inb(info->ioaddr + UART_RX); 967 (void) inb(info->ioaddr + UART_IIR); 968 (void) inb(info->ioaddr + UART_MSR); 969 970 /* 971 * Now, initialize the UART 972 */ 973 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 974 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 975 outb(info->MCR, info->ioaddr + UART_MCR); 976 977 /* 978 * Finally, enable interrupts 979 */ 980 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 981 982 if (info->board->chip_flag) 983 info->IER |= MOXA_MUST_IER_EGDAI; 984 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 985 986 /* 987 * And clear the interrupt registers again for luck. 988 */ 989 (void) inb(info->ioaddr + UART_LSR); 990 (void) inb(info->ioaddr + UART_RX); 991 (void) inb(info->ioaddr + UART_IIR); 992 (void) inb(info->ioaddr + UART_MSR); 993 994 clear_bit(TTY_IO_ERROR, &tty->flags); 995 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 996 997 /* 998 * and set the speed of the serial port 999 */ 1000 mxser_change_speed(tty, NULL); 1001 info->port.flags |= ASYNC_INITIALIZED; 1002 spin_unlock_irqrestore(&info->slock, flags); 1003 1004 return 0; 1005} 1006 1007/* 1008 * This routine will shutdown a serial port; interrupts maybe disabled, and 1009 * DTR is dropped if the hangup on close termio flag is on. 1010 */ 1011static void mxser_shutdown(struct tty_struct *tty) 1012{ 1013 struct mxser_port *info = tty->driver_data; 1014 unsigned long flags; 1015 1016 if (!(info->port.flags & ASYNC_INITIALIZED)) 1017 return; 1018 1019 spin_lock_irqsave(&info->slock, flags); 1020 1021 /* 1022 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 1023 * here so the queue might never be waken up 1024 */ 1025 wake_up_interruptible(&info->delta_msr_wait); 1026 1027 /* 1028 * Free the IRQ, if necessary 1029 */ 1030 if (info->port.xmit_buf) { 1031 free_page((unsigned long) info->port.xmit_buf); 1032 info->port.xmit_buf = NULL; 1033 } 1034 1035 info->IER = 0; 1036 outb(0x00, info->ioaddr + UART_IER); 1037 1038 if (tty->termios->c_cflag & HUPCL) 1039 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); 1040 outb(info->MCR, info->ioaddr + UART_MCR); 1041 1042 /* clear Rx/Tx FIFO's */ 1043 if (info->board->chip_flag) 1044 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 1045 MOXA_MUST_FCR_GDA_MODE_ENABLE, 1046 info->ioaddr + UART_FCR); 1047 else 1048 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 1049 info->ioaddr + UART_FCR); 1050 1051 /* read data port to reset things */ 1052 (void) inb(info->ioaddr + UART_RX); 1053 1054 set_bit(TTY_IO_ERROR, &tty->flags); 1055 1056 info->port.flags &= ~ASYNC_INITIALIZED; 1057 1058 if (info->board->chip_flag) 1059 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 1060 1061 spin_unlock_irqrestore(&info->slock, flags); 1062} 1063 1064/* 1065 * This routine is called whenever a serial port is opened. It 1066 * enables interrupts for a serial port, linking in its async structure into 1067 * the IRQ chain. It also performs the serial-specific 1068 * initialization for the tty structure. 1069 */ 1070static int mxser_open(struct tty_struct *tty, struct file *filp) 1071{ 1072 struct mxser_port *info; 1073 unsigned long flags; 1074 int retval, line; 1075 1076 line = tty->index; 1077 if (line == MXSER_PORTS) 1078 return 0; 1079 if (line < 0 || line > MXSER_PORTS) 1080 return -ENODEV; 1081 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1082 if (!info->ioaddr) 1083 return -ENODEV; 1084 1085 tty->driver_data = info; 1086 tty_port_tty_set(&info->port, tty); 1087 /* 1088 * Start up serial port 1089 */ 1090 spin_lock_irqsave(&info->slock, flags); 1091 info->port.count++; 1092 spin_unlock_irqrestore(&info->slock, flags); 1093 retval = mxser_startup(tty); 1094 if (retval) 1095 return retval; 1096 1097 retval = mxser_block_til_ready(tty, filp, info); 1098 if (retval) 1099 return retval; 1100 1101 /* unmark here for very high baud rate (ex. 921600 bps) used */ 1102 tty->low_latency = 1; 1103 return 0; 1104} 1105 1106static void mxser_flush_buffer(struct tty_struct *tty) 1107{ 1108 struct mxser_port *info = tty->driver_data; 1109 char fcr; 1110 unsigned long flags; 1111 1112 1113 spin_lock_irqsave(&info->slock, flags); 1114 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1115 1116 fcr = inb(info->ioaddr + UART_FCR); 1117 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1118 info->ioaddr + UART_FCR); 1119 outb(fcr, info->ioaddr + UART_FCR); 1120 1121 spin_unlock_irqrestore(&info->slock, flags); 1122 1123 tty_wakeup(tty); 1124} 1125 1126 1127/* 1128 * This routine is called when the serial port gets closed. First, we 1129 * wait for the last remaining data to be sent. Then, we unlink its 1130 * async structure from the interrupt chain if necessary, and we free 1131 * that IRQ if nothing is left in the chain. 1132 */ 1133static void mxser_close(struct tty_struct *tty, struct file *filp) 1134{ 1135 struct mxser_port *info = tty->driver_data; 1136 1137 unsigned long timeout; 1138 unsigned long flags; 1139 1140 if (tty->index == MXSER_PORTS) 1141 return; 1142 if (!info) 1143 return; 1144 1145 spin_lock_irqsave(&info->slock, flags); 1146 1147 if (tty_hung_up_p(filp)) { 1148 spin_unlock_irqrestore(&info->slock, flags); 1149 return; 1150 } 1151 if ((tty->count == 1) && (info->port.count != 1)) { 1152 /* 1153 * Uh, oh. tty->count is 1, which means that the tty 1154 * structure will be freed. Info->port.count should always 1155 * be one in these conditions. If it's greater than 1156 * one, we've got real problems, since it means the 1157 * serial port won't be shutdown. 1158 */ 1159 printk(KERN_ERR "mxser_close: bad serial port count; " 1160 "tty->count is 1, info->port.count is %d\n", info->port.count); 1161 info->port.count = 1; 1162 } 1163 if (--info->port.count < 0) { 1164 printk(KERN_ERR "mxser_close: bad serial port count for " 1165 "ttys%d: %d\n", tty->index, info->port.count); 1166 info->port.count = 0; 1167 } 1168 if (info->port.count) { 1169 spin_unlock_irqrestore(&info->slock, flags); 1170 return; 1171 } 1172 info->port.flags |= ASYNC_CLOSING; 1173 spin_unlock_irqrestore(&info->slock, flags); 1174 /* 1175 * Save the termios structure, since this port may have 1176 * separate termios for callout and dialin. 1177 */ 1178 if (info->port.flags & ASYNC_NORMAL_ACTIVE) 1179 info->normal_termios = *tty->termios; 1180 /* 1181 * Now we wait for the transmit buffer to clear; and we notify 1182 * the line discipline to only process XON/XOFF characters. 1183 */ 1184 tty->closing = 1; 1185 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE) 1186 tty_wait_until_sent(tty, info->port.closing_wait); 1187 /* 1188 * At this point we stop accepting input. To do this, we 1189 * disable the receive line status interrupts, and tell the 1190 * interrupt driver to stop checking the data ready bit in the 1191 * line status register. 1192 */ 1193 info->IER &= ~UART_IER_RLSI; 1194 if (info->board->chip_flag) 1195 info->IER &= ~MOXA_MUST_RECV_ISR; 1196 1197 if (info->port.flags & ASYNC_INITIALIZED) { 1198 outb(info->IER, info->ioaddr + UART_IER); 1199 /* 1200 * Before we drop DTR, make sure the UART transmitter 1201 * has completely drained; this is especially 1202 * important if there is a transmit FIFO! 1203 */ 1204 timeout = jiffies + HZ; 1205 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1206 schedule_timeout_interruptible(5); 1207 if (time_after(jiffies, timeout)) 1208 break; 1209 } 1210 } 1211 mxser_shutdown(tty); 1212 1213 mxser_flush_buffer(tty); 1214 tty_ldisc_flush(tty); 1215 1216 tty->closing = 0; 1217 tty_port_tty_set(&info->port, NULL); 1218 if (info->port.blocked_open) { 1219 if (info->port.close_delay) 1220 schedule_timeout_interruptible(info->port.close_delay); 1221 wake_up_interruptible(&info->port.open_wait); 1222 } 1223 1224 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); 1225} 1226 1227static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1228{ 1229 int c, total = 0; 1230 struct mxser_port *info = tty->driver_data; 1231 unsigned long flags; 1232 1233 if (!info->port.xmit_buf) 1234 return 0; 1235 1236 while (1) { 1237 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1238 SERIAL_XMIT_SIZE - info->xmit_head)); 1239 if (c <= 0) 1240 break; 1241 1242 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1243 spin_lock_irqsave(&info->slock, flags); 1244 info->xmit_head = (info->xmit_head + c) & 1245 (SERIAL_XMIT_SIZE - 1); 1246 info->xmit_cnt += c; 1247 spin_unlock_irqrestore(&info->slock, flags); 1248 1249 buf += c; 1250 count -= c; 1251 total += c; 1252 } 1253 1254 if (info->xmit_cnt && !tty->stopped) { 1255 if (!tty->hw_stopped || 1256 (info->type == PORT_16550A) || 1257 (info->board->chip_flag)) { 1258 spin_lock_irqsave(&info->slock, flags); 1259 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1260 UART_IER); 1261 info->IER |= UART_IER_THRI; 1262 outb(info->IER, info->ioaddr + UART_IER); 1263 spin_unlock_irqrestore(&info->slock, flags); 1264 } 1265 } 1266 return total; 1267} 1268 1269static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1270{ 1271 struct mxser_port *info = tty->driver_data; 1272 unsigned long flags; 1273 1274 if (!info->port.xmit_buf) 1275 return 0; 1276 1277 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1278 return 0; 1279 1280 spin_lock_irqsave(&info->slock, flags); 1281 info->port.xmit_buf[info->xmit_head++] = ch; 1282 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1283 info->xmit_cnt++; 1284 spin_unlock_irqrestore(&info->slock, flags); 1285 if (!tty->stopped) { 1286 if (!tty->hw_stopped || 1287 (info->type == PORT_16550A) || 1288 info->board->chip_flag) { 1289 spin_lock_irqsave(&info->slock, flags); 1290 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1291 info->IER |= UART_IER_THRI; 1292 outb(info->IER, info->ioaddr + UART_IER); 1293 spin_unlock_irqrestore(&info->slock, flags); 1294 } 1295 } 1296 return 1; 1297} 1298 1299 1300static void mxser_flush_chars(struct tty_struct *tty) 1301{ 1302 struct mxser_port *info = tty->driver_data; 1303 unsigned long flags; 1304 1305 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1306 (tty->hw_stopped && info->type != PORT_16550A && 1307 !info->board->chip_flag)) 1308 return; 1309 1310 spin_lock_irqsave(&info->slock, flags); 1311 1312 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1313 info->IER |= UART_IER_THRI; 1314 outb(info->IER, info->ioaddr + UART_IER); 1315 1316 spin_unlock_irqrestore(&info->slock, flags); 1317} 1318 1319static int mxser_write_room(struct tty_struct *tty) 1320{ 1321 struct mxser_port *info = tty->driver_data; 1322 int ret; 1323 1324 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1325 return ret < 0 ? 0 : ret; 1326} 1327 1328static int mxser_chars_in_buffer(struct tty_struct *tty) 1329{ 1330 struct mxser_port *info = tty->driver_data; 1331 return info->xmit_cnt; 1332} 1333 1334/* 1335 * ------------------------------------------------------------ 1336 * friends of mxser_ioctl() 1337 * ------------------------------------------------------------ 1338 */ 1339static int mxser_get_serial_info(struct tty_struct *tty, 1340 struct serial_struct __user *retinfo) 1341{ 1342 struct mxser_port *info = tty->driver_data; 1343 struct serial_struct tmp = { 1344 .type = info->type, 1345 .line = tty->index, 1346 .port = info->ioaddr, 1347 .irq = info->board->irq, 1348 .flags = info->port.flags, 1349 .baud_base = info->baud_base, 1350 .close_delay = info->port.close_delay, 1351 .closing_wait = info->port.closing_wait, 1352 .custom_divisor = info->custom_divisor, 1353 .hub6 = 0 1354 }; 1355 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) 1356 return -EFAULT; 1357 return 0; 1358} 1359 1360static int mxser_set_serial_info(struct tty_struct *tty, 1361 struct serial_struct __user *new_info) 1362{ 1363 struct mxser_port *info = tty->driver_data; 1364 struct serial_struct new_serial; 1365 speed_t baud; 1366 unsigned long sl_flags; 1367 unsigned int flags; 1368 int retval = 0; 1369 1370 if (!new_info || !info->ioaddr) 1371 return -ENODEV; 1372 if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) 1373 return -EFAULT; 1374 1375 if (new_serial.irq != info->board->irq || 1376 new_serial.port != info->ioaddr) 1377 return -EINVAL; 1378 1379 flags = info->port.flags & ASYNC_SPD_MASK; 1380 1381 if (!capable(CAP_SYS_ADMIN)) { 1382 if ((new_serial.baud_base != info->baud_base) || 1383 (new_serial.close_delay != info->port.close_delay) || 1384 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) 1385 return -EPERM; 1386 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1387 (new_serial.flags & ASYNC_USR_MASK)); 1388 } else { 1389 /* 1390 * OK, past this point, all the error checking has been done. 1391 * At this point, we start making changes..... 1392 */ 1393 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) | 1394 (new_serial.flags & ASYNC_FLAGS)); 1395 info->port.close_delay = new_serial.close_delay * HZ / 100; 1396 info->port.closing_wait = new_serial.closing_wait * HZ / 100; 1397 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY) 1398 ? 1 : 0; 1399 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1400 (new_serial.baud_base != info->baud_base || 1401 new_serial.custom_divisor != 1402 info->custom_divisor)) { 1403 baud = new_serial.baud_base / new_serial.custom_divisor; 1404 tty_encode_baud_rate(tty, baud, baud); 1405 } 1406 } 1407 1408 info->type = new_serial.type; 1409 1410 process_txrx_fifo(info); 1411 1412 if (info->port.flags & ASYNC_INITIALIZED) { 1413 if (flags != (info->port.flags & ASYNC_SPD_MASK)) { 1414 spin_lock_irqsave(&info->slock, sl_flags); 1415 mxser_change_speed(tty, NULL); 1416 spin_unlock_irqrestore(&info->slock, sl_flags); 1417 } 1418 } else 1419 retval = mxser_startup(tty); 1420 1421 return retval; 1422} 1423 1424/* 1425 * mxser_get_lsr_info - get line status register info 1426 * 1427 * Purpose: Let user call ioctl() to get info when the UART physically 1428 * is emptied. On bus types like RS485, the transmitter must 1429 * release the bus after transmitting. This must be done when 1430 * the transmit shift register is empty, not be done when the 1431 * transmit holding register is empty. This functionality 1432 * allows an RS485 driver to be written in user space. 1433 */ 1434static int mxser_get_lsr_info(struct mxser_port *info, 1435 unsigned int __user *value) 1436{ 1437 unsigned char status; 1438 unsigned int result; 1439 unsigned long flags; 1440 1441 spin_lock_irqsave(&info->slock, flags); 1442 status = inb(info->ioaddr + UART_LSR); 1443 spin_unlock_irqrestore(&info->slock, flags); 1444 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1445 return put_user(result, value); 1446} 1447 1448static int mxser_tiocmget(struct tty_struct *tty, struct file *file) 1449{ 1450 struct mxser_port *info = tty->driver_data; 1451 unsigned char control, status; 1452 unsigned long flags; 1453 1454 1455 if (tty->index == MXSER_PORTS) 1456 return -ENOIOCTLCMD; 1457 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1458 return -EIO; 1459 1460 control = info->MCR; 1461 1462 spin_lock_irqsave(&info->slock, flags); 1463 status = inb(info->ioaddr + UART_MSR); 1464 if (status & UART_MSR_ANY_DELTA) 1465 mxser_check_modem_status(tty, info, status); 1466 spin_unlock_irqrestore(&info->slock, flags); 1467 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1468 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1469 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1470 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1471 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1472 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1473} 1474 1475static int mxser_tiocmset(struct tty_struct *tty, struct file *file, 1476 unsigned int set, unsigned int clear) 1477{ 1478 struct mxser_port *info = tty->driver_data; 1479 unsigned long flags; 1480 1481 1482 if (tty->index == MXSER_PORTS) 1483 return -ENOIOCTLCMD; 1484 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1485 return -EIO; 1486 1487 spin_lock_irqsave(&info->slock, flags); 1488 1489 if (set & TIOCM_RTS) 1490 info->MCR |= UART_MCR_RTS; 1491 if (set & TIOCM_DTR) 1492 info->MCR |= UART_MCR_DTR; 1493 1494 if (clear & TIOCM_RTS) 1495 info->MCR &= ~UART_MCR_RTS; 1496 if (clear & TIOCM_DTR) 1497 info->MCR &= ~UART_MCR_DTR; 1498 1499 outb(info->MCR, info->ioaddr + UART_MCR); 1500 spin_unlock_irqrestore(&info->slock, flags); 1501 return 0; 1502} 1503 1504static int __init mxser_program_mode(int port) 1505{ 1506 int id, i, j, n; 1507 1508 outb(0, port); 1509 outb(0, port); 1510 outb(0, port); 1511 (void)inb(port); 1512 (void)inb(port); 1513 outb(0, port); 1514 (void)inb(port); 1515 1516 id = inb(port + 1) & 0x1F; 1517 if ((id != C168_ASIC_ID) && 1518 (id != C104_ASIC_ID) && 1519 (id != C102_ASIC_ID) && 1520 (id != CI132_ASIC_ID) && 1521 (id != CI134_ASIC_ID) && 1522 (id != CI104J_ASIC_ID)) 1523 return -1; 1524 for (i = 0, j = 0; i < 4; i++) { 1525 n = inb(port + 2); 1526 if (n == 'M') { 1527 j = 1; 1528 } else if ((j == 1) && (n == 1)) { 1529 j = 2; 1530 break; 1531 } else 1532 j = 0; 1533 } 1534 if (j != 2) 1535 id = -2; 1536 return id; 1537} 1538 1539static void __init mxser_normal_mode(int port) 1540{ 1541 int i, n; 1542 1543 outb(0xA5, port + 1); 1544 outb(0x80, port + 3); 1545 outb(12, port + 0); /* 9600 bps */ 1546 outb(0, port + 1); 1547 outb(0x03, port + 3); /* 8 data bits */ 1548 outb(0x13, port + 4); /* loop back mode */ 1549 for (i = 0; i < 16; i++) { 1550 n = inb(port + 5); 1551 if ((n & 0x61) == 0x60) 1552 break; 1553 if ((n & 1) == 1) 1554 (void)inb(port); 1555 } 1556 outb(0x00, port + 4); 1557} 1558 1559#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1560#define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1561#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1562#define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1563#define EN_CCMD 0x000 /* Chip's command register */ 1564#define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1565#define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1566#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1567#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1568#define EN0_DCFG 0x00E /* Data configuration reg WR */ 1569#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1570#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1571#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1572static int __init mxser_read_register(int port, unsigned short *regs) 1573{ 1574 int i, k, value, id; 1575 unsigned int j; 1576 1577 id = mxser_program_mode(port); 1578 if (id < 0) 1579 return id; 1580 for (i = 0; i < 14; i++) { 1581 k = (i & 0x3F) | 0x180; 1582 for (j = 0x100; j > 0; j >>= 1) { 1583 outb(CHIP_CS, port); 1584 if (k & j) { 1585 outb(CHIP_CS | CHIP_DO, port); 1586 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1587 } else { 1588 outb(CHIP_CS, port); 1589 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1590 } 1591 } 1592 (void)inb(port); 1593 value = 0; 1594 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1595 outb(CHIP_CS, port); 1596 outb(CHIP_CS | CHIP_SK, port); 1597 if (inb(port) & CHIP_DI) 1598 value |= j; 1599 } 1600 regs[i] = value; 1601 outb(0, port); 1602 } 1603 mxser_normal_mode(port); 1604 return id; 1605} 1606 1607static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1608{ 1609 struct mxser_port *port; 1610 struct tty_struct *tty; 1611 int result, status; 1612 unsigned int i, j; 1613 int ret = 0; 1614 1615 switch (cmd) { 1616 case MOXA_GET_MAJOR: 1617 if (printk_ratelimit()) 1618 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1619 "%x (GET_MAJOR), fix your userspace\n", 1620 current->comm, cmd); 1621 return put_user(ttymajor, (int __user *)argp); 1622 1623 case MOXA_CHKPORTENABLE: 1624 result = 0; 1625 lock_kernel(); 1626 for (i = 0; i < MXSER_BOARDS; i++) 1627 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1628 if (mxser_boards[i].ports[j].ioaddr) 1629 result |= (1 << i); 1630 unlock_kernel(); 1631 return put_user(result, (unsigned long __user *)argp); 1632 case MOXA_GETDATACOUNT: 1633 lock_kernel(); 1634 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1635 ret = -EFAULT; 1636 unlock_kernel(); 1637 return ret; 1638 case MOXA_GETMSTATUS: { 1639 struct mxser_mstatus ms, __user *msu = argp; 1640 lock_kernel(); 1641 for (i = 0; i < MXSER_BOARDS; i++) 1642 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1643 port = &mxser_boards[i].ports[j]; 1644 memset(&ms, 0, sizeof(ms)); 1645 1646 if (!port->ioaddr) 1647 goto copy; 1648 1649 tty = tty_port_tty_get(&port->port); 1650 1651 if (!tty || !tty->termios) 1652 ms.cflag = port->normal_termios.c_cflag; 1653 else 1654 ms.cflag = tty->termios->c_cflag; 1655 tty_kref_put(tty); 1656 status = inb(port->ioaddr + UART_MSR); 1657 if (status & UART_MSR_DCD) 1658 ms.dcd = 1; 1659 if (status & UART_MSR_DSR) 1660 ms.dsr = 1; 1661 if (status & UART_MSR_CTS) 1662 ms.cts = 1; 1663 copy: 1664 if (copy_to_user(msu, &ms, sizeof(ms))) { 1665 unlock_kernel(); 1666 return -EFAULT; 1667 } 1668 msu++; 1669 } 1670 unlock_kernel(); 1671 return 0; 1672 } 1673 case MOXA_ASPP_MON_EXT: { 1674 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1675 unsigned int cflag, iflag, p; 1676 u8 opmode; 1677 1678 me = kzalloc(sizeof(*me), GFP_KERNEL); 1679 if (!me) 1680 return -ENOMEM; 1681 1682 lock_kernel(); 1683 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1684 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1685 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1686 i = MXSER_BOARDS; 1687 break; 1688 } 1689 port = &mxser_boards[i].ports[j]; 1690 if (!port->ioaddr) 1691 continue; 1692 1693 status = mxser_get_msr(port->ioaddr, 0, p); 1694 1695 if (status & UART_MSR_TERI) 1696 port->icount.rng++; 1697 if (status & UART_MSR_DDSR) 1698 port->icount.dsr++; 1699 if (status & UART_MSR_DDCD) 1700 port->icount.dcd++; 1701 if (status & UART_MSR_DCTS) 1702 port->icount.cts++; 1703 1704 port->mon_data.modem_status = status; 1705 me->rx_cnt[p] = port->mon_data.rxcnt; 1706 me->tx_cnt[p] = port->mon_data.txcnt; 1707 me->up_rxcnt[p] = port->mon_data.up_rxcnt; 1708 me->up_txcnt[p] = port->mon_data.up_txcnt; 1709 me->modem_status[p] = 1710 port->mon_data.modem_status; 1711 tty = tty_port_tty_get(&port->port); 1712 1713 if (!tty || !tty->termios) { 1714 cflag = port->normal_termios.c_cflag; 1715 iflag = port->normal_termios.c_iflag; 1716 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios); 1717 } else { 1718 cflag = tty->termios->c_cflag; 1719 iflag = tty->termios->c_iflag; 1720 me->baudrate[p] = tty_get_baud_rate(tty); 1721 } 1722 tty_kref_put(tty); 1723 1724 me->databits[p] = cflag & CSIZE; 1725 me->stopbits[p] = cflag & CSTOPB; 1726 me->parity[p] = cflag & (PARENB | PARODD | 1727 CMSPAR); 1728 1729 if (cflag & CRTSCTS) 1730 me->flowctrl[p] |= 0x03; 1731 1732 if (iflag & (IXON | IXOFF)) 1733 me->flowctrl[p] |= 0x0C; 1734 1735 if (port->type == PORT_16550A) 1736 me->fifo[p] = 1; 1737 1738 opmode = inb(port->opmode_ioaddr) >> 1739 ((p % 4) * 2); 1740 opmode &= OP_MODE_MASK; 1741 me->iftype[p] = opmode; 1742 } 1743 } 1744 unlock_kernel(); 1745 if (copy_to_user(argp, me, sizeof(*me))) 1746 ret = -EFAULT; 1747 kfree(me); 1748 return ret; 1749 } 1750 default: 1751 return -ENOIOCTLCMD; 1752 } 1753 return 0; 1754} 1755 1756static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1757 struct async_icount *cprev) 1758{ 1759 struct async_icount cnow; 1760 unsigned long flags; 1761 int ret; 1762 1763 spin_lock_irqsave(&info->slock, flags); 1764 cnow = info->icount; /* atomic copy */ 1765 spin_unlock_irqrestore(&info->slock, flags); 1766 1767 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1768 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1769 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1770 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1771 1772 *cprev = cnow; 1773 1774 return ret; 1775} 1776 1777static int mxser_ioctl(struct tty_struct *tty, struct file *file, 1778 unsigned int cmd, unsigned long arg) 1779{ 1780 struct mxser_port *info = tty->driver_data; 1781 struct async_icount cnow; 1782 unsigned long flags; 1783 void __user *argp = (void __user *)arg; 1784 int retval; 1785 1786 if (tty->index == MXSER_PORTS) 1787 return mxser_ioctl_special(cmd, argp); 1788 1789 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1790 int p; 1791 unsigned long opmode; 1792 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1793 int shiftbit; 1794 unsigned char val, mask; 1795 1796 p = tty->index % 4; 1797 if (cmd == MOXA_SET_OP_MODE) { 1798 if (get_user(opmode, (int __user *) argp)) 1799 return -EFAULT; 1800 if (opmode != RS232_MODE && 1801 opmode != RS485_2WIRE_MODE && 1802 opmode != RS422_MODE && 1803 opmode != RS485_4WIRE_MODE) 1804 return -EFAULT; 1805 lock_kernel(); 1806 mask = ModeMask[p]; 1807 shiftbit = p * 2; 1808 val = inb(info->opmode_ioaddr); 1809 val &= mask; 1810 val |= (opmode << shiftbit); 1811 outb(val, info->opmode_ioaddr); 1812 unlock_kernel(); 1813 } else { 1814 lock_kernel(); 1815 shiftbit = p * 2; 1816 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1817 opmode &= OP_MODE_MASK; 1818 unlock_kernel(); 1819 if (put_user(opmode, (int __user *)argp)) 1820 return -EFAULT; 1821 } 1822 return 0; 1823 } 1824 1825 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && 1826 test_bit(TTY_IO_ERROR, &tty->flags)) 1827 return -EIO; 1828 1829 switch (cmd) { 1830 case TIOCGSERIAL: 1831 lock_kernel(); 1832 retval = mxser_get_serial_info(tty, argp); 1833 unlock_kernel(); 1834 return retval; 1835 case TIOCSSERIAL: 1836 lock_kernel(); 1837 retval = mxser_set_serial_info(tty, argp); 1838 unlock_kernel(); 1839 return retval; 1840 case TIOCSERGETLSR: /* Get line status register */ 1841 return mxser_get_lsr_info(info, argp); 1842 /* 1843 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1844 * - mask passed in arg for lines of interest 1845 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1846 * Caller should use TIOCGICOUNT to see which one it was 1847 */ 1848 case TIOCMIWAIT: 1849 spin_lock_irqsave(&info->slock, flags); 1850 cnow = info->icount; /* note the counters on entry */ 1851 spin_unlock_irqrestore(&info->slock, flags); 1852 1853 return wait_event_interruptible(info->delta_msr_wait, 1854 mxser_cflags_changed(info, arg, &cnow)); 1855 /* 1856 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1857 * Return: write counters to the user passed counter struct 1858 * NB: both 1->0 and 0->1 transitions are counted except for 1859 * RI where only 0->1 is counted. 1860 */ 1861 case TIOCGICOUNT: { 1862 struct serial_icounter_struct icnt = { 0 }; 1863 spin_lock_irqsave(&info->slock, flags); 1864 cnow = info->icount; 1865 spin_unlock_irqrestore(&info->slock, flags); 1866 1867 icnt.frame = cnow.frame; 1868 icnt.brk = cnow.brk; 1869 icnt.overrun = cnow.overrun; 1870 icnt.buf_overrun = cnow.buf_overrun; 1871 icnt.parity = cnow.parity; 1872 icnt.rx = cnow.rx; 1873 icnt.tx = cnow.tx; 1874 icnt.cts = cnow.cts; 1875 icnt.dsr = cnow.dsr; 1876 icnt.rng = cnow.rng; 1877 icnt.dcd = cnow.dcd; 1878 1879 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0; 1880 } 1881 case MOXA_HighSpeedOn: 1882 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1883 case MOXA_SDS_RSTICOUNTER: 1884 lock_kernel(); 1885 info->mon_data.rxcnt = 0; 1886 info->mon_data.txcnt = 0; 1887 unlock_kernel(); 1888 return 0; 1889 1890 case MOXA_ASPP_OQUEUE:{ 1891 int len, lsr; 1892 1893 lock_kernel(); 1894 len = mxser_chars_in_buffer(tty); 1895 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; 1896 len += (lsr ? 0 : 1); 1897 unlock_kernel(); 1898 1899 return put_user(len, (int __user *)argp); 1900 } 1901 case MOXA_ASPP_MON: { 1902 int mcr, status; 1903 1904 lock_kernel(); 1905 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1906 mxser_check_modem_status(tty, info, status); 1907 1908 mcr = inb(info->ioaddr + UART_MCR); 1909 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1910 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1911 else 1912 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1913 1914 if (mcr & MOXA_MUST_MCR_TX_XON) 1915 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1916 else 1917 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1918 1919 if (tty->hw_stopped) 1920 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1921 else 1922 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1923 unlock_kernel(); 1924 if (copy_to_user(argp, &info->mon_data, 1925 sizeof(struct mxser_mon))) 1926 return -EFAULT; 1927 1928 return 0; 1929 } 1930 case MOXA_ASPP_LSTATUS: { 1931 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1932 return -EFAULT; 1933 1934 info->err_shadow = 0; 1935 return 0; 1936 } 1937 case MOXA_SET_BAUD_METHOD: { 1938 int method; 1939 1940 if (get_user(method, (int __user *)argp)) 1941 return -EFAULT; 1942 mxser_set_baud_method[tty->index] = method; 1943 return put_user(method, (int __user *)argp); 1944 } 1945 default: 1946 return -ENOIOCTLCMD; 1947 } 1948 return 0; 1949} 1950 1951static void mxser_stoprx(struct tty_struct *tty) 1952{ 1953 struct mxser_port *info = tty->driver_data; 1954 1955 info->ldisc_stop_rx = 1; 1956 if (I_IXOFF(tty)) { 1957 if (info->board->chip_flag) { 1958 info->IER &= ~MOXA_MUST_RECV_ISR; 1959 outb(info->IER, info->ioaddr + UART_IER); 1960 } else { 1961 info->x_char = STOP_CHAR(tty); 1962 outb(0, info->ioaddr + UART_IER); 1963 info->IER |= UART_IER_THRI; 1964 outb(info->IER, info->ioaddr + UART_IER); 1965 } 1966 } 1967 1968 if (tty->termios->c_cflag & CRTSCTS) { 1969 info->MCR &= ~UART_MCR_RTS; 1970 outb(info->MCR, info->ioaddr + UART_MCR); 1971 } 1972} 1973 1974/* 1975 * This routine is called by the upper-layer tty layer to signal that 1976 * incoming characters should be throttled. 1977 */ 1978static void mxser_throttle(struct tty_struct *tty) 1979{ 1980 mxser_stoprx(tty); 1981} 1982 1983static void mxser_unthrottle(struct tty_struct *tty) 1984{ 1985 struct mxser_port *info = tty->driver_data; 1986 1987 /* startrx */ 1988 info->ldisc_stop_rx = 0; 1989 if (I_IXOFF(tty)) { 1990 if (info->x_char) 1991 info->x_char = 0; 1992 else { 1993 if (info->board->chip_flag) { 1994 info->IER |= MOXA_MUST_RECV_ISR; 1995 outb(info->IER, info->ioaddr + UART_IER); 1996 } else { 1997 info->x_char = START_CHAR(tty); 1998 outb(0, info->ioaddr + UART_IER); 1999 info->IER |= UART_IER_THRI; 2000 outb(info->IER, info->ioaddr + UART_IER); 2001 } 2002 } 2003 } 2004 2005 if (tty->termios->c_cflag & CRTSCTS) { 2006 info->MCR |= UART_MCR_RTS; 2007 outb(info->MCR, info->ioaddr + UART_MCR); 2008 } 2009} 2010 2011/* 2012 * mxser_stop() and mxser_start() 2013 * 2014 * This routines are called before setting or resetting tty->stopped. 2015 * They enable or disable transmitter interrupts, as necessary. 2016 */ 2017static void mxser_stop(struct tty_struct *tty) 2018{ 2019 struct mxser_port *info = tty->driver_data; 2020 unsigned long flags; 2021 2022 spin_lock_irqsave(&info->slock, flags); 2023 if (info->IER & UART_IER_THRI) { 2024 info->IER &= ~UART_IER_THRI; 2025 outb(info->IER, info->ioaddr + UART_IER); 2026 } 2027 spin_unlock_irqrestore(&info->slock, flags); 2028} 2029 2030static void mxser_start(struct tty_struct *tty) 2031{ 2032 struct mxser_port *info = tty->driver_data; 2033 unsigned long flags; 2034 2035 spin_lock_irqsave(&info->slock, flags); 2036 if (info->xmit_cnt && info->port.xmit_buf) { 2037 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 2038 info->IER |= UART_IER_THRI; 2039 outb(info->IER, info->ioaddr + UART_IER); 2040 } 2041 spin_unlock_irqrestore(&info->slock, flags); 2042} 2043 2044static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 2045{ 2046 struct mxser_port *info = tty->driver_data; 2047 unsigned long flags; 2048 2049 spin_lock_irqsave(&info->slock, flags); 2050 mxser_change_speed(tty, old_termios); 2051 spin_unlock_irqrestore(&info->slock, flags); 2052 2053 if ((old_termios->c_cflag & CRTSCTS) && 2054 !(tty->termios->c_cflag & CRTSCTS)) { 2055 tty->hw_stopped = 0; 2056 mxser_start(tty); 2057 } 2058 2059 /* Handle sw stopped */ 2060 if ((old_termios->c_iflag & IXON) && 2061 !(tty->termios->c_iflag & IXON)) { 2062 tty->stopped = 0; 2063 2064 if (info->board->chip_flag) { 2065 spin_lock_irqsave(&info->slock, flags); 2066 mxser_disable_must_rx_software_flow_control( 2067 info->ioaddr); 2068 spin_unlock_irqrestore(&info->slock, flags); 2069 } 2070 2071 mxser_start(tty); 2072 } 2073} 2074 2075/* 2076 * mxser_wait_until_sent() --- wait until the transmitter is empty 2077 */ 2078static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 2079{ 2080 struct mxser_port *info = tty->driver_data; 2081 unsigned long orig_jiffies, char_time; 2082 int lsr; 2083 2084 if (info->type == PORT_UNKNOWN) 2085 return; 2086 2087 if (info->xmit_fifo_size == 0) 2088 return; /* Just in case.... */ 2089 2090 orig_jiffies = jiffies; 2091 /* 2092 * Set the check interval to be 1/5 of the estimated time to 2093 * send a single character, and make it at least 1. The check 2094 * interval should also be less than the timeout. 2095 * 2096 * Note: we have to use pretty tight timings here to satisfy 2097 * the NIST-PCTS. 2098 */ 2099 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 2100 char_time = char_time / 5; 2101 if (char_time == 0) 2102 char_time = 1; 2103 if (timeout && timeout < char_time) 2104 char_time = timeout; 2105 /* 2106 * If the transmitter hasn't cleared in twice the approximate 2107 * amount of time to send the entire FIFO, it probably won't 2108 * ever clear. This assumes the UART isn't doing flow 2109 * control, which is currently the case. Hence, if it ever 2110 * takes longer than info->timeout, this is probably due to a 2111 * UART bug of some kind. So, we clamp the timeout parameter at 2112 * 2*info->timeout. 2113 */ 2114 if (!timeout || timeout > 2 * info->timeout) 2115 timeout = 2 * info->timeout; 2116#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 2117 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", 2118 timeout, char_time); 2119 printk("jiff=%lu...", jiffies); 2120#endif 2121 lock_kernel(); 2122 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2123#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 2124 printk("lsr = %d (jiff=%lu)...", lsr, jiffies); 2125#endif 2126 schedule_timeout_interruptible(char_time); 2127 if (signal_pending(current)) 2128 break; 2129 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2130 break; 2131 } 2132 set_current_state(TASK_RUNNING); 2133 unlock_kernel(); 2134 2135#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 2136 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); 2137#endif 2138} 2139 2140/* 2141 * This routine is called by tty_hangup() when a hangup is signaled. 2142 */ 2143static void mxser_hangup(struct tty_struct *tty) 2144{ 2145 struct mxser_port *info = tty->driver_data; 2146 2147 mxser_flush_buffer(tty); 2148 mxser_shutdown(tty); 2149 info->port.count = 0; 2150 info->port.flags &= ~ASYNC_NORMAL_ACTIVE; 2151 tty_port_tty_set(&info->port, NULL); 2152 wake_up_interruptible(&info->port.open_wait); 2153} 2154 2155/* 2156 * mxser_rs_break() --- routine which turns the break handling on or off 2157 */ 2158static int mxser_rs_break(struct tty_struct *tty, int break_state) 2159{ 2160 struct mxser_port *info = tty->driver_data; 2161 unsigned long flags; 2162 2163 spin_lock_irqsave(&info->slock, flags); 2164 if (break_state == -1) 2165 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2166 info->ioaddr + UART_LCR); 2167 else 2168 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2169 info->ioaddr + UART_LCR); 2170 spin_unlock_irqrestore(&info->slock, flags); 2171 return 0; 2172} 2173 2174static void mxser_receive_chars(struct tty_struct *tty, 2175 struct mxser_port *port, int *status) 2176{ 2177 unsigned char ch, gdl; 2178 int ignored = 0; 2179 int cnt = 0; 2180 int recv_room; 2181 int max = 256; 2182 2183 recv_room = tty->receive_room; 2184 if (recv_room == 0 && !port->ldisc_stop_rx) 2185 mxser_stoprx(tty); 2186 if (port->board->chip_flag != MOXA_OTHER_UART) { 2187 2188 if (*status & UART_LSR_SPECIAL) 2189 goto intr_old; 2190 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2191 (*status & MOXA_MUST_LSR_RERR)) 2192 goto intr_old; 2193 if (*status & MOXA_MUST_LSR_RERR) 2194 goto intr_old; 2195 2196 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2197 2198 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2199 gdl &= MOXA_MUST_GDL_MASK; 2200 if (gdl >= recv_room) { 2201 if (!port->ldisc_stop_rx) 2202 mxser_stoprx(tty); 2203 } 2204 while (gdl--) { 2205 ch = inb(port->ioaddr + UART_RX); 2206 tty_insert_flip_char(tty, ch, 0); 2207 cnt++; 2208 } 2209 goto end_intr; 2210 } 2211intr_old: 2212 2213 do { 2214 if (max-- < 0) 2215 break; 2216 2217 ch = inb(port->ioaddr + UART_RX); 2218 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2219 outb(0x23, port->ioaddr + UART_FCR); 2220 *status &= port->read_status_mask; 2221 if (*status & port->ignore_status_mask) { 2222 if (++ignored > 100) 2223 break; 2224 } else { 2225 char flag = 0; 2226 if (*status & UART_LSR_SPECIAL) { 2227 if (*status & UART_LSR_BI) { 2228 flag = TTY_BREAK; 2229 port->icount.brk++; 2230 2231 if (port->port.flags & ASYNC_SAK) 2232 do_SAK(tty); 2233 } else if (*status & UART_LSR_PE) { 2234 flag = TTY_PARITY; 2235 port->icount.parity++; 2236 } else if (*status & UART_LSR_FE) { 2237 flag = TTY_FRAME; 2238 port->icount.frame++; 2239 } else if (*status & UART_LSR_OE) { 2240 flag = TTY_OVERRUN; 2241 port->icount.overrun++; 2242 } else 2243 flag = TTY_BREAK; 2244 } 2245 tty_insert_flip_char(tty, ch, flag); 2246 cnt++; 2247 if (cnt >= recv_room) { 2248 if (!port->ldisc_stop_rx) 2249 mxser_stoprx(tty); 2250 break; 2251 } 2252 2253 } 2254 2255 if (port->board->chip_flag) 2256 break; 2257 2258 *status = inb(port->ioaddr + UART_LSR); 2259 } while (*status & UART_LSR_DR); 2260 2261end_intr: 2262 mxvar_log.rxcnt[tty->index] += cnt; 2263 port->mon_data.rxcnt += cnt; 2264 port->mon_data.up_rxcnt += cnt; 2265 2266 /* 2267 * We are called from an interrupt context with &port->slock 2268 * being held. Drop it temporarily in order to prevent 2269 * recursive locking. 2270 */ 2271 spin_unlock(&port->slock); 2272 tty_flip_buffer_push(tty); 2273 spin_lock(&port->slock); 2274} 2275 2276static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2277{ 2278 int count, cnt; 2279 2280 if (port->x_char) { 2281 outb(port->x_char, port->ioaddr + UART_TX); 2282 port->x_char = 0; 2283 mxvar_log.txcnt[tty->index]++; 2284 port->mon_data.txcnt++; 2285 port->mon_data.up_txcnt++; 2286 port->icount.tx++; 2287 return; 2288 } 2289 2290 if (port->port.xmit_buf == NULL) 2291 return; 2292 2293 if (port->xmit_cnt <= 0 || tty->stopped || 2294 (tty->hw_stopped && 2295 (port->type != PORT_16550A) && 2296 (!port->board->chip_flag))) { 2297 port->IER &= ~UART_IER_THRI; 2298 outb(port->IER, port->ioaddr + UART_IER); 2299 return; 2300 } 2301 2302 cnt = port->xmit_cnt; 2303 count = port->xmit_fifo_size; 2304 do { 2305 outb(port->port.xmit_buf[port->xmit_tail++], 2306 port->ioaddr + UART_TX); 2307 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2308 if (--port->xmit_cnt <= 0) 2309 break; 2310 } while (--count > 0); 2311 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2312 2313 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2314 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2315 port->icount.tx += (cnt - port->xmit_cnt); 2316 2317 if (port->xmit_cnt < WAKEUP_CHARS && tty) 2318 tty_wakeup(tty); 2319 2320 if (port->xmit_cnt <= 0) { 2321 port->IER &= ~UART_IER_THRI; 2322 outb(port->IER, port->ioaddr + UART_IER); 2323 } 2324} 2325 2326/* 2327 * This is the serial driver's generic interrupt routine 2328 */ 2329static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2330{ 2331 int status, iir, i; 2332 struct mxser_board *brd = NULL; 2333 struct mxser_port *port; 2334 int max, irqbits, bits, msr; 2335 unsigned int int_cnt, pass_counter = 0; 2336 int handled = IRQ_NONE; 2337 struct tty_struct *tty; 2338 2339 for (i = 0; i < MXSER_BOARDS; i++) 2340 if (dev_id == &mxser_boards[i]) { 2341 brd = dev_id; 2342 break; 2343 } 2344 2345 if (i == MXSER_BOARDS) 2346 goto irq_stop; 2347 if (brd == NULL) 2348 goto irq_stop; 2349 max = brd->info->nports; 2350 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2351 irqbits = inb(brd->vector) & brd->vector_mask; 2352 if (irqbits == brd->vector_mask) 2353 break; 2354 2355 handled = IRQ_HANDLED; 2356 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2357 if (irqbits == brd->vector_mask) 2358 break; 2359 if (bits & irqbits) 2360 continue; 2361 port = &brd->ports[i]; 2362 2363 int_cnt = 0; 2364 spin_lock(&port->slock); 2365 do { 2366 iir = inb(port->ioaddr + UART_IIR); 2367 if (iir & UART_IIR_NO_INT) 2368 break; 2369 iir &= MOXA_MUST_IIR_MASK; 2370 tty = tty_port_tty_get(&port->port); 2371 if (!tty || 2372 (port->port.flags & ASYNC_CLOSING) || 2373 !(port->port.flags & 2374 ASYNC_INITIALIZED)) { 2375 status = inb(port->ioaddr + UART_LSR); 2376 outb(0x27, port->ioaddr + UART_FCR); 2377 inb(port->ioaddr + UART_MSR); 2378 tty_kref_put(tty); 2379 break; 2380 } 2381 2382 status = inb(port->ioaddr + UART_LSR); 2383 2384 if (status & UART_LSR_PE) 2385 port->err_shadow |= NPPI_NOTIFY_PARITY; 2386 if (status & UART_LSR_FE) 2387 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2388 if (status & UART_LSR_OE) 2389 port->err_shadow |= 2390 NPPI_NOTIFY_HW_OVERRUN; 2391 if (status & UART_LSR_BI) 2392 port->err_shadow |= NPPI_NOTIFY_BREAK; 2393 2394 if (port->board->chip_flag) { 2395 if (iir == MOXA_MUST_IIR_GDA || 2396 iir == MOXA_MUST_IIR_RDA || 2397 iir == MOXA_MUST_IIR_RTO || 2398 iir == MOXA_MUST_IIR_LSR) 2399 mxser_receive_chars(tty, port, 2400 &status); 2401 2402 } else { 2403 status &= port->read_status_mask; 2404 if (status & UART_LSR_DR) 2405 mxser_receive_chars(tty, port, 2406 &status); 2407 } 2408 msr = inb(port->ioaddr + UART_MSR); 2409 if (msr & UART_MSR_ANY_DELTA) 2410 mxser_check_modem_status(tty, port, msr); 2411 2412 if (port->board->chip_flag) { 2413 if (iir == 0x02 && (status & 2414 UART_LSR_THRE)) 2415 mxser_transmit_chars(tty, port); 2416 } else { 2417 if (status & UART_LSR_THRE) 2418 mxser_transmit_chars(tty, port); 2419 } 2420 tty_kref_put(tty); 2421 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2422 spin_unlock(&port->slock); 2423 } 2424 } 2425 2426irq_stop: 2427 return handled; 2428} 2429 2430static const struct tty_operations mxser_ops = { 2431 .open = mxser_open, 2432 .close = mxser_close, 2433 .write = mxser_write, 2434 .put_char = mxser_put_char, 2435 .flush_chars = mxser_flush_chars, 2436 .write_room = mxser_write_room, 2437 .chars_in_buffer = mxser_chars_in_buffer, 2438 .flush_buffer = mxser_flush_buffer, 2439 .ioctl = mxser_ioctl, 2440 .throttle = mxser_throttle, 2441 .unthrottle = mxser_unthrottle, 2442 .set_termios = mxser_set_termios, 2443 .stop = mxser_stop, 2444 .start = mxser_start, 2445 .hangup = mxser_hangup, 2446 .break_ctl = mxser_rs_break, 2447 .wait_until_sent = mxser_wait_until_sent, 2448 .tiocmget = mxser_tiocmget, 2449 .tiocmset = mxser_tiocmset, 2450}; 2451 2452/* 2453 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2454 */ 2455 2456static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, 2457 unsigned int irq) 2458{ 2459 if (irq) 2460 free_irq(brd->irq, brd); 2461 if (pdev != NULL) { /* PCI */ 2462#ifdef CONFIG_PCI 2463 pci_release_region(pdev, 2); 2464 pci_release_region(pdev, 3); 2465#endif 2466 } else { 2467 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2468 release_region(brd->vector, 1); 2469 } 2470} 2471 2472static int __devinit mxser_initbrd(struct mxser_board *brd, 2473 struct pci_dev *pdev) 2474{ 2475 struct mxser_port *info; 2476 unsigned int i; 2477 int retval; 2478 2479 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2480 brd->ports[0].max_baud); 2481 2482 for (i = 0; i < brd->info->nports; i++) { 2483 info = &brd->ports[i]; 2484 tty_port_init(&info->port); 2485 info->board = brd; 2486 info->stop_rx = 0; 2487 info->ldisc_stop_rx = 0; 2488 2489 /* Enhance mode enabled here */ 2490 if (brd->chip_flag != MOXA_OTHER_UART) 2491 mxser_enable_must_enchance_mode(info->ioaddr); 2492 2493 info->port.flags = ASYNC_SHARE_IRQ; 2494 info->type = brd->uart_type; 2495 2496 process_txrx_fifo(info); 2497 2498 info->custom_divisor = info->baud_base * 16; 2499 info->port.close_delay = 5 * HZ / 10; 2500 info->port.closing_wait = 30 * HZ; 2501 info->normal_termios = mxvar_sdriver->init_termios; 2502 init_waitqueue_head(&info->delta_msr_wait); 2503 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2504 info->err_shadow = 0; 2505 spin_lock_init(&info->slock); 2506 2507 /* before set INT ISR, disable all int */ 2508 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2509 info->ioaddr + UART_IER); 2510 } 2511 2512 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2513 brd); 2514 if (retval) { 2515 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2516 "conflict with another device.\n", 2517 brd->info->name, brd->irq); 2518 /* We hold resources, we need to release them. */ 2519 mxser_release_res(brd, pdev, 0); 2520 } 2521 return retval; 2522} 2523 2524static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2525{ 2526 int id, i, bits; 2527 unsigned short regs[16], irq; 2528 unsigned char scratch, scratch2; 2529 2530 brd->chip_flag = MOXA_OTHER_UART; 2531 2532 id = mxser_read_register(cap, regs); 2533 switch (id) { 2534 case C168_ASIC_ID: 2535 brd->info = &mxser_cards[0]; 2536 break; 2537 case C104_ASIC_ID: 2538 brd->info = &mxser_cards[1]; 2539 break; 2540 case CI104J_ASIC_ID: 2541 brd->info = &mxser_cards[2]; 2542 break; 2543 case C102_ASIC_ID: 2544 brd->info = &mxser_cards[5]; 2545 break; 2546 case CI132_ASIC_ID: 2547 brd->info = &mxser_cards[6]; 2548 break; 2549 case CI134_ASIC_ID: 2550 brd->info = &mxser_cards[7]; 2551 break; 2552 default: 2553 return 0; 2554 } 2555 2556 irq = 0; 2557 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2558 Flag-hack checks if configuration should be read as 2-port here. */ 2559 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2560 irq = regs[9] & 0xF000; 2561 irq = irq | (irq >> 4); 2562 if (irq != (regs[9] & 0xFF00)) 2563 goto err_irqconflict; 2564 } else if (brd->info->nports == 4) { 2565 irq = regs[9] & 0xF000; 2566 irq = irq | (irq >> 4); 2567 irq = irq | (irq >> 8); 2568 if (irq != regs[9]) 2569 goto err_irqconflict; 2570 } else if (brd->info->nports == 8) { 2571 irq = regs[9] & 0xF000; 2572 irq = irq | (irq >> 4); 2573 irq = irq | (irq >> 8); 2574 if ((irq != regs[9]) || (irq != regs[10])) 2575 goto err_irqconflict; 2576 } 2577 2578 if (!irq) { 2579 printk(KERN_ERR "mxser: interrupt number unset\n"); 2580 return -EIO; 2581 } 2582 brd->irq = ((int)(irq & 0xF000) >> 12); 2583 for (i = 0; i < 8; i++) 2584 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2585 if ((regs[12] & 0x80) == 0) { 2586 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2587 return -EIO; 2588 } 2589 brd->vector = (int)regs[11]; /* interrupt vector */ 2590 if (id == 1) 2591 brd->vector_mask = 0x00FF; 2592 else 2593 brd->vector_mask = 0x000F; 2594 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2595 if (regs[12] & bits) { 2596 brd->ports[i].baud_base = 921600; 2597 brd->ports[i].max_baud = 921600; 2598 } else { 2599 brd->ports[i].baud_base = 115200; 2600 brd->ports[i].max_baud = 115200; 2601 } 2602 } 2603 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2604 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2605 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2606 outb(scratch2, cap + UART_LCR); 2607 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2608 scratch = inb(cap + UART_IIR); 2609 2610 if (scratch & 0xC0) 2611 brd->uart_type = PORT_16550A; 2612 else 2613 brd->uart_type = PORT_16450; 2614 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2615 "mxser(IO)")) { 2616 printk(KERN_ERR "mxser: can't request ports I/O region: " 2617 "0x%.8lx-0x%.8lx\n", 2618 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2619 8 * brd->info->nports - 1); 2620 return -EIO; 2621 } 2622 if (!request_region(brd->vector, 1, "mxser(vector)")) { 2623 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2624 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2625 "0x%.8lx-0x%.8lx\n", 2626 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2627 8 * brd->info->nports - 1); 2628 return -EIO; 2629 } 2630 return brd->info->nports; 2631 2632err_irqconflict: 2633 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2634 return -EIO; 2635} 2636 2637static int __devinit mxser_probe(struct pci_dev *pdev, 2638 const struct pci_device_id *ent) 2639{ 2640#ifdef CONFIG_PCI 2641 struct mxser_board *brd; 2642 unsigned int i, j; 2643 unsigned long ioaddress; 2644 int retval = -EINVAL; 2645 2646 for (i = 0; i < MXSER_BOARDS; i++) 2647 if (mxser_boards[i].info == NULL) 2648 break; 2649 2650 if (i >= MXSER_BOARDS) { 2651 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2652 "not configured\n", MXSER_BOARDS); 2653 goto err; 2654 } 2655 2656 brd = &mxser_boards[i]; 2657 brd->idx = i * MXSER_PORTS_PER_BOARD; 2658 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2659 mxser_cards[ent->driver_data].name, 2660 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2661 2662 retval = pci_enable_device(pdev); 2663 if (retval) { 2664 dev_err(&pdev->dev, "PCI enable failed\n"); 2665 goto err; 2666 } 2667 2668 /* io address */ 2669 ioaddress = pci_resource_start(pdev, 2); 2670 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2671 if (retval) 2672 goto err; 2673 2674 brd->info = &mxser_cards[ent->driver_data]; 2675 for (i = 0; i < brd->info->nports; i++) 2676 brd->ports[i].ioaddr = ioaddress + 8 * i; 2677 2678 /* vector */ 2679 ioaddress = pci_resource_start(pdev, 3); 2680 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2681 if (retval) 2682 goto err_relio; 2683 brd->vector = ioaddress; 2684 2685 /* irq */ 2686 brd->irq = pdev->irq; 2687 2688 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2689 brd->uart_type = PORT_16550A; 2690 brd->vector_mask = 0; 2691 2692 for (i = 0; i < brd->info->nports; i++) { 2693 for (j = 0; j < UART_INFO_NUM; j++) { 2694 if (Gpci_uart_info[j].type == brd->chip_flag) { 2695 brd->ports[i].max_baud = 2696 Gpci_uart_info[j].max_baud; 2697 2698 /* exception....CP-102 */ 2699 if (brd->info->flags & MXSER_HIGHBAUD) 2700 brd->ports[i].max_baud = 921600; 2701 break; 2702 } 2703 } 2704 } 2705 2706 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2707 for (i = 0; i < brd->info->nports; i++) { 2708 if (i < 4) 2709 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2710 else 2711 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2712 } 2713 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2714 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2715 } 2716 2717 for (i = 0; i < brd->info->nports; i++) { 2718 brd->vector_mask |= (1 << i); 2719 brd->ports[i].baud_base = 921600; 2720 } 2721 2722 /* mxser_initbrd will hook ISR. */ 2723 retval = mxser_initbrd(brd, pdev); 2724 if (retval) 2725 goto err_null; 2726 2727 for (i = 0; i < brd->info->nports; i++) 2728 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); 2729 2730 pci_set_drvdata(pdev, brd); 2731 2732 return 0; 2733err_relio: 2734 pci_release_region(pdev, 2); 2735err_null: 2736 brd->info = NULL; 2737err: 2738 return retval; 2739#else 2740 return -ENODEV; 2741#endif 2742} 2743 2744static void __devexit mxser_remove(struct pci_dev *pdev) 2745{ 2746 struct mxser_board *brd = pci_get_drvdata(pdev); 2747 unsigned int i; 2748 2749 for (i = 0; i < brd->info->nports; i++) 2750 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2751 2752 mxser_release_res(brd, pdev, 1); 2753 brd->info = NULL; 2754} 2755 2756static struct pci_driver mxser_driver = { 2757 .name = "mxser", 2758 .id_table = mxser_pcibrds, 2759 .probe = mxser_probe, 2760 .remove = __devexit_p(mxser_remove) 2761}; 2762 2763static int __init mxser_module_init(void) 2764{ 2765 struct mxser_board *brd; 2766 unsigned int b, i, m; 2767 int retval; 2768 2769 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2770 if (!mxvar_sdriver) 2771 return -ENOMEM; 2772 2773 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2774 MXSER_VERSION); 2775 2776 /* Initialize the tty_driver structure */ 2777 mxvar_sdriver->owner = THIS_MODULE; 2778 mxvar_sdriver->magic = TTY_DRIVER_MAGIC; 2779 mxvar_sdriver->name = "ttyMI"; 2780 mxvar_sdriver->major = ttymajor; 2781 mxvar_sdriver->minor_start = 0; 2782 mxvar_sdriver->num = MXSER_PORTS + 1; 2783 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2784 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2785 mxvar_sdriver->init_termios = tty_std_termios; 2786 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2787 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2788 tty_set_operations(mxvar_sdriver, &mxser_ops); 2789 2790 retval = tty_register_driver(mxvar_sdriver); 2791 if (retval) { 2792 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2793 "tty driver !\n"); 2794 goto err_put; 2795 } 2796 2797 /* Start finding ISA boards here */ 2798 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2799 if (!ioaddr[b]) 2800 continue; 2801 2802 brd = &mxser_boards[m]; 2803 retval = mxser_get_ISA_conf(!ioaddr[b], brd); 2804 if (retval <= 0) { 2805 brd->info = NULL; 2806 continue; 2807 } 2808 2809 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2810 brd->info->name, ioaddr[b]); 2811 2812 /* mxser_initbrd will hook ISR. */ 2813 if (mxser_initbrd(brd, NULL) < 0) { 2814 brd->info = NULL; 2815 continue; 2816 } 2817 2818 brd->idx = m * MXSER_PORTS_PER_BOARD; 2819 for (i = 0; i < brd->info->nports; i++) 2820 tty_register_device(mxvar_sdriver, brd->idx + i, NULL); 2821 2822 m++; 2823 } 2824 2825 retval = pci_register_driver(&mxser_driver); 2826 if (retval) { 2827 printk(KERN_ERR "mxser: can't register pci driver\n"); 2828 if (!m) { 2829 retval = -ENODEV; 2830 goto err_unr; 2831 } /* else: we have some ISA cards under control */ 2832 } 2833 2834 return 0; 2835err_unr: 2836 tty_unregister_driver(mxvar_sdriver); 2837err_put: 2838 put_tty_driver(mxvar_sdriver); 2839 return retval; 2840} 2841 2842static void __exit mxser_module_exit(void) 2843{ 2844 unsigned int i, j; 2845 2846 pci_unregister_driver(&mxser_driver); 2847 2848 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2849 if (mxser_boards[i].info != NULL) 2850 for (j = 0; j < mxser_boards[i].info->nports; j++) 2851 tty_unregister_device(mxvar_sdriver, 2852 mxser_boards[i].idx + j); 2853 tty_unregister_driver(mxvar_sdriver); 2854 put_tty_driver(mxvar_sdriver); 2855 2856 for (i = 0; i < MXSER_BOARDS; i++) 2857 if (mxser_boards[i].info != NULL) 2858 mxser_release_res(&mxser_boards[i], NULL, 1); 2859} 2860 2861module_init(mxser_module_init); 2862module_exit(mxser_module_exit);