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at caac3a444ce3b5a8d76069abfbb699d2a65b3f09 163 lines 5.4 kB view raw
1/* 2 * ibm_ocp.h 3 * 4 * (c) Benjamin Herrenschmidt (benh@kernel.crashing.org) 5 * Mipsys - France 6 * 7 * Derived from work (c) Armin Kuster akuster@pacbell.net 8 * 9 * Additional support and port to 2.6 LDM/sysfs by 10 * Matt Porter <mporter@kernel.crashing.org> 11 * Copyright 2003-2004 MontaVista Software, Inc. 12 * 13 * This program is free software; you can redistribute it and/or modify it 14 * under the terms of the GNU General Public License as published by the 15 * Free Software Foundation; either version 2 of the License, or (at your 16 * option) any later version. 17 * 18 */ 19#ifdef __KERNEL__ 20#ifndef __IBM_OCP_H__ 21#define __IBM_OCP_H__ 22 23#include <asm/types.h> 24 25/* 26 * IBM 4xx OCP system information 27 */ 28struct ocp_sys_info_data { 29 int opb_bus_freq; /* OPB Bus Frequency (Hz) */ 30 int ebc_bus_freq; /* EBC Bus Frequency (Hz) */ 31}; 32 33extern struct ocp_sys_info_data ocp_sys_info; 34 35/* 36 * EMAC additional data and sysfs support 37 * 38 * Note about mdio_idx: When you have a zmii, it's usually 39 * not necessary, it covers the case of the 405EP which has 40 * the MDIO lines on EMAC0 only 41 * 42 * Note about phy_map: Per EMAC map of PHY ids which should 43 * be probed by emac_probe. Different EMACs can have 44 * overlapping maps. 45 * 46 * Note, this map uses inverse logic for bits: 47 * 0 - id should be probed 48 * 1 - id should be ignored 49 * 50 * Default value of 0x00000000 - will result in usual 51 * auto-detection logic. 52 * 53 */ 54 55struct ocp_func_emac_data { 56 int rgmii_idx; /* RGMII device index or -1 */ 57 int rgmii_mux; /* RGMII input of this EMAC */ 58 int zmii_idx; /* ZMII device index or -1 */ 59 int zmii_mux; /* ZMII input of this EMAC */ 60 int mal_idx; /* MAL device index */ 61 int mal_rx_chan; /* MAL rx channel number */ 62 int mal_tx_chan; /* MAL tx channel number */ 63 int wol_irq; /* WOL interrupt */ 64 int mdio_idx; /* EMAC idx of MDIO master or -1 */ 65 int tah_idx; /* TAH device index or -1 */ 66 int jumbo; /* Jumbo frames capable flag */ 67 int phy_mode; /* PHY type or configurable mode */ 68 u8 mac_addr[6]; /* EMAC mac address */ 69 u32 phy_map; /* EMAC phy map */ 70}; 71 72/* Sysfs support */ 73#define OCP_SYSFS_EMAC_DATA() \ 74OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_idx) \ 75OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_mux) \ 76OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_idx) \ 77OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_rx_chan) \ 78OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_tx_chan) \ 79OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, wol_irq) \ 80OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mdio_idx) \ 81 \ 82void ocp_show_emac_data(struct device *dev) \ 83{ \ 84 device_create_file(dev, &dev_attr_emac_zmii_idx); \ 85 device_create_file(dev, &dev_attr_emac_zmii_mux); \ 86 device_create_file(dev, &dev_attr_emac_mal_idx); \ 87 device_create_file(dev, &dev_attr_emac_mal_rx_chan); \ 88 device_create_file(dev, &dev_attr_emac_mal_tx_chan); \ 89 device_create_file(dev, &dev_attr_emac_wol_irq); \ 90 device_create_file(dev, &dev_attr_emac_mdio_idx); \ 91} 92 93#ifdef CONFIG_40x 94/* 95 * Helper function to copy MAC addresses from the bd_t to OCP EMAC 96 * additions. 97 * 98 * The range of EMAC indices (inclusive) to be copied are the arguments. 99 */ 100static inline void ibm_ocp_set_emac(int start, int end) 101{ 102 int i; 103 struct ocp_def *def; 104 105 /* Copy MAC addresses to EMAC additions */ 106 for (i=start; i<=end; i++) { 107 def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); 108 memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr, 109 &__res.bi_enetaddr[i], 110 6); 111 } 112} 113#endif 114 115/* 116 * MAL additional data and sysfs support 117 */ 118struct ocp_func_mal_data { 119 int num_tx_chans; /* Number of TX channels */ 120 int num_rx_chans; /* Number of RX channels */ 121 int txeob_irq; /* TX End Of Buffer IRQ */ 122 int rxeob_irq; /* RX End Of Buffer IRQ */ 123 int txde_irq; /* TX Descriptor Error IRQ */ 124 int rxde_irq; /* RX Descriptor Error IRQ */ 125 int serr_irq; /* MAL System Error IRQ */ 126}; 127 128#define OCP_SYSFS_MAL_DATA() \ 129OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, num_tx_chans) \ 130OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, num_rx_chans) \ 131OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txeob_irq) \ 132OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq) \ 133OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \ 134OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \ 135OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \ 136 \ 137void ocp_show_mal_data(struct device *dev) \ 138{ \ 139 device_create_file(dev, &dev_attr_mal_num_tx_chans); \ 140 device_create_file(dev, &dev_attr_mal_num_rx_chans); \ 141 device_create_file(dev, &dev_attr_mal_txeob_irq); \ 142 device_create_file(dev, &dev_attr_mal_rxeob_irq); \ 143 device_create_file(dev, &dev_attr_mal_txde_irq); \ 144 device_create_file(dev, &dev_attr_mal_rxde_irq); \ 145 device_create_file(dev, &dev_attr_mal_serr_irq); \ 146} 147 148/* 149 * IIC additional data and sysfs support 150 */ 151struct ocp_func_iic_data { 152 int fast_mode; /* IIC fast mode enabled */ 153}; 154 155#define OCP_SYSFS_IIC_DATA() \ 156OCP_SYSFS_ADDTL(struct ocp_func_iic_data, "%d\n", iic, fast_mode) \ 157 \ 158void ocp_show_iic_data(struct device *dev) \ 159{ \ 160 device_create_file(dev, &dev_attr_iic_fast_mode); \ 161} 162#endif /* __IBM_OCP_H__ */ 163#endif /* __KERNEL__ */