1/* 2 * include/asm-s390/processor.h 3 * 4 * S390 version 5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 6 * Author(s): Hartmut Penner (hp@de.ibm.com), 7 * Martin Schwidefsky (schwidefsky@de.ibm.com) 8 * 9 * Derived from "include/asm-i386/processor.h" 10 * Copyright (C) 1994, Linus Torvalds 11 */ 12 13#ifndef __ASM_S390_PROCESSOR_H 14#define __ASM_S390_PROCESSOR_H 15 16#include <asm/ptrace.h> 17 18#ifdef __KERNEL__ 19/* 20 * Default implementation of macro that returns current 21 * instruction pointer ("program counter"). 22 */ 23#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) 24 25/* 26 * CPU type and hardware bug flags. Kept separately for each CPU. 27 * Members of this structure are referenced in head.S, so think twice 28 * before touching them. [mj] 29 */ 30 31typedef struct 32{ 33 unsigned int version : 8; 34 unsigned int ident : 24; 35 unsigned int machine : 16; 36 unsigned int unused : 16; 37} __attribute__ ((packed)) cpuid_t; 38 39static inline void get_cpu_id(cpuid_t *ptr) 40{ 41 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); 42} 43 44struct cpuinfo_S390 45{ 46 cpuid_t cpu_id; 47 __u16 cpu_addr; 48 __u16 cpu_nr; 49 unsigned long loops_per_jiffy; 50 unsigned long *pgd_quick; 51#ifdef __s390x__ 52 unsigned long *pmd_quick; 53#endif /* __s390x__ */ 54 unsigned long *pte_quick; 55 unsigned long pgtable_cache_sz; 56}; 57 58extern void s390_adjust_jiffies(void); 59extern void print_cpu_info(struct cpuinfo_S390 *); 60extern int get_cpu_capability(unsigned int *); 61 62/* 63 * User space process size: 2GB for 31 bit, 4TB for 64 bit. 64 */ 65#ifndef __s390x__ 66 67# define TASK_SIZE (0x80000000UL) 68# define TASK_UNMAPPED_BASE (TASK_SIZE / 2) 69# define DEFAULT_TASK_SIZE (0x80000000UL) 70 71#else /* __s390x__ */ 72 73# define TASK_SIZE (test_thread_flag(TIF_31BIT) ? \ 74 (0x80000000UL) : (0x40000000000UL)) 75# define TASK_UNMAPPED_BASE (TASK_SIZE / 2) 76# define DEFAULT_TASK_SIZE (0x40000000000UL) 77 78#endif /* __s390x__ */ 79 80#define HAVE_ARCH_PICK_MMAP_LAYOUT 81 82typedef struct { 83 __u32 ar4; 84} mm_segment_t; 85 86/* 87 * Thread structure 88 */ 89struct thread_struct { 90 s390_fp_regs fp_regs; 91 unsigned int acrs[NUM_ACRS]; 92 unsigned long ksp; /* kernel stack pointer */ 93 mm_segment_t mm_segment; 94 unsigned long prot_addr; /* address of protection-excep. */ 95 unsigned int trap_no; 96 per_struct per_info; 97 /* Used to give failing instruction back to user for ieee exceptions */ 98 unsigned long ieee_instruction_pointer; 99 /* pfault_wait is used to block the process on a pfault event */ 100 unsigned long pfault_wait; 101}; 102 103typedef struct thread_struct thread_struct; 104 105/* 106 * Stack layout of a C stack frame. 107 */ 108#ifndef __PACK_STACK 109struct stack_frame { 110 unsigned long back_chain; 111 unsigned long empty1[5]; 112 unsigned long gprs[10]; 113 unsigned int empty2[8]; 114}; 115#else 116struct stack_frame { 117 unsigned long empty1[5]; 118 unsigned int empty2[8]; 119 unsigned long gprs[10]; 120 unsigned long back_chain; 121}; 122#endif 123 124#define ARCH_MIN_TASKALIGN 8 125 126#define INIT_THREAD { \ 127 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ 128} 129 130/* 131 * Do necessary setup to start up a new thread. 132 */ 133#ifndef __s390x__ 134 135#define start_thread(regs, new_psw, new_stackp) do { \ 136 set_fs(USER_DS); \ 137 regs->psw.mask = psw_user_bits; \ 138 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ 139 regs->gprs[15] = new_stackp ; \ 140} while (0) 141 142#else /* __s390x__ */ 143 144#define start_thread(regs, new_psw, new_stackp) do { \ 145 set_fs(USER_DS); \ 146 regs->psw.mask = psw_user_bits; \ 147 regs->psw.addr = new_psw; \ 148 regs->gprs[15] = new_stackp; \ 149} while (0) 150 151#define start_thread31(regs, new_psw, new_stackp) do { \ 152 set_fs(USER_DS); \ 153 regs->psw.mask = psw_user32_bits; \ 154 regs->psw.addr = new_psw; \ 155 regs->gprs[15] = new_stackp; \ 156} while (0) 157 158#endif /* __s390x__ */ 159 160/* Forward declaration, a strange C thing */ 161struct task_struct; 162struct mm_struct; 163 164/* Free all resources held by a thread. */ 165extern void release_thread(struct task_struct *); 166extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 167 168/* Prepare to copy thread state - unlazy all lazy status */ 169#define prepare_to_copy(tsk) do { } while (0) 170 171/* 172 * Return saved PC of a blocked thread. 173 */ 174extern unsigned long thread_saved_pc(struct task_struct *t); 175 176/* 177 * Print register of task into buffer. Used in fs/proc/array.c. 178 */ 179extern char *task_show_regs(struct task_struct *task, char *buffer); 180 181extern void show_registers(struct pt_regs *regs); 182extern void show_code(struct pt_regs *regs); 183extern void show_trace(struct task_struct *task, unsigned long *sp); 184 185unsigned long get_wchan(struct task_struct *p); 186#define task_pt_regs(tsk) ((struct pt_regs *) \ 187 (task_stack_page(tsk) + THREAD_SIZE) - 1) 188#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) 189#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) 190 191/* 192 * Give up the time slice of the virtual PU. 193 */ 194static inline void cpu_relax(void) 195{ 196 if (MACHINE_HAS_DIAG44) 197 asm volatile("diag 0,0,68"); 198 barrier(); 199} 200 201static inline void psw_set_key(unsigned int key) 202{ 203 asm volatile("spka 0(%0)" : : "d" (key)); 204} 205 206/* 207 * Set PSW to specified value. 208 */ 209static inline void __load_psw(psw_t psw) 210{ 211#ifndef __s390x__ 212 asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 213#else 214 asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); 215#endif 216} 217 218/* 219 * Set PSW mask to specified value, while leaving the 220 * PSW addr pointing to the next instruction. 221 */ 222 223static inline void __load_psw_mask (unsigned long mask) 224{ 225 unsigned long addr; 226 psw_t psw; 227 228 psw.mask = mask; 229 230#ifndef __s390x__ 231 asm volatile( 232 " basr %0,0\n" 233 "0: ahi %0,1f-0b\n" 234 " st %0,4(%1)\n" 235 " lpsw 0(%1)\n" 236 "1:" 237 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 238#else /* __s390x__ */ 239 asm volatile( 240 " larl %0,1f\n" 241 " stg %0,8(%1)\n" 242 " lpswe 0(%1)\n" 243 "1:" 244 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); 245#endif /* __s390x__ */ 246} 247 248/* 249 * Function to stop a processor until an interruption occurred 250 */ 251static inline void enabled_wait(void) 252{ 253 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT | 254 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY); 255} 256 257/* 258 * Function to drop a processor into disabled wait state 259 */ 260 261static inline void disabled_wait(unsigned long code) 262{ 263 unsigned long ctl_buf; 264 psw_t dw_psw; 265 266 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT; 267 dw_psw.addr = code; 268 /* 269 * Store status and then load disabled wait psw, 270 * the processor is dead afterwards 271 */ 272#ifndef __s390x__ 273 asm volatile( 274 " stctl 0,0,0(%2)\n" 275 " ni 0(%2),0xef\n" /* switch off protection */ 276 " lctl 0,0,0(%2)\n" 277 " stpt 0xd8\n" /* store timer */ 278 " stckc 0xe0\n" /* store clock comparator */ 279 " stpx 0x108\n" /* store prefix register */ 280 " stam 0,15,0x120\n" /* store access registers */ 281 " std 0,0x160\n" /* store f0 */ 282 " std 2,0x168\n" /* store f2 */ 283 " std 4,0x170\n" /* store f4 */ 284 " std 6,0x178\n" /* store f6 */ 285 " stm 0,15,0x180\n" /* store general registers */ 286 " stctl 0,15,0x1c0\n" /* store control registers */ 287 " oi 0x1c0,0x10\n" /* fake protection bit */ 288 " lpsw 0(%1)" 289 : "=m" (ctl_buf) 290 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); 291#else /* __s390x__ */ 292 asm volatile( 293 " stctg 0,0,0(%2)\n" 294 " ni 4(%2),0xef\n" /* switch off protection */ 295 " lctlg 0,0,0(%2)\n" 296 " lghi 1,0x1000\n" 297 " stpt 0x328(1)\n" /* store timer */ 298 " stckc 0x330(1)\n" /* store clock comparator */ 299 " stpx 0x318(1)\n" /* store prefix register */ 300 " stam 0,15,0x340(1)\n"/* store access registers */ 301 " stfpc 0x31c(1)\n" /* store fpu control */ 302 " std 0,0x200(1)\n" /* store f0 */ 303 " std 1,0x208(1)\n" /* store f1 */ 304 " std 2,0x210(1)\n" /* store f2 */ 305 " std 3,0x218(1)\n" /* store f3 */ 306 " std 4,0x220(1)\n" /* store f4 */ 307 " std 5,0x228(1)\n" /* store f5 */ 308 " std 6,0x230(1)\n" /* store f6 */ 309 " std 7,0x238(1)\n" /* store f7 */ 310 " std 8,0x240(1)\n" /* store f8 */ 311 " std 9,0x248(1)\n" /* store f9 */ 312 " std 10,0x250(1)\n" /* store f10 */ 313 " std 11,0x258(1)\n" /* store f11 */ 314 " std 12,0x260(1)\n" /* store f12 */ 315 " std 13,0x268(1)\n" /* store f13 */ 316 " std 14,0x270(1)\n" /* store f14 */ 317 " std 15,0x278(1)\n" /* store f15 */ 318 " stmg 0,15,0x280(1)\n"/* store general registers */ 319 " stctg 0,15,0x380(1)\n"/* store control registers */ 320 " oi 0x384(1),0x10\n"/* fake protection bit */ 321 " lpswe 0(%1)" 322 : "=m" (ctl_buf) 323 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0"); 324#endif /* __s390x__ */ 325} 326 327/* 328 * Basic Machine Check/Program Check Handler. 329 */ 330 331extern void s390_base_mcck_handler(void); 332extern void s390_base_pgm_handler(void); 333extern void s390_base_ext_handler(void); 334 335extern void (*s390_base_mcck_handler_fn)(void); 336extern void (*s390_base_pgm_handler_fn)(void); 337extern void (*s390_base_ext_handler_fn)(void); 338 339/* 340 * CPU idle notifier chain. 341 */ 342#define S390_CPU_IDLE 0 343#define S390_CPU_NOT_IDLE 1 344 345struct notifier_block; 346int register_idle_notifier(struct notifier_block *nb); 347int unregister_idle_notifier(struct notifier_block *nb); 348 349#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL 350 351#endif 352 353/* 354 * Helper macro for exception table entries 355 */ 356#ifndef __s390x__ 357#define EX_TABLE(_fault,_target) \ 358 ".section __ex_table,\"a\"\n" \ 359 " .align 4\n" \ 360 " .long " #_fault "," #_target "\n" \ 361 ".previous\n" 362#else 363#define EX_TABLE(_fault,_target) \ 364 ".section __ex_table,\"a\"\n" \ 365 " .align 8\n" \ 366 " .quad " #_fault "," #_target "\n" \ 367 ".previous\n" 368#endif 369 370#endif /* __ASM_S390_PROCESSOR_H */