Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at a0b6218037b5cf50737a7dc0fc5464ea3f8781cd 1204 lines 32 kB view raw
1/* 2 * drivers/serial/serial_txx9.c 3 * 4 * Derived from many drivers using generic_serial interface, 5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c 6 * (was in Linux/VR tree) by Jim Pick. 7 * 8 * Copyright (C) 1999 Harald Koerfgen 9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com> 10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com) 11 * Copyright (C) 2000-2002 Toshiba Corporation 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller 18 * 19 * Revision History: 20 * 0.30 Initial revision. (Renamed from serial_txx927.c) 21 * 0.31 Use save_flags instead of local_irq_save. 22 * 0.32 Support SCLK. 23 * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL. 24 * Support TIOCSERGETLSR. 25 * 0.34 Support slow baudrate. 26 * 0.40 Merge codes from mainstream kernel (2.4.22). 27 * 0.41 Fix console checking in rs_shutdown_port(). 28 * Disable flow-control in serial_console_write(). 29 * 0.42 Fix minor compiler warning. 30 * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c). 31 * 1.01 Set fifosize to make tx_empry called properly. 32 * Use standard uart_get_divisor. 33 * 1.02 Cleanup. (import 8250.c changes) 34 * 1.03 Fix low-latency mode. (import 8250.c changes) 35 * 1.04 Remove usage of deprecated functions, cleanup. 36 * 1.05 More strict check in verify_port. Cleanup. 37 * 1.06 Do not insert a char caused previous overrun. 38 * Fix some spin_locks. 39 * Do not call uart_add_one_port for absent ports. 40 */ 41 42#if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 43#define SUPPORT_SYSRQ 44#endif 45 46#include <linux/module.h> 47#include <linux/ioport.h> 48#include <linux/init.h> 49#include <linux/console.h> 50#include <linux/sysrq.h> 51#include <linux/delay.h> 52#include <linux/device.h> 53#include <linux/pci.h> 54#include <linux/tty.h> 55#include <linux/tty_flip.h> 56#include <linux/serial_core.h> 57#include <linux/serial.h> 58#include <linux/mutex.h> 59 60#include <asm/io.h> 61#include <asm/irq.h> 62 63static char *serial_version = "1.06"; 64static char *serial_name = "TX39/49 Serial driver"; 65 66#define PASS_LIMIT 256 67 68#if !defined(CONFIG_SERIAL_TXX9_STDSERIAL) 69/* "ttyS" is used for standard serial driver */ 70#define TXX9_TTY_NAME "ttyTX" 71#define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */ 72#else 73/* acts like standard serial driver */ 74#define TXX9_TTY_NAME "ttyS" 75#define TXX9_TTY_MINOR_START 64 76#endif 77#define TXX9_TTY_MAJOR TTY_MAJOR 78 79/* flag aliases */ 80#define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART 81#define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER 82 83#ifdef CONFIG_PCI 84/* support for Toshiba TC86C001 SIO */ 85#define ENABLE_SERIAL_TXX9_PCI 86#endif 87 88/* 89 * Number of serial ports 90 */ 91#ifdef ENABLE_SERIAL_TXX9_PCI 92#define NR_PCI_BOARDS 4 93#define UART_NR (4 + NR_PCI_BOARDS) 94#else 95#define UART_NR 4 96#endif 97 98#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8) 99 100struct uart_txx9_port { 101 struct uart_port port; 102 103 /* 104 * We provide a per-port pm hook. 105 */ 106 void (*pm)(struct uart_port *port, 107 unsigned int state, unsigned int old); 108}; 109 110#define TXX9_REGION_SIZE 0x24 111 112/* TXX9 Serial Registers */ 113#define TXX9_SILCR 0x00 114#define TXX9_SIDICR 0x04 115#define TXX9_SIDISR 0x08 116#define TXX9_SICISR 0x0c 117#define TXX9_SIFCR 0x10 118#define TXX9_SIFLCR 0x14 119#define TXX9_SIBGR 0x18 120#define TXX9_SITFIFO 0x1c 121#define TXX9_SIRFIFO 0x20 122 123/* SILCR : Line Control */ 124#define TXX9_SILCR_SCS_MASK 0x00000060 125#define TXX9_SILCR_SCS_IMCLK 0x00000000 126#define TXX9_SILCR_SCS_IMCLK_BG 0x00000020 127#define TXX9_SILCR_SCS_SCLK 0x00000040 128#define TXX9_SILCR_SCS_SCLK_BG 0x00000060 129#define TXX9_SILCR_UEPS 0x00000010 130#define TXX9_SILCR_UPEN 0x00000008 131#define TXX9_SILCR_USBL_MASK 0x00000004 132#define TXX9_SILCR_USBL_1BIT 0x00000000 133#define TXX9_SILCR_USBL_2BIT 0x00000004 134#define TXX9_SILCR_UMODE_MASK 0x00000003 135#define TXX9_SILCR_UMODE_8BIT 0x00000000 136#define TXX9_SILCR_UMODE_7BIT 0x00000001 137 138/* SIDICR : DMA/Int. Control */ 139#define TXX9_SIDICR_TDE 0x00008000 140#define TXX9_SIDICR_RDE 0x00004000 141#define TXX9_SIDICR_TIE 0x00002000 142#define TXX9_SIDICR_RIE 0x00001000 143#define TXX9_SIDICR_SPIE 0x00000800 144#define TXX9_SIDICR_CTSAC 0x00000600 145#define TXX9_SIDICR_STIE_MASK 0x0000003f 146#define TXX9_SIDICR_STIE_OERS 0x00000020 147#define TXX9_SIDICR_STIE_CTSS 0x00000010 148#define TXX9_SIDICR_STIE_RBRKD 0x00000008 149#define TXX9_SIDICR_STIE_TRDY 0x00000004 150#define TXX9_SIDICR_STIE_TXALS 0x00000002 151#define TXX9_SIDICR_STIE_UBRKD 0x00000001 152 153/* SIDISR : DMA/Int. Status */ 154#define TXX9_SIDISR_UBRK 0x00008000 155#define TXX9_SIDISR_UVALID 0x00004000 156#define TXX9_SIDISR_UFER 0x00002000 157#define TXX9_SIDISR_UPER 0x00001000 158#define TXX9_SIDISR_UOER 0x00000800 159#define TXX9_SIDISR_ERI 0x00000400 160#define TXX9_SIDISR_TOUT 0x00000200 161#define TXX9_SIDISR_TDIS 0x00000100 162#define TXX9_SIDISR_RDIS 0x00000080 163#define TXX9_SIDISR_STIS 0x00000040 164#define TXX9_SIDISR_RFDN_MASK 0x0000001f 165 166/* SICISR : Change Int. Status */ 167#define TXX9_SICISR_OERS 0x00000020 168#define TXX9_SICISR_CTSS 0x00000010 169#define TXX9_SICISR_RBRKD 0x00000008 170#define TXX9_SICISR_TRDY 0x00000004 171#define TXX9_SICISR_TXALS 0x00000002 172#define TXX9_SICISR_UBRKD 0x00000001 173 174/* SIFCR : FIFO Control */ 175#define TXX9_SIFCR_SWRST 0x00008000 176#define TXX9_SIFCR_RDIL_MASK 0x00000180 177#define TXX9_SIFCR_RDIL_1 0x00000000 178#define TXX9_SIFCR_RDIL_4 0x00000080 179#define TXX9_SIFCR_RDIL_8 0x00000100 180#define TXX9_SIFCR_RDIL_12 0x00000180 181#define TXX9_SIFCR_RDIL_MAX 0x00000180 182#define TXX9_SIFCR_TDIL_MASK 0x00000018 183#define TXX9_SIFCR_TDIL_MASK 0x00000018 184#define TXX9_SIFCR_TDIL_1 0x00000000 185#define TXX9_SIFCR_TDIL_4 0x00000001 186#define TXX9_SIFCR_TDIL_8 0x00000010 187#define TXX9_SIFCR_TDIL_MAX 0x00000010 188#define TXX9_SIFCR_TFRST 0x00000004 189#define TXX9_SIFCR_RFRST 0x00000002 190#define TXX9_SIFCR_FRSTE 0x00000001 191#define TXX9_SIO_TX_FIFO 8 192#define TXX9_SIO_RX_FIFO 16 193 194/* SIFLCR : Flow Control */ 195#define TXX9_SIFLCR_RCS 0x00001000 196#define TXX9_SIFLCR_TES 0x00000800 197#define TXX9_SIFLCR_RTSSC 0x00000200 198#define TXX9_SIFLCR_RSDE 0x00000100 199#define TXX9_SIFLCR_TSDE 0x00000080 200#define TXX9_SIFLCR_RTSTL_MASK 0x0000001e 201#define TXX9_SIFLCR_RTSTL_MAX 0x0000001e 202#define TXX9_SIFLCR_TBRK 0x00000001 203 204/* SIBGR : Baudrate Control */ 205#define TXX9_SIBGR_BCLK_MASK 0x00000300 206#define TXX9_SIBGR_BCLK_T0 0x00000000 207#define TXX9_SIBGR_BCLK_T2 0x00000100 208#define TXX9_SIBGR_BCLK_T4 0x00000200 209#define TXX9_SIBGR_BCLK_T6 0x00000300 210#define TXX9_SIBGR_BRD_MASK 0x000000ff 211 212static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) 213{ 214 switch (up->port.iotype) { 215 default: 216 return __raw_readl(up->port.membase + offset); 217 case UPIO_PORT: 218 return inl(up->port.iobase + offset); 219 } 220} 221 222static inline void 223sio_out(struct uart_txx9_port *up, int offset, int value) 224{ 225 switch (up->port.iotype) { 226 default: 227 __raw_writel(value, up->port.membase + offset); 228 break; 229 case UPIO_PORT: 230 outl(value, up->port.iobase + offset); 231 break; 232 } 233} 234 235static inline void 236sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) 237{ 238 sio_out(up, offset, sio_in(up, offset) & ~value); 239} 240static inline void 241sio_set(struct uart_txx9_port *up, int offset, unsigned int value) 242{ 243 sio_out(up, offset, sio_in(up, offset) | value); 244} 245 246static inline void 247sio_quot_set(struct uart_txx9_port *up, int quot) 248{ 249 quot >>= 1; 250 if (quot < 256) 251 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); 252 else if (quot < (256 << 2)) 253 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); 254 else if (quot < (256 << 4)) 255 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); 256 else if (quot < (256 << 6)) 257 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); 258 else 259 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); 260} 261 262static void serial_txx9_stop_tx(struct uart_port *port) 263{ 264 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 265 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 266} 267 268static void serial_txx9_start_tx(struct uart_port *port) 269{ 270 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 271 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); 272} 273 274static void serial_txx9_stop_rx(struct uart_port *port) 275{ 276 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 277 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; 278} 279 280static void serial_txx9_enable_ms(struct uart_port *port) 281{ 282 /* TXX9-SIO can not control DTR... */ 283} 284 285static inline void 286receive_chars(struct uart_txx9_port *up, unsigned int *status) 287{ 288 struct tty_struct *tty = up->port.info->tty; 289 unsigned char ch; 290 unsigned int disr = *status; 291 int max_count = 256; 292 char flag; 293 unsigned int next_ignore_status_mask; 294 295 do { 296 ch = sio_in(up, TXX9_SIRFIFO); 297 flag = TTY_NORMAL; 298 up->port.icount.rx++; 299 300 /* mask out RFDN_MASK bit added by previous overrun */ 301 next_ignore_status_mask = 302 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; 303 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER | 304 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) { 305 /* 306 * For statistics only 307 */ 308 if (disr & TXX9_SIDISR_UBRK) { 309 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER); 310 up->port.icount.brk++; 311 /* 312 * We do the SysRQ and SAK checking 313 * here because otherwise the break 314 * may get masked by ignore_status_mask 315 * or read_status_mask. 316 */ 317 if (uart_handle_break(&up->port)) 318 goto ignore_char; 319 } else if (disr & TXX9_SIDISR_UPER) 320 up->port.icount.parity++; 321 else if (disr & TXX9_SIDISR_UFER) 322 up->port.icount.frame++; 323 if (disr & TXX9_SIDISR_UOER) { 324 up->port.icount.overrun++; 325 /* 326 * The receiver read buffer still hold 327 * a char which caused overrun. 328 * Ignore next char by adding RFDN_MASK 329 * to ignore_status_mask temporarily. 330 */ 331 next_ignore_status_mask |= 332 TXX9_SIDISR_RFDN_MASK; 333 } 334 335 /* 336 * Mask off conditions which should be ingored. 337 */ 338 disr &= up->port.read_status_mask; 339 340 if (disr & TXX9_SIDISR_UBRK) { 341 flag = TTY_BREAK; 342 } else if (disr & TXX9_SIDISR_UPER) 343 flag = TTY_PARITY; 344 else if (disr & TXX9_SIDISR_UFER) 345 flag = TTY_FRAME; 346 } 347 if (uart_handle_sysrq_char(&up->port, ch)) 348 goto ignore_char; 349 350 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); 351 352 ignore_char: 353 up->port.ignore_status_mask = next_ignore_status_mask; 354 disr = sio_in(up, TXX9_SIDISR); 355 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0)); 356 spin_unlock(&up->port.lock); 357 tty_flip_buffer_push(tty); 358 spin_lock(&up->port.lock); 359 *status = disr; 360} 361 362static inline void transmit_chars(struct uart_txx9_port *up) 363{ 364 struct circ_buf *xmit = &up->port.info->xmit; 365 int count; 366 367 if (up->port.x_char) { 368 sio_out(up, TXX9_SITFIFO, up->port.x_char); 369 up->port.icount.tx++; 370 up->port.x_char = 0; 371 return; 372 } 373 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 374 serial_txx9_stop_tx(&up->port); 375 return; 376 } 377 378 count = TXX9_SIO_TX_FIFO; 379 do { 380 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); 381 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 382 up->port.icount.tx++; 383 if (uart_circ_empty(xmit)) 384 break; 385 } while (--count > 0); 386 387 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 388 uart_write_wakeup(&up->port); 389 390 if (uart_circ_empty(xmit)) 391 serial_txx9_stop_tx(&up->port); 392} 393 394static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id) 395{ 396 int pass_counter = 0; 397 struct uart_txx9_port *up = dev_id; 398 unsigned int status; 399 400 while (1) { 401 spin_lock(&up->port.lock); 402 status = sio_in(up, TXX9_SIDISR); 403 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) 404 status &= ~TXX9_SIDISR_TDIS; 405 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 406 TXX9_SIDISR_TOUT))) { 407 spin_unlock(&up->port.lock); 408 break; 409 } 410 411 if (status & TXX9_SIDISR_RDIS) 412 receive_chars(up, &status); 413 if (status & TXX9_SIDISR_TDIS) 414 transmit_chars(up); 415 /* Clear TX/RX Int. Status */ 416 sio_mask(up, TXX9_SIDISR, 417 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS | 418 TXX9_SIDISR_TOUT); 419 spin_unlock(&up->port.lock); 420 421 if (pass_counter++ > PASS_LIMIT) 422 break; 423 } 424 425 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 426} 427 428static unsigned int serial_txx9_tx_empty(struct uart_port *port) 429{ 430 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 431 unsigned long flags; 432 unsigned int ret; 433 434 spin_lock_irqsave(&up->port.lock, flags); 435 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; 436 spin_unlock_irqrestore(&up->port.lock, flags); 437 438 return ret; 439} 440 441static unsigned int serial_txx9_get_mctrl(struct uart_port *port) 442{ 443 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 444 unsigned int ret; 445 446 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS) 447 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS); 448 449 return ret; 450} 451 452static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl) 453{ 454 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 455 456 if (mctrl & TIOCM_RTS) 457 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 458 else 459 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); 460} 461 462static void serial_txx9_break_ctl(struct uart_port *port, int break_state) 463{ 464 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 465 unsigned long flags; 466 467 spin_lock_irqsave(&up->port.lock, flags); 468 if (break_state == -1) 469 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 470 else 471 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 472 spin_unlock_irqrestore(&up->port.lock, flags); 473} 474 475static int serial_txx9_startup(struct uart_port *port) 476{ 477 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 478 unsigned long flags; 479 int retval; 480 481 /* 482 * Clear the FIFO buffers and disable them. 483 * (they will be reenabled in set_termios()) 484 */ 485 sio_set(up, TXX9_SIFCR, 486 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 487 /* clear reset */ 488 sio_mask(up, TXX9_SIFCR, 489 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 490 sio_out(up, TXX9_SIDICR, 0); 491 492 /* 493 * Clear the interrupt registers. 494 */ 495 sio_out(up, TXX9_SIDISR, 0); 496 497 retval = request_irq(up->port.irq, serial_txx9_interrupt, 498 IRQF_SHARED, "serial_txx9", up); 499 if (retval) 500 return retval; 501 502 /* 503 * Now, initialize the UART 504 */ 505 spin_lock_irqsave(&up->port.lock, flags); 506 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 507 spin_unlock_irqrestore(&up->port.lock, flags); 508 509 /* Enable RX/TX */ 510 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 511 512 /* 513 * Finally, enable interrupts. 514 */ 515 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); 516 517 return 0; 518} 519 520static void serial_txx9_shutdown(struct uart_port *port) 521{ 522 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 523 unsigned long flags; 524 525 /* 526 * Disable interrupts from this port 527 */ 528 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ 529 530 spin_lock_irqsave(&up->port.lock, flags); 531 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 532 spin_unlock_irqrestore(&up->port.lock, flags); 533 534 /* 535 * Disable break condition 536 */ 537 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); 538 539#ifdef CONFIG_SERIAL_TXX9_CONSOLE 540 if (up->port.cons && up->port.line == up->port.cons->index) { 541 free_irq(up->port.irq, up); 542 return; 543 } 544#endif 545 /* reset FIFOs */ 546 sio_set(up, TXX9_SIFCR, 547 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 548 /* clear reset */ 549 sio_mask(up, TXX9_SIFCR, 550 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE); 551 552 /* Disable RX/TX */ 553 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); 554 555 free_irq(up->port.irq, up); 556} 557 558static void 559serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios, 560 struct ktermios *old) 561{ 562 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 563 unsigned int cval, fcr = 0; 564 unsigned long flags; 565 unsigned int baud, quot; 566 567 cval = sio_in(up, TXX9_SILCR); 568 /* byte size and parity */ 569 cval &= ~TXX9_SILCR_UMODE_MASK; 570 switch (termios->c_cflag & CSIZE) { 571 case CS7: 572 cval |= TXX9_SILCR_UMODE_7BIT; 573 break; 574 default: 575 case CS5: /* not supported */ 576 case CS6: /* not supported */ 577 case CS8: 578 cval |= TXX9_SILCR_UMODE_8BIT; 579 break; 580 } 581 582 cval &= ~TXX9_SILCR_USBL_MASK; 583 if (termios->c_cflag & CSTOPB) 584 cval |= TXX9_SILCR_USBL_2BIT; 585 else 586 cval |= TXX9_SILCR_USBL_1BIT; 587 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS); 588 if (termios->c_cflag & PARENB) 589 cval |= TXX9_SILCR_UPEN; 590 if (!(termios->c_cflag & PARODD)) 591 cval |= TXX9_SILCR_UEPS; 592 593 /* 594 * Ask the core to calculate the divisor for us. 595 */ 596 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2); 597 quot = uart_get_divisor(port, baud); 598 599 /* Set up FIFOs */ 600 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 601 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1; 602 603 /* 604 * Ok, we're now changing the port state. Do it with 605 * interrupts disabled. 606 */ 607 spin_lock_irqsave(&up->port.lock, flags); 608 609 /* 610 * Update the per-port timeout. 611 */ 612 uart_update_timeout(port, termios->c_cflag, baud); 613 614 up->port.read_status_mask = TXX9_SIDISR_UOER | 615 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS; 616 if (termios->c_iflag & INPCK) 617 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; 618 if (termios->c_iflag & (BRKINT | PARMRK)) 619 up->port.read_status_mask |= TXX9_SIDISR_UBRK; 620 621 /* 622 * Characteres to ignore 623 */ 624 up->port.ignore_status_mask = 0; 625 if (termios->c_iflag & IGNPAR) 626 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; 627 if (termios->c_iflag & IGNBRK) { 628 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; 629 /* 630 * If we're ignoring parity and break indicators, 631 * ignore overruns too (for real raw support). 632 */ 633 if (termios->c_iflag & IGNPAR) 634 up->port.ignore_status_mask |= TXX9_SIDISR_UOER; 635 } 636 637 /* 638 * ignore all characters if CREAD is not set 639 */ 640 if ((termios->c_cflag & CREAD) == 0) 641 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; 642 643 /* CTS flow control flag */ 644 if ((termios->c_cflag & CRTSCTS) && 645 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { 646 sio_set(up, TXX9_SIFLCR, 647 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 648 } else { 649 sio_mask(up, TXX9_SIFLCR, 650 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES); 651 } 652 653 sio_out(up, TXX9_SILCR, cval); 654 sio_quot_set(up, quot); 655 sio_out(up, TXX9_SIFCR, fcr); 656 657 serial_txx9_set_mctrl(&up->port, up->port.mctrl); 658 spin_unlock_irqrestore(&up->port.lock, flags); 659} 660 661static void 662serial_txx9_pm(struct uart_port *port, unsigned int state, 663 unsigned int oldstate) 664{ 665 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 666 if (up->pm) 667 up->pm(port, state, oldstate); 668} 669 670static int serial_txx9_request_resource(struct uart_txx9_port *up) 671{ 672 unsigned int size = TXX9_REGION_SIZE; 673 int ret = 0; 674 675 switch (up->port.iotype) { 676 default: 677 if (!up->port.mapbase) 678 break; 679 680 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { 681 ret = -EBUSY; 682 break; 683 } 684 685 if (up->port.flags & UPF_IOREMAP) { 686 up->port.membase = ioremap(up->port.mapbase, size); 687 if (!up->port.membase) { 688 release_mem_region(up->port.mapbase, size); 689 ret = -ENOMEM; 690 } 691 } 692 break; 693 694 case UPIO_PORT: 695 if (!request_region(up->port.iobase, size, "serial_txx9")) 696 ret = -EBUSY; 697 break; 698 } 699 return ret; 700} 701 702static void serial_txx9_release_resource(struct uart_txx9_port *up) 703{ 704 unsigned int size = TXX9_REGION_SIZE; 705 706 switch (up->port.iotype) { 707 default: 708 if (!up->port.mapbase) 709 break; 710 711 if (up->port.flags & UPF_IOREMAP) { 712 iounmap(up->port.membase); 713 up->port.membase = NULL; 714 } 715 716 release_mem_region(up->port.mapbase, size); 717 break; 718 719 case UPIO_PORT: 720 release_region(up->port.iobase, size); 721 break; 722 } 723} 724 725static void serial_txx9_release_port(struct uart_port *port) 726{ 727 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 728 serial_txx9_release_resource(up); 729} 730 731static int serial_txx9_request_port(struct uart_port *port) 732{ 733 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 734 return serial_txx9_request_resource(up); 735} 736 737static void serial_txx9_config_port(struct uart_port *port, int uflags) 738{ 739 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 740 unsigned long flags; 741 int ret; 742 743 /* 744 * Find the region that we can probe for. This in turn 745 * tells us whether we can probe for the type of port. 746 */ 747 ret = serial_txx9_request_resource(up); 748 if (ret < 0) 749 return; 750 port->type = PORT_TXX9; 751 up->port.fifosize = TXX9_SIO_TX_FIFO; 752 753#ifdef CONFIG_SERIAL_TXX9_CONSOLE 754 if (up->port.line == up->port.cons->index) 755 return; 756#endif 757 spin_lock_irqsave(&up->port.lock, flags); 758 /* 759 * Reset the UART. 760 */ 761 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); 762#ifdef CONFIG_CPU_TX49XX 763 /* TX4925 BUG WORKAROUND. Accessing SIOC register 764 * immediately after soft reset causes bus error. */ 765 iob(); 766 udelay(1); 767#endif 768 while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) 769 ; 770 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */ 771 sio_set(up, TXX9_SIFCR, 772 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1); 773 /* initial settings */ 774 sio_out(up, TXX9_SILCR, 775 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | 776 ((up->port.flags & UPF_TXX9_USE_SCLK) ? 777 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); 778 sio_quot_set(up, uart_get_divisor(port, 9600)); 779 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); 780 spin_unlock_irqrestore(&up->port.lock, flags); 781} 782 783static int 784serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser) 785{ 786 unsigned long new_port = ser->port; 787 if (HIGH_BITS_OFFSET) 788 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET; 789 if (ser->type != port->type || 790 ser->irq != port->irq || 791 ser->io_type != port->iotype || 792 new_port != port->iobase || 793 (unsigned long)ser->iomem_base != port->mapbase) 794 return -EINVAL; 795 return 0; 796} 797 798static const char * 799serial_txx9_type(struct uart_port *port) 800{ 801 return "txx9"; 802} 803 804static struct uart_ops serial_txx9_pops = { 805 .tx_empty = serial_txx9_tx_empty, 806 .set_mctrl = serial_txx9_set_mctrl, 807 .get_mctrl = serial_txx9_get_mctrl, 808 .stop_tx = serial_txx9_stop_tx, 809 .start_tx = serial_txx9_start_tx, 810 .stop_rx = serial_txx9_stop_rx, 811 .enable_ms = serial_txx9_enable_ms, 812 .break_ctl = serial_txx9_break_ctl, 813 .startup = serial_txx9_startup, 814 .shutdown = serial_txx9_shutdown, 815 .set_termios = serial_txx9_set_termios, 816 .pm = serial_txx9_pm, 817 .type = serial_txx9_type, 818 .release_port = serial_txx9_release_port, 819 .request_port = serial_txx9_request_port, 820 .config_port = serial_txx9_config_port, 821 .verify_port = serial_txx9_verify_port, 822}; 823 824static struct uart_txx9_port serial_txx9_ports[UART_NR]; 825 826static void __init serial_txx9_register_ports(struct uart_driver *drv) 827{ 828 int i; 829 830 for (i = 0; i < UART_NR; i++) { 831 struct uart_txx9_port *up = &serial_txx9_ports[i]; 832 833 up->port.line = i; 834 up->port.ops = &serial_txx9_pops; 835 if (up->port.iobase || up->port.mapbase) 836 uart_add_one_port(drv, &up->port); 837 } 838} 839 840#ifdef CONFIG_SERIAL_TXX9_CONSOLE 841 842/* 843 * Wait for transmitter & holding register to empty 844 */ 845static inline void wait_for_xmitr(struct uart_txx9_port *up) 846{ 847 unsigned int tmout = 10000; 848 849 /* Wait up to 10ms for the character(s) to be sent. */ 850 while (--tmout && 851 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) 852 udelay(1); 853 854 /* Wait up to 1s for flow control if necessary */ 855 if (up->port.flags & UPF_CONS_FLOW) { 856 tmout = 1000000; 857 while (--tmout && 858 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) 859 udelay(1); 860 } 861} 862 863static void serial_txx9_console_putchar(struct uart_port *port, int ch) 864{ 865 struct uart_txx9_port *up = (struct uart_txx9_port *)port; 866 867 wait_for_xmitr(up); 868 sio_out(up, TXX9_SITFIFO, ch); 869} 870 871/* 872 * Print a string to the serial port trying not to disturb 873 * any possible real use of the port... 874 * 875 * The console_lock must be held when we get here. 876 */ 877static void 878serial_txx9_console_write(struct console *co, const char *s, unsigned int count) 879{ 880 struct uart_txx9_port *up = &serial_txx9_ports[co->index]; 881 unsigned int ier, flcr; 882 883 /* 884 * First save the UER then disable the interrupts 885 */ 886 ier = sio_in(up, TXX9_SIDICR); 887 sio_out(up, TXX9_SIDICR, 0); 888 /* 889 * Disable flow-control if enabled (and unnecessary) 890 */ 891 flcr = sio_in(up, TXX9_SIFLCR); 892 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) 893 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); 894 895 uart_console_write(&up->port, s, count, serial_txx9_console_putchar); 896 897 /* 898 * Finally, wait for transmitter to become empty 899 * and restore the IER 900 */ 901 wait_for_xmitr(up); 902 sio_out(up, TXX9_SIFLCR, flcr); 903 sio_out(up, TXX9_SIDICR, ier); 904} 905 906static int serial_txx9_console_setup(struct console *co, char *options) 907{ 908 struct uart_port *port; 909 struct uart_txx9_port *up; 910 int baud = 9600; 911 int bits = 8; 912 int parity = 'n'; 913 int flow = 'n'; 914 915 /* 916 * Check whether an invalid uart number has been specified, and 917 * if so, search for the first available port that does have 918 * console support. 919 */ 920 if (co->index >= UART_NR) 921 co->index = 0; 922 up = &serial_txx9_ports[co->index]; 923 port = &up->port; 924 if (!port->ops) 925 return -ENODEV; 926 927 /* 928 * Disable UART interrupts, set DTR and RTS high 929 * and set speed. 930 */ 931 sio_out(up, TXX9_SIDICR, 0); 932 /* initial settings */ 933 sio_out(up, TXX9_SILCR, 934 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT | 935 ((port->flags & UPF_TXX9_USE_SCLK) ? 936 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG)); 937 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); 938 939 if (options) 940 uart_parse_options(options, &baud, &parity, &bits, &flow); 941 942 return uart_set_options(port, co, baud, parity, bits, flow); 943} 944 945static struct uart_driver serial_txx9_reg; 946static struct console serial_txx9_console = { 947 .name = TXX9_TTY_NAME, 948 .write = serial_txx9_console_write, 949 .device = uart_console_device, 950 .setup = serial_txx9_console_setup, 951 .flags = CON_PRINTBUFFER, 952 .index = -1, 953 .data = &serial_txx9_reg, 954}; 955 956static int __init serial_txx9_console_init(void) 957{ 958 register_console(&serial_txx9_console); 959 return 0; 960} 961console_initcall(serial_txx9_console_init); 962 963#define SERIAL_TXX9_CONSOLE &serial_txx9_console 964#else 965#define SERIAL_TXX9_CONSOLE NULL 966#endif 967 968static struct uart_driver serial_txx9_reg = { 969 .owner = THIS_MODULE, 970 .driver_name = "serial_txx9", 971 .dev_name = TXX9_TTY_NAME, 972 .major = TXX9_TTY_MAJOR, 973 .minor = TXX9_TTY_MINOR_START, 974 .nr = UART_NR, 975 .cons = SERIAL_TXX9_CONSOLE, 976}; 977 978int __init early_serial_txx9_setup(struct uart_port *port) 979{ 980 if (port->line >= ARRAY_SIZE(serial_txx9_ports)) 981 return -ENODEV; 982 983 serial_txx9_ports[port->line].port = *port; 984 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops; 985 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF; 986 return 0; 987} 988 989#ifdef ENABLE_SERIAL_TXX9_PCI 990/** 991 * serial_txx9_suspend_port - suspend one serial port 992 * @line: serial line number 993 * 994 * Suspend one serial port. 995 */ 996static void serial_txx9_suspend_port(int line) 997{ 998 uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port); 999} 1000 1001/** 1002 * serial_txx9_resume_port - resume one serial port 1003 * @line: serial line number 1004 * 1005 * Resume one serial port. 1006 */ 1007static void serial_txx9_resume_port(int line) 1008{ 1009 uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port); 1010} 1011 1012static DEFINE_MUTEX(serial_txx9_mutex); 1013 1014/** 1015 * serial_txx9_register_port - register a serial port 1016 * @port: serial port template 1017 * 1018 * Configure the serial port specified by the request. 1019 * 1020 * The port is then probed and if necessary the IRQ is autodetected 1021 * If this fails an error is returned. 1022 * 1023 * On success the port is ready to use and the line number is returned. 1024 */ 1025static int __devinit serial_txx9_register_port(struct uart_port *port) 1026{ 1027 int i; 1028 struct uart_txx9_port *uart; 1029 int ret = -ENOSPC; 1030 1031 mutex_lock(&serial_txx9_mutex); 1032 for (i = 0; i < UART_NR; i++) { 1033 uart = &serial_txx9_ports[i]; 1034 if (!(uart->port.iobase || uart->port.mapbase)) 1035 break; 1036 } 1037 if (i < UART_NR) { 1038 uart->port.iobase = port->iobase; 1039 uart->port.membase = port->membase; 1040 uart->port.irq = port->irq; 1041 uart->port.uartclk = port->uartclk; 1042 uart->port.iotype = port->iotype; 1043 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF; 1044 uart->port.mapbase = port->mapbase; 1045 if (port->dev) 1046 uart->port.dev = port->dev; 1047 ret = uart_add_one_port(&serial_txx9_reg, &uart->port); 1048 if (ret == 0) 1049 ret = uart->port.line; 1050 } 1051 mutex_unlock(&serial_txx9_mutex); 1052 return ret; 1053} 1054 1055/** 1056 * serial_txx9_unregister_port - remove a txx9 serial port at runtime 1057 * @line: serial line number 1058 * 1059 * Remove one serial port. This may not be called from interrupt 1060 * context. We hand the port back to the our control. 1061 */ 1062static void __devexit serial_txx9_unregister_port(int line) 1063{ 1064 struct uart_txx9_port *uart = &serial_txx9_ports[line]; 1065 1066 mutex_lock(&serial_txx9_mutex); 1067 uart_remove_one_port(&serial_txx9_reg, &uart->port); 1068 uart->port.flags = 0; 1069 uart->port.type = PORT_UNKNOWN; 1070 uart->port.iobase = 0; 1071 uart->port.mapbase = 0; 1072 uart->port.membase = NULL; 1073 uart->port.dev = NULL; 1074 mutex_unlock(&serial_txx9_mutex); 1075} 1076 1077/* 1078 * Probe one serial board. Unfortunately, there is no rhyme nor reason 1079 * to the arrangement of serial ports on a PCI card. 1080 */ 1081static int __devinit 1082pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent) 1083{ 1084 struct uart_port port; 1085 int line; 1086 int rc; 1087 1088 rc = pci_enable_device(dev); 1089 if (rc) 1090 return rc; 1091 1092 memset(&port, 0, sizeof(port)); 1093 port.ops = &serial_txx9_pops; 1094 port.flags |= UPF_TXX9_HAVE_CTS_LINE; 1095 port.uartclk = 66670000; 1096 port.irq = dev->irq; 1097 port.iotype = UPIO_PORT; 1098 port.iobase = pci_resource_start(dev, 1); 1099 port.dev = &dev->dev; 1100 line = serial_txx9_register_port(&port); 1101 if (line < 0) { 1102 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line); 1103 } 1104 pci_set_drvdata(dev, (void *)(long)line); 1105 1106 return 0; 1107} 1108 1109static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev) 1110{ 1111 int line = (int)(long)pci_get_drvdata(dev); 1112 1113 pci_set_drvdata(dev, NULL); 1114 1115 if (line) { 1116 serial_txx9_unregister_port(line); 1117 pci_disable_device(dev); 1118 } 1119} 1120 1121static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state) 1122{ 1123 int line = (int)(long)pci_get_drvdata(dev); 1124 1125 if (line) 1126 serial_txx9_suspend_port(line); 1127 pci_save_state(dev); 1128 pci_set_power_state(dev, pci_choose_state(dev, state)); 1129 return 0; 1130} 1131 1132static int pciserial_txx9_resume_one(struct pci_dev *dev) 1133{ 1134 int line = (int)(long)pci_get_drvdata(dev); 1135 1136 pci_set_power_state(dev, PCI_D0); 1137 pci_restore_state(dev); 1138 1139 if (line) { 1140 pci_enable_device(dev); 1141 serial_txx9_resume_port(line); 1142 } 1143 return 0; 1144} 1145 1146static struct pci_device_id serial_txx9_pci_tbl[] = { 1147 { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC, 1148 PCI_ANY_ID, PCI_ANY_ID, 1149 0, 0, 0 }, 1150 { 0, } 1151}; 1152 1153static struct pci_driver serial_txx9_pci_driver = { 1154 .name = "serial_txx9", 1155 .probe = pciserial_txx9_init_one, 1156 .remove = __devexit_p(pciserial_txx9_remove_one), 1157 .suspend = pciserial_txx9_suspend_one, 1158 .resume = pciserial_txx9_resume_one, 1159 .id_table = serial_txx9_pci_tbl, 1160}; 1161 1162MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl); 1163#endif /* ENABLE_SERIAL_TXX9_PCI */ 1164 1165static int __init serial_txx9_init(void) 1166{ 1167 int ret; 1168 1169 printk(KERN_INFO "%s version %s\n", serial_name, serial_version); 1170 1171 ret = uart_register_driver(&serial_txx9_reg); 1172 if (ret >= 0) { 1173 serial_txx9_register_ports(&serial_txx9_reg); 1174 1175#ifdef ENABLE_SERIAL_TXX9_PCI 1176 ret = pci_register_driver(&serial_txx9_pci_driver); 1177#endif 1178 } 1179 return ret; 1180} 1181 1182static void __exit serial_txx9_exit(void) 1183{ 1184 int i; 1185 1186#ifdef ENABLE_SERIAL_TXX9_PCI 1187 pci_unregister_driver(&serial_txx9_pci_driver); 1188#endif 1189 for (i = 0; i < UART_NR; i++) { 1190 struct uart_txx9_port *up = &serial_txx9_ports[i]; 1191 if (up->port.iobase || up->port.mapbase) 1192 uart_remove_one_port(&serial_txx9_reg, &up->port); 1193 } 1194 1195 uart_unregister_driver(&serial_txx9_reg); 1196} 1197 1198module_init(serial_txx9_init); 1199module_exit(serial_txx9_exit); 1200 1201MODULE_LICENSE("GPL"); 1202MODULE_DESCRIPTION("TX39/49 serial driver"); 1203 1204MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);