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1/* 2 * smc911x.c 3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices. 4 * 5 * Copyright (C) 2005 Sensoria Corp 6 * Derived from the unified SMC91x driver by Nicolas Pitre 7 * and the smsc911x.c reference driver by SMSC 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 * Arguments: 24 * watchdog = TX watchdog timeout 25 * tx_fifo_kb = Size of TX FIFO in KB 26 * 27 * History: 28 * 04/16/05 Dustin McIntire Initial version 29 */ 30static const char version[] = 31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n"; 32 33/* Debugging options */ 34#define ENABLE_SMC_DEBUG_RX 0 35#define ENABLE_SMC_DEBUG_TX 0 36#define ENABLE_SMC_DEBUG_DMA 0 37#define ENABLE_SMC_DEBUG_PKTS 0 38#define ENABLE_SMC_DEBUG_MISC 0 39#define ENABLE_SMC_DEBUG_FUNC 0 40 41#define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0) 42#define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1) 43#define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2) 44#define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3) 45#define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4) 46#define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5) 47 48#ifndef SMC_DEBUG 49#define SMC_DEBUG ( SMC_DEBUG_RX | \ 50 SMC_DEBUG_TX | \ 51 SMC_DEBUG_DMA | \ 52 SMC_DEBUG_PKTS | \ 53 SMC_DEBUG_MISC | \ 54 SMC_DEBUG_FUNC \ 55 ) 56#endif 57 58#include <linux/init.h> 59#include <linux/module.h> 60#include <linux/kernel.h> 61#include <linux/sched.h> 62#include <linux/slab.h> 63#include <linux/delay.h> 64#include <linux/interrupt.h> 65#include <linux/errno.h> 66#include <linux/ioport.h> 67#include <linux/crc32.h> 68#include <linux/device.h> 69#include <linux/platform_device.h> 70#include <linux/spinlock.h> 71#include <linux/ethtool.h> 72#include <linux/mii.h> 73#include <linux/workqueue.h> 74 75#include <linux/netdevice.h> 76#include <linux/etherdevice.h> 77#include <linux/skbuff.h> 78 79#include <asm/io.h> 80 81#include "smc911x.h" 82 83/* 84 * Transmit timeout, default 5 seconds. 85 */ 86static int watchdog = 5000; 87module_param(watchdog, int, 0400); 88MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); 89 90static int tx_fifo_kb=8; 91module_param(tx_fifo_kb, int, 0400); 92MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); 93 94MODULE_LICENSE("GPL"); 95 96/* 97 * The internal workings of the driver. If you are changing anything 98 * here with the SMC stuff, you should have the datasheet and know 99 * what you are doing. 100 */ 101#define CARDNAME "smc911x" 102 103/* 104 * Use power-down feature of the chip 105 */ 106#define POWER_DOWN 1 107 108 109/* store this information for the driver.. */ 110struct smc911x_local { 111 /* 112 * If I have to wait until the DMA is finished and ready to reload a 113 * packet, I will store the skbuff here. Then, the DMA will send it 114 * out and free it. 115 */ 116 struct sk_buff *pending_tx_skb; 117 118 /* version/revision of the SMC911x chip */ 119 u16 version; 120 u16 revision; 121 122 /* FIFO sizes */ 123 int tx_fifo_kb; 124 int tx_fifo_size; 125 int rx_fifo_size; 126 int afc_cfg; 127 128 /* Contains the current active receive/phy mode */ 129 int ctl_rfduplx; 130 int ctl_rspeed; 131 132 u32 msg_enable; 133 u32 phy_type; 134 struct mii_if_info mii; 135 136 /* work queue */ 137 struct work_struct phy_configure; 138 int work_pending; 139 140 int tx_throttle; 141 spinlock_t lock; 142 143 struct net_device *netdev; 144 145#ifdef SMC_USE_DMA 146 /* DMA needs the physical address of the chip */ 147 u_long physaddr; 148 int rxdma; 149 int txdma; 150 int rxdma_active; 151 int txdma_active; 152 struct sk_buff *current_rx_skb; 153 struct sk_buff *current_tx_skb; 154 struct device *dev; 155#endif 156}; 157 158#if SMC_DEBUG > 0 159#define DBG(n, args...) \ 160 do { \ 161 if (SMC_DEBUG & (n)) \ 162 printk(args); \ 163 } while (0) 164 165#define PRINTK(args...) printk(args) 166#else 167#define DBG(n, args...) do { } while (0) 168#define PRINTK(args...) printk(KERN_DEBUG args) 169#endif 170 171#if SMC_DEBUG_PKTS > 0 172static void PRINT_PKT(u_char *buf, int length) 173{ 174 int i; 175 int remainder; 176 int lines; 177 178 lines = length / 16; 179 remainder = length % 16; 180 181 for (i = 0; i < lines ; i ++) { 182 int cur; 183 for (cur = 0; cur < 8; cur++) { 184 u_char a, b; 185 a = *buf++; 186 b = *buf++; 187 printk("%02x%02x ", a, b); 188 } 189 printk("\n"); 190 } 191 for (i = 0; i < remainder/2 ; i++) { 192 u_char a, b; 193 a = *buf++; 194 b = *buf++; 195 printk("%02x%02x ", a, b); 196 } 197 printk("\n"); 198} 199#else 200#define PRINT_PKT(x...) do { } while (0) 201#endif 202 203 204/* this enables an interrupt in the interrupt mask register */ 205#define SMC_ENABLE_INT(x) do { \ 206 unsigned int __mask; \ 207 unsigned long __flags; \ 208 spin_lock_irqsave(&lp->lock, __flags); \ 209 __mask = SMC_GET_INT_EN(); \ 210 __mask |= (x); \ 211 SMC_SET_INT_EN(__mask); \ 212 spin_unlock_irqrestore(&lp->lock, __flags); \ 213} while (0) 214 215/* this disables an interrupt from the interrupt mask register */ 216#define SMC_DISABLE_INT(x) do { \ 217 unsigned int __mask; \ 218 unsigned long __flags; \ 219 spin_lock_irqsave(&lp->lock, __flags); \ 220 __mask = SMC_GET_INT_EN(); \ 221 __mask &= ~(x); \ 222 SMC_SET_INT_EN(__mask); \ 223 spin_unlock_irqrestore(&lp->lock, __flags); \ 224} while (0) 225 226/* 227 * this does a soft reset on the device 228 */ 229static void smc911x_reset(struct net_device *dev) 230{ 231 unsigned long ioaddr = dev->base_addr; 232 struct smc911x_local *lp = netdev_priv(dev); 233 unsigned int reg, timeout=0, resets=1; 234 unsigned long flags; 235 236 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 237 238 /* Take out of PM setting first */ 239 if ((SMC_GET_PMT_CTRL() & PMT_CTRL_READY_) == 0) { 240 /* Write to the bytetest will take out of powerdown */ 241 SMC_SET_BYTE_TEST(0); 242 timeout=10; 243 do { 244 udelay(10); 245 reg = SMC_GET_PMT_CTRL() & PMT_CTRL_READY_; 246 } while ( timeout-- && !reg); 247 if (timeout == 0) { 248 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name); 249 return; 250 } 251 } 252 253 /* Disable all interrupts */ 254 spin_lock_irqsave(&lp->lock, flags); 255 SMC_SET_INT_EN(0); 256 spin_unlock_irqrestore(&lp->lock, flags); 257 258 while (resets--) { 259 SMC_SET_HW_CFG(HW_CFG_SRST_); 260 timeout=10; 261 do { 262 udelay(10); 263 reg = SMC_GET_HW_CFG(); 264 /* If chip indicates reset timeout then try again */ 265 if (reg & HW_CFG_SRST_TO_) { 266 PRINTK("%s: chip reset timeout, retrying...\n", dev->name); 267 resets++; 268 break; 269 } 270 } while ( timeout-- && (reg & HW_CFG_SRST_)); 271 } 272 if (timeout == 0) { 273 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name); 274 return; 275 } 276 277 /* make sure EEPROM has finished loading before setting GPIO_CFG */ 278 timeout=1000; 279 while ( timeout-- && (SMC_GET_E2P_CMD() & E2P_CMD_EPC_BUSY_)) { 280 udelay(10); 281 } 282 if (timeout == 0){ 283 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name); 284 return; 285 } 286 287 /* Initialize interrupts */ 288 SMC_SET_INT_EN(0); 289 SMC_ACK_INT(-1); 290 291 /* Reset the FIFO level and flow control settings */ 292 SMC_SET_HW_CFG((lp->tx_fifo_kb & 0xF) << 16); 293//TODO: Figure out what appropriate pause time is 294 SMC_SET_FLOW(FLOW_FCPT_ | FLOW_FCEN_); 295 SMC_SET_AFC_CFG(lp->afc_cfg); 296 297 298 /* Set to LED outputs */ 299 SMC_SET_GPIO_CFG(0x70070000); 300 301 /* 302 * Deassert IRQ for 1*10us for edge type interrupts 303 * and drive IRQ pin push-pull 304 */ 305 SMC_SET_IRQ_CFG( (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_ ); 306 307 /* clear anything saved */ 308 if (lp->pending_tx_skb != NULL) { 309 dev_kfree_skb (lp->pending_tx_skb); 310 lp->pending_tx_skb = NULL; 311 dev->stats.tx_errors++; 312 dev->stats.tx_aborted_errors++; 313 } 314} 315 316/* 317 * Enable Interrupts, Receive, and Transmit 318 */ 319static void smc911x_enable(struct net_device *dev) 320{ 321 unsigned long ioaddr = dev->base_addr; 322 struct smc911x_local *lp = netdev_priv(dev); 323 unsigned mask, cfg, cr; 324 unsigned long flags; 325 326 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 327 328 SMC_SET_MAC_ADDR(dev->dev_addr); 329 330 /* Enable TX */ 331 cfg = SMC_GET_HW_CFG(); 332 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF; 333 cfg |= HW_CFG_SF_; 334 SMC_SET_HW_CFG(cfg); 335 SMC_SET_FIFO_TDA(0xFF); 336 /* Update TX stats on every 64 packets received or every 1 sec */ 337 SMC_SET_FIFO_TSL(64); 338 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); 339 340 spin_lock_irqsave(&lp->lock, flags); 341 SMC_GET_MAC_CR(cr); 342 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_; 343 SMC_SET_MAC_CR(cr); 344 SMC_SET_TX_CFG(TX_CFG_TX_ON_); 345 spin_unlock_irqrestore(&lp->lock, flags); 346 347 /* Add 2 byte padding to start of packets */ 348 SMC_SET_RX_CFG((2<<8) & RX_CFG_RXDOFF_); 349 350 /* Turn on receiver and enable RX */ 351 if (cr & MAC_CR_RXEN_) 352 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name); 353 354 spin_lock_irqsave(&lp->lock, flags); 355 SMC_SET_MAC_CR( cr | MAC_CR_RXEN_ ); 356 spin_unlock_irqrestore(&lp->lock, flags); 357 358 /* Interrupt on every received packet */ 359 SMC_SET_FIFO_RSA(0x01); 360 SMC_SET_FIFO_RSL(0x00); 361 362 /* now, enable interrupts */ 363 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ | 364 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ | 365 INT_EN_PHY_INT_EN_; 366 if (IS_REV_A(lp->revision)) 367 mask|=INT_EN_RDFL_EN_; 368 else { 369 mask|=INT_EN_RDFO_EN_; 370 } 371 SMC_ENABLE_INT(mask); 372} 373 374/* 375 * this puts the device in an inactive state 376 */ 377static void smc911x_shutdown(struct net_device *dev) 378{ 379 unsigned long ioaddr = dev->base_addr; 380 struct smc911x_local *lp = netdev_priv(dev); 381 unsigned cr; 382 unsigned long flags; 383 384 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __FUNCTION__); 385 386 /* Disable IRQ's */ 387 SMC_SET_INT_EN(0); 388 389 /* Turn of Rx and TX */ 390 spin_lock_irqsave(&lp->lock, flags); 391 SMC_GET_MAC_CR(cr); 392 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); 393 SMC_SET_MAC_CR(cr); 394 SMC_SET_TX_CFG(TX_CFG_STOP_TX_); 395 spin_unlock_irqrestore(&lp->lock, flags); 396} 397 398static inline void smc911x_drop_pkt(struct net_device *dev) 399{ 400 unsigned long ioaddr = dev->base_addr; 401 unsigned int fifo_count, timeout, reg; 402 403 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __FUNCTION__); 404 fifo_count = SMC_GET_RX_FIFO_INF() & 0xFFFF; 405 if (fifo_count <= 4) { 406 /* Manually dump the packet data */ 407 while (fifo_count--) 408 SMC_GET_RX_FIFO(); 409 } else { 410 /* Fast forward through the bad packet */ 411 SMC_SET_RX_DP_CTRL(RX_DP_CTRL_FFWD_BUSY_); 412 timeout=50; 413 do { 414 udelay(10); 415 reg = SMC_GET_RX_DP_CTRL() & RX_DP_CTRL_FFWD_BUSY_; 416 } while ( timeout-- && reg); 417 if (timeout == 0) { 418 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name); 419 } 420 } 421} 422 423/* 424 * This is the procedure to handle the receipt of a packet. 425 * It should be called after checking for packet presence in 426 * the RX status FIFO. It must be called with the spin lock 427 * already held. 428 */ 429static inline void smc911x_rcv(struct net_device *dev) 430{ 431 unsigned long ioaddr = dev->base_addr; 432 unsigned int pkt_len, status; 433 struct sk_buff *skb; 434 unsigned char *data; 435 436 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", 437 dev->name, __FUNCTION__); 438 status = SMC_GET_RX_STS_FIFO(); 439 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n", 440 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff); 441 pkt_len = (status & RX_STS_PKT_LEN_) >> 16; 442 if (status & RX_STS_ES_) { 443 /* Deal with a bad packet */ 444 dev->stats.rx_errors++; 445 if (status & RX_STS_CRC_ERR_) 446 dev->stats.rx_crc_errors++; 447 else { 448 if (status & RX_STS_LEN_ERR_) 449 dev->stats.rx_length_errors++; 450 if (status & RX_STS_MCAST_) 451 dev->stats.multicast++; 452 } 453 /* Remove the bad packet data from the RX FIFO */ 454 smc911x_drop_pkt(dev); 455 } else { 456 /* Receive a valid packet */ 457 /* Alloc a buffer with extra room for DMA alignment */ 458 skb=dev_alloc_skb(pkt_len+32); 459 if (unlikely(skb == NULL)) { 460 PRINTK( "%s: Low memory, rcvd packet dropped.\n", 461 dev->name); 462 dev->stats.rx_dropped++; 463 smc911x_drop_pkt(dev); 464 return; 465 } 466 /* Align IP header to 32 bits 467 * Note that the device is configured to add a 2 468 * byte padding to the packet start, so we really 469 * want to write to the orignal data pointer */ 470 data = skb->data; 471 skb_reserve(skb, 2); 472 skb_put(skb,pkt_len-4); 473#ifdef SMC_USE_DMA 474 { 475 struct smc911x_local *lp = netdev_priv(dev); 476 unsigned int fifo; 477 /* Lower the FIFO threshold if possible */ 478 fifo = SMC_GET_FIFO_INT(); 479 if (fifo & 0xFF) fifo--; 480 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n", 481 dev->name, fifo & 0xff); 482 SMC_SET_FIFO_INT(fifo); 483 /* Setup RX DMA */ 484 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_)); 485 lp->rxdma_active = 1; 486 lp->current_rx_skb = skb; 487 SMC_PULL_DATA(data, (pkt_len+2+15) & ~15); 488 /* Packet processing deferred to DMA RX interrupt */ 489 } 490#else 491 SMC_SET_RX_CFG(RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_)); 492 SMC_PULL_DATA(data, pkt_len+2+3); 493 494 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name); 495 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64); 496 dev->last_rx = jiffies; 497 skb->protocol = eth_type_trans(skb, dev); 498 netif_rx(skb); 499 dev->stats.rx_packets++; 500 dev->stats.rx_bytes += pkt_len-4; 501#endif 502 } 503} 504 505/* 506 * This is called to actually send a packet to the chip. 507 */ 508static void smc911x_hardware_send_pkt(struct net_device *dev) 509{ 510 struct smc911x_local *lp = netdev_priv(dev); 511 unsigned long ioaddr = dev->base_addr; 512 struct sk_buff *skb; 513 unsigned int cmdA, cmdB, len; 514 unsigned char *buf; 515 unsigned long flags; 516 517 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __FUNCTION__); 518 BUG_ON(lp->pending_tx_skb == NULL); 519 520 skb = lp->pending_tx_skb; 521 lp->pending_tx_skb = NULL; 522 523 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */ 524 /* cmdB {31:16] pkt tag [10:0] length */ 525#ifdef SMC_USE_DMA 526 /* 16 byte buffer alignment mode */ 527 buf = (char*)((u32)(skb->data) & ~0xF); 528 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF; 529 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) | 530 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | 531 skb->len; 532#else 533 buf = (char*)((u32)skb->data & ~0x3); 534 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3; 535 cmdA = (((u32)skb->data & 0x3) << 16) | 536 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | 537 skb->len; 538#endif 539 /* tag is packet length so we can use this in stats update later */ 540 cmdB = (skb->len << 16) | (skb->len & 0x7FF); 541 542 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n", 543 dev->name, len, len, buf, cmdA, cmdB); 544 SMC_SET_TX_FIFO(cmdA); 545 SMC_SET_TX_FIFO(cmdB); 546 547 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name); 548 PRINT_PKT(buf, len <= 64 ? len : 64); 549 550 /* Send pkt via PIO or DMA */ 551#ifdef SMC_USE_DMA 552 lp->current_tx_skb = skb; 553 SMC_PUSH_DATA(buf, len); 554 /* DMA complete IRQ will free buffer and set jiffies */ 555#else 556 SMC_PUSH_DATA(buf, len); 557 dev->trans_start = jiffies; 558 dev_kfree_skb(skb); 559#endif 560 spin_lock_irqsave(&lp->lock, flags); 561 if (!lp->tx_throttle) { 562 netif_wake_queue(dev); 563 } 564 spin_unlock_irqrestore(&lp->lock, flags); 565 SMC_ENABLE_INT(INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_); 566} 567 568/* 569 * Since I am not sure if I will have enough room in the chip's ram 570 * to store the packet, I call this routine which either sends it 571 * now, or set the card to generates an interrupt when ready 572 * for the packet. 573 */ 574static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 575{ 576 struct smc911x_local *lp = netdev_priv(dev); 577 unsigned long ioaddr = dev->base_addr; 578 unsigned int free; 579 unsigned long flags; 580 581 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", 582 dev->name, __FUNCTION__); 583 584 BUG_ON(lp->pending_tx_skb != NULL); 585 586 free = SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TDFREE_; 587 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free); 588 589 /* Turn off the flow when running out of space in FIFO */ 590 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) { 591 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n", 592 dev->name, free); 593 spin_lock_irqsave(&lp->lock, flags); 594 /* Reenable when at least 1 packet of size MTU present */ 595 SMC_SET_FIFO_TDA((SMC911X_TX_FIFO_LOW_THRESHOLD)/64); 596 lp->tx_throttle = 1; 597 netif_stop_queue(dev); 598 spin_unlock_irqrestore(&lp->lock, flags); 599 } 600 601 /* Drop packets when we run out of space in TX FIFO 602 * Account for overhead required for: 603 * 604 * Tx command words 8 bytes 605 * Start offset 15 bytes 606 * End padding 15 bytes 607 */ 608 if (unlikely(free < (skb->len + 8 + 15 + 15))) { 609 printk("%s: No Tx free space %d < %d\n", 610 dev->name, free, skb->len); 611 lp->pending_tx_skb = NULL; 612 dev->stats.tx_errors++; 613 dev->stats.tx_dropped++; 614 dev_kfree_skb(skb); 615 return 0; 616 } 617 618#ifdef SMC_USE_DMA 619 { 620 /* If the DMA is already running then defer this packet Tx until 621 * the DMA IRQ starts it 622 */ 623 spin_lock_irqsave(&lp->lock, flags); 624 if (lp->txdma_active) { 625 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name); 626 lp->pending_tx_skb = skb; 627 netif_stop_queue(dev); 628 spin_unlock_irqrestore(&lp->lock, flags); 629 return 0; 630 } else { 631 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name); 632 lp->txdma_active = 1; 633 } 634 spin_unlock_irqrestore(&lp->lock, flags); 635 } 636#endif 637 lp->pending_tx_skb = skb; 638 smc911x_hardware_send_pkt(dev); 639 640 return 0; 641} 642 643/* 644 * This handles a TX status interrupt, which is only called when: 645 * - a TX error occurred, or 646 * - TX of a packet completed. 647 */ 648static void smc911x_tx(struct net_device *dev) 649{ 650 unsigned long ioaddr = dev->base_addr; 651 struct smc911x_local *lp = netdev_priv(dev); 652 unsigned int tx_status; 653 654 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", 655 dev->name, __FUNCTION__); 656 657 /* Collect the TX status */ 658 while (((SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16) != 0) { 659 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n", 660 dev->name, 661 (SMC_GET_TX_FIFO_INF() & TX_FIFO_INF_TSUSED_) >> 16); 662 tx_status = SMC_GET_TX_STS_FIFO(); 663 dev->stats.tx_packets++; 664 dev->stats.tx_bytes+=tx_status>>16; 665 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n", 666 dev->name, (tx_status & 0xffff0000) >> 16, 667 tx_status & 0x0000ffff); 668 /* count Tx errors, but ignore lost carrier errors when in 669 * full-duplex mode */ 670 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx && 671 !(tx_status & 0x00000306))) { 672 dev->stats.tx_errors++; 673 } 674 if (tx_status & TX_STS_MANY_COLL_) { 675 dev->stats.collisions+=16; 676 dev->stats.tx_aborted_errors++; 677 } else { 678 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3; 679 } 680 /* carrier error only has meaning for half-duplex communication */ 681 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) && 682 !lp->ctl_rfduplx) { 683 dev->stats.tx_carrier_errors++; 684 } 685 if (tx_status & TX_STS_LATE_COLL_) { 686 dev->stats.collisions++; 687 dev->stats.tx_aborted_errors++; 688 } 689 } 690} 691 692 693/*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ 694/* 695 * Reads a register from the MII Management serial interface 696 */ 697 698static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) 699{ 700 unsigned long ioaddr = dev->base_addr; 701 unsigned int phydata; 702 703 SMC_GET_MII(phyreg, phyaddr, phydata); 704 705 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n", 706 __FUNCTION__, phyaddr, phyreg, phydata); 707 return phydata; 708} 709 710 711/* 712 * Writes a register to the MII Management serial interface 713 */ 714static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, 715 int phydata) 716{ 717 unsigned long ioaddr = dev->base_addr; 718 719 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", 720 __FUNCTION__, phyaddr, phyreg, phydata); 721 722 SMC_SET_MII(phyreg, phyaddr, phydata); 723} 724 725/* 726 * Finds and reports the PHY address (115 and 117 have external 727 * PHY interface 118 has internal only 728 */ 729static void smc911x_phy_detect(struct net_device *dev) 730{ 731 unsigned long ioaddr = dev->base_addr; 732 struct smc911x_local *lp = netdev_priv(dev); 733 int phyaddr; 734 unsigned int cfg, id1, id2; 735 736 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 737 738 lp->phy_type = 0; 739 740 /* 741 * Scan all 32 PHY addresses if necessary, starting at 742 * PHY#1 to PHY#31, and then PHY#0 last. 743 */ 744 switch(lp->version) { 745 case 0x115: 746 case 0x117: 747 cfg = SMC_GET_HW_CFG(); 748 if (cfg & HW_CFG_EXT_PHY_DET_) { 749 cfg &= ~HW_CFG_PHY_CLK_SEL_; 750 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; 751 SMC_SET_HW_CFG(cfg); 752 udelay(10); /* Wait for clocks to stop */ 753 754 cfg |= HW_CFG_EXT_PHY_EN_; 755 SMC_SET_HW_CFG(cfg); 756 udelay(10); /* Wait for clocks to stop */ 757 758 cfg &= ~HW_CFG_PHY_CLK_SEL_; 759 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; 760 SMC_SET_HW_CFG(cfg); 761 udelay(10); /* Wait for clocks to stop */ 762 763 cfg |= HW_CFG_SMI_SEL_; 764 SMC_SET_HW_CFG(cfg); 765 766 for (phyaddr = 1; phyaddr < 32; ++phyaddr) { 767 768 /* Read the PHY identifiers */ 769 SMC_GET_PHY_ID1(phyaddr & 31, id1); 770 SMC_GET_PHY_ID2(phyaddr & 31, id2); 771 772 /* Make sure it is a valid identifier */ 773 if (id1 != 0x0000 && id1 != 0xffff && 774 id1 != 0x8000 && id2 != 0x0000 && 775 id2 != 0xffff && id2 != 0x8000) { 776 /* Save the PHY's address */ 777 lp->mii.phy_id = phyaddr & 31; 778 lp->phy_type = id1 << 16 | id2; 779 break; 780 } 781 } 782 } 783 default: 784 /* Internal media only */ 785 SMC_GET_PHY_ID1(1, id1); 786 SMC_GET_PHY_ID2(1, id2); 787 /* Save the PHY's address */ 788 lp->mii.phy_id = 1; 789 lp->phy_type = id1 << 16 | id2; 790 } 791 792 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n", 793 dev->name, id1, id2, lp->mii.phy_id); 794} 795 796/* 797 * Sets the PHY to a configuration as determined by the user. 798 * Called with spin_lock held. 799 */ 800static int smc911x_phy_fixed(struct net_device *dev) 801{ 802 struct smc911x_local *lp = netdev_priv(dev); 803 unsigned long ioaddr = dev->base_addr; 804 int phyaddr = lp->mii.phy_id; 805 int bmcr; 806 807 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 808 809 /* Enter Link Disable state */ 810 SMC_GET_PHY_BMCR(phyaddr, bmcr); 811 bmcr |= BMCR_PDOWN; 812 SMC_SET_PHY_BMCR(phyaddr, bmcr); 813 814 /* 815 * Set our fixed capabilities 816 * Disable auto-negotiation 817 */ 818 bmcr &= ~BMCR_ANENABLE; 819 if (lp->ctl_rfduplx) 820 bmcr |= BMCR_FULLDPLX; 821 822 if (lp->ctl_rspeed == 100) 823 bmcr |= BMCR_SPEED100; 824 825 /* Write our capabilities to the phy control register */ 826 SMC_SET_PHY_BMCR(phyaddr, bmcr); 827 828 /* Re-Configure the Receive/Phy Control register */ 829 bmcr &= ~BMCR_PDOWN; 830 SMC_SET_PHY_BMCR(phyaddr, bmcr); 831 832 return 1; 833} 834 835/* 836 * smc911x_phy_reset - reset the phy 837 * @dev: net device 838 * @phy: phy address 839 * 840 * Issue a software reset for the specified PHY and 841 * wait up to 100ms for the reset to complete. We should 842 * not access the PHY for 50ms after issuing the reset. 843 * 844 * The time to wait appears to be dependent on the PHY. 845 * 846 */ 847static int smc911x_phy_reset(struct net_device *dev, int phy) 848{ 849 struct smc911x_local *lp = netdev_priv(dev); 850 unsigned long ioaddr = dev->base_addr; 851 int timeout; 852 unsigned long flags; 853 unsigned int reg; 854 855 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); 856 857 spin_lock_irqsave(&lp->lock, flags); 858 reg = SMC_GET_PMT_CTRL(); 859 reg &= ~0xfffff030; 860 reg |= PMT_CTRL_PHY_RST_; 861 SMC_SET_PMT_CTRL(reg); 862 spin_unlock_irqrestore(&lp->lock, flags); 863 for (timeout = 2; timeout; timeout--) { 864 msleep(50); 865 spin_lock_irqsave(&lp->lock, flags); 866 reg = SMC_GET_PMT_CTRL(); 867 spin_unlock_irqrestore(&lp->lock, flags); 868 if (!(reg & PMT_CTRL_PHY_RST_)) { 869 /* extra delay required because the phy may 870 * not be completed with its reset 871 * when PHY_BCR_RESET_ is cleared. 256us 872 * should suffice, but use 500us to be safe 873 */ 874 udelay(500); 875 break; 876 } 877 } 878 879 return reg & PMT_CTRL_PHY_RST_; 880} 881 882/* 883 * smc911x_phy_powerdown - powerdown phy 884 * @dev: net device 885 * @phy: phy address 886 * 887 * Power down the specified PHY 888 */ 889static void smc911x_phy_powerdown(struct net_device *dev, int phy) 890{ 891 unsigned long ioaddr = dev->base_addr; 892 unsigned int bmcr; 893 894 /* Enter Link Disable state */ 895 SMC_GET_PHY_BMCR(phy, bmcr); 896 bmcr |= BMCR_PDOWN; 897 SMC_SET_PHY_BMCR(phy, bmcr); 898} 899 900/* 901 * smc911x_phy_check_media - check the media status and adjust BMCR 902 * @dev: net device 903 * @init: set true for initialisation 904 * 905 * Select duplex mode depending on negotiation state. This 906 * also updates our carrier state. 907 */ 908static void smc911x_phy_check_media(struct net_device *dev, int init) 909{ 910 struct smc911x_local *lp = netdev_priv(dev); 911 unsigned long ioaddr = dev->base_addr; 912 int phyaddr = lp->mii.phy_id; 913 unsigned int bmcr, cr; 914 915 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 916 917 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { 918 /* duplex state has changed */ 919 SMC_GET_PHY_BMCR(phyaddr, bmcr); 920 SMC_GET_MAC_CR(cr); 921 if (lp->mii.full_duplex) { 922 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name); 923 bmcr |= BMCR_FULLDPLX; 924 cr |= MAC_CR_RCVOWN_; 925 } else { 926 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name); 927 bmcr &= ~BMCR_FULLDPLX; 928 cr &= ~MAC_CR_RCVOWN_; 929 } 930 SMC_SET_PHY_BMCR(phyaddr, bmcr); 931 SMC_SET_MAC_CR(cr); 932 } 933} 934 935/* 936 * Configures the specified PHY through the MII management interface 937 * using Autonegotiation. 938 * Calls smc911x_phy_fixed() if the user has requested a certain config. 939 * If RPC ANEG bit is set, the media selection is dependent purely on 940 * the selection by the MII (either in the MII BMCR reg or the result 941 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection 942 * is controlled by the RPC SPEED and RPC DPLX bits. 943 */ 944static void smc911x_phy_configure(struct work_struct *work) 945{ 946 struct smc911x_local *lp = container_of(work, struct smc911x_local, 947 phy_configure); 948 struct net_device *dev = lp->netdev; 949 unsigned long ioaddr = dev->base_addr; 950 int phyaddr = lp->mii.phy_id; 951 int my_phy_caps; /* My PHY capabilities */ 952 int my_ad_caps; /* My Advertised capabilities */ 953 int status; 954 unsigned long flags; 955 956 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __FUNCTION__); 957 958 /* 959 * We should not be called if phy_type is zero. 960 */ 961 if (lp->phy_type == 0) 962 goto smc911x_phy_configure_exit_nolock; 963 964 if (smc911x_phy_reset(dev, phyaddr)) { 965 printk("%s: PHY reset timed out\n", dev->name); 966 goto smc911x_phy_configure_exit_nolock; 967 } 968 spin_lock_irqsave(&lp->lock, flags); 969 970 /* 971 * Enable PHY Interrupts (for register 18) 972 * Interrupts listed here are enabled 973 */ 974 SMC_SET_PHY_INT_MASK(phyaddr, PHY_INT_MASK_ENERGY_ON_ | 975 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ | 976 PHY_INT_MASK_LINK_DOWN_); 977 978 /* If the user requested no auto neg, then go set his request */ 979 if (lp->mii.force_media) { 980 smc911x_phy_fixed(dev); 981 goto smc911x_phy_configure_exit; 982 } 983 984 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ 985 SMC_GET_PHY_BMSR(phyaddr, my_phy_caps); 986 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { 987 printk(KERN_INFO "Auto negotiation NOT supported\n"); 988 smc911x_phy_fixed(dev); 989 goto smc911x_phy_configure_exit; 990 } 991 992 /* CSMA capable w/ both pauses */ 993 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; 994 995 if (my_phy_caps & BMSR_100BASE4) 996 my_ad_caps |= ADVERTISE_100BASE4; 997 if (my_phy_caps & BMSR_100FULL) 998 my_ad_caps |= ADVERTISE_100FULL; 999 if (my_phy_caps & BMSR_100HALF) 1000 my_ad_caps |= ADVERTISE_100HALF; 1001 if (my_phy_caps & BMSR_10FULL) 1002 my_ad_caps |= ADVERTISE_10FULL; 1003 if (my_phy_caps & BMSR_10HALF) 1004 my_ad_caps |= ADVERTISE_10HALF; 1005 1006 /* Disable capabilities not selected by our user */ 1007 if (lp->ctl_rspeed != 100) 1008 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); 1009 1010 if (!lp->ctl_rfduplx) 1011 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); 1012 1013 /* Update our Auto-Neg Advertisement Register */ 1014 SMC_SET_PHY_MII_ADV(phyaddr, my_ad_caps); 1015 lp->mii.advertising = my_ad_caps; 1016 1017 /* 1018 * Read the register back. Without this, it appears that when 1019 * auto-negotiation is restarted, sometimes it isn't ready and 1020 * the link does not come up. 1021 */ 1022 udelay(10); 1023 SMC_GET_PHY_MII_ADV(phyaddr, status); 1024 1025 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps); 1026 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps); 1027 1028 /* Restart auto-negotiation process in order to advertise my caps */ 1029 SMC_SET_PHY_BMCR(phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); 1030 1031 smc911x_phy_check_media(dev, 1); 1032 1033smc911x_phy_configure_exit: 1034 spin_unlock_irqrestore(&lp->lock, flags); 1035smc911x_phy_configure_exit_nolock: 1036 lp->work_pending = 0; 1037} 1038 1039/* 1040 * smc911x_phy_interrupt 1041 * 1042 * Purpose: Handle interrupts relating to PHY register 18. This is 1043 * called from the "hard" interrupt handler under our private spinlock. 1044 */ 1045static void smc911x_phy_interrupt(struct net_device *dev) 1046{ 1047 struct smc911x_local *lp = netdev_priv(dev); 1048 unsigned long ioaddr = dev->base_addr; 1049 int phyaddr = lp->mii.phy_id; 1050 int status; 1051 1052 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1053 1054 if (lp->phy_type == 0) 1055 return; 1056 1057 smc911x_phy_check_media(dev, 0); 1058 /* read to clear status bits */ 1059 SMC_GET_PHY_INT_SRC(phyaddr,status); 1060 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n", 1061 dev->name, status & 0xffff); 1062 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n", 1063 dev->name, SMC_GET_AFC_CFG()); 1064} 1065 1066/*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ 1067 1068/* 1069 * This is the main routine of the driver, to handle the device when 1070 * it needs some attention. 1071 */ 1072static irqreturn_t smc911x_interrupt(int irq, void *dev_id) 1073{ 1074 struct net_device *dev = dev_id; 1075 unsigned long ioaddr = dev->base_addr; 1076 struct smc911x_local *lp = netdev_priv(dev); 1077 unsigned int status, mask, timeout; 1078 unsigned int rx_overrun=0, cr, pkts; 1079 unsigned long flags; 1080 1081 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1082 1083 spin_lock_irqsave(&lp->lock, flags); 1084 1085 /* Spurious interrupt check */ 1086 if ((SMC_GET_IRQ_CFG() & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) != 1087 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) { 1088 spin_unlock_irqrestore(&lp->lock, flags); 1089 return IRQ_NONE; 1090 } 1091 1092 mask = SMC_GET_INT_EN(); 1093 SMC_SET_INT_EN(0); 1094 1095 /* set a timeout value, so I don't stay here forever */ 1096 timeout = 8; 1097 1098 1099 do { 1100 status = SMC_GET_INT(); 1101 1102 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n", 1103 dev->name, status, mask, status & ~mask); 1104 1105 status &= mask; 1106 if (!status) 1107 break; 1108 1109 /* Handle SW interrupt condition */ 1110 if (status & INT_STS_SW_INT_) { 1111 SMC_ACK_INT(INT_STS_SW_INT_); 1112 mask &= ~INT_EN_SW_INT_EN_; 1113 } 1114 /* Handle various error conditions */ 1115 if (status & INT_STS_RXE_) { 1116 SMC_ACK_INT(INT_STS_RXE_); 1117 dev->stats.rx_errors++; 1118 } 1119 if (status & INT_STS_RXDFH_INT_) { 1120 SMC_ACK_INT(INT_STS_RXDFH_INT_); 1121 dev->stats.rx_dropped+=SMC_GET_RX_DROP(); 1122 } 1123 /* Undocumented interrupt-what is the right thing to do here? */ 1124 if (status & INT_STS_RXDF_INT_) { 1125 SMC_ACK_INT(INT_STS_RXDF_INT_); 1126 } 1127 1128 /* Rx Data FIFO exceeds set level */ 1129 if (status & INT_STS_RDFL_) { 1130 if (IS_REV_A(lp->revision)) { 1131 rx_overrun=1; 1132 SMC_GET_MAC_CR(cr); 1133 cr &= ~MAC_CR_RXEN_; 1134 SMC_SET_MAC_CR(cr); 1135 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); 1136 dev->stats.rx_errors++; 1137 dev->stats.rx_fifo_errors++; 1138 } 1139 SMC_ACK_INT(INT_STS_RDFL_); 1140 } 1141 if (status & INT_STS_RDFO_) { 1142 if (!IS_REV_A(lp->revision)) { 1143 SMC_GET_MAC_CR(cr); 1144 cr &= ~MAC_CR_RXEN_; 1145 SMC_SET_MAC_CR(cr); 1146 rx_overrun=1; 1147 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name); 1148 dev->stats.rx_errors++; 1149 dev->stats.rx_fifo_errors++; 1150 } 1151 SMC_ACK_INT(INT_STS_RDFO_); 1152 } 1153 /* Handle receive condition */ 1154 if ((status & INT_STS_RSFL_) || rx_overrun) { 1155 unsigned int fifo; 1156 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name); 1157 fifo = SMC_GET_RX_FIFO_INF(); 1158 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16; 1159 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n", 1160 dev->name, pkts, fifo & 0xFFFF ); 1161 if (pkts != 0) { 1162#ifdef SMC_USE_DMA 1163 unsigned int fifo; 1164 if (lp->rxdma_active){ 1165 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, 1166 "%s: RX DMA active\n", dev->name); 1167 /* The DMA is already running so up the IRQ threshold */ 1168 fifo = SMC_GET_FIFO_INT() & ~0xFF; 1169 fifo |= pkts & 0xFF; 1170 DBG(SMC_DEBUG_RX, 1171 "%s: Setting RX stat FIFO threshold to %d\n", 1172 dev->name, fifo & 0xff); 1173 SMC_SET_FIFO_INT(fifo); 1174 } else 1175#endif 1176 smc911x_rcv(dev); 1177 } 1178 SMC_ACK_INT(INT_STS_RSFL_); 1179 } 1180 /* Handle transmit FIFO available */ 1181 if (status & INT_STS_TDFA_) { 1182 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name); 1183 SMC_SET_FIFO_TDA(0xFF); 1184 lp->tx_throttle = 0; 1185#ifdef SMC_USE_DMA 1186 if (!lp->txdma_active) 1187#endif 1188 netif_wake_queue(dev); 1189 SMC_ACK_INT(INT_STS_TDFA_); 1190 } 1191 /* Handle transmit done condition */ 1192#if 1 1193 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) { 1194 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, 1195 "%s: Tx stat FIFO limit (%d) /GPT irq\n", 1196 dev->name, (SMC_GET_FIFO_INT() & 0x00ff0000) >> 16); 1197 smc911x_tx(dev); 1198 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); 1199 SMC_ACK_INT(INT_STS_TSFL_); 1200 SMC_ACK_INT(INT_STS_TSFL_ | INT_STS_GPT_INT_); 1201 } 1202#else 1203 if (status & INT_STS_TSFL_) { 1204 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, ); 1205 smc911x_tx(dev); 1206 SMC_ACK_INT(INT_STS_TSFL_); 1207 } 1208 1209 if (status & INT_STS_GPT_INT_) { 1210 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n", 1211 dev->name, 1212 SMC_GET_IRQ_CFG(), 1213 SMC_GET_FIFO_INT(), 1214 SMC_GET_RX_CFG()); 1215 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x " 1216 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n", 1217 dev->name, 1218 (SMC_GET_RX_FIFO_INF() & 0x00ff0000) >> 16, 1219 SMC_GET_RX_FIFO_INF() & 0xffff, 1220 SMC_GET_RX_STS_FIFO_PEEK()); 1221 SMC_SET_GPT_CFG(GPT_CFG_TIMER_EN_ | 10000); 1222 SMC_ACK_INT(INT_STS_GPT_INT_); 1223 } 1224#endif 1225 1226 /* Handle PHY interrupt condition */ 1227 if (status & INT_STS_PHY_INT_) { 1228 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name); 1229 smc911x_phy_interrupt(dev); 1230 SMC_ACK_INT(INT_STS_PHY_INT_); 1231 } 1232 } while (--timeout); 1233 1234 /* restore mask state */ 1235 SMC_SET_INT_EN(mask); 1236 1237 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n", 1238 dev->name, 8-timeout); 1239 1240 spin_unlock_irqrestore(&lp->lock, flags); 1241 1242 DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout); 1243 1244 return IRQ_HANDLED; 1245} 1246 1247#ifdef SMC_USE_DMA 1248static void 1249smc911x_tx_dma_irq(int dma, void *data) 1250{ 1251 struct net_device *dev = (struct net_device *)data; 1252 struct smc911x_local *lp = netdev_priv(dev); 1253 struct sk_buff *skb = lp->current_tx_skb; 1254 unsigned long flags; 1255 1256 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1257 1258 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name); 1259 /* Clear the DMA interrupt sources */ 1260 SMC_DMA_ACK_IRQ(dev, dma); 1261 BUG_ON(skb == NULL); 1262 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE); 1263 dev->trans_start = jiffies; 1264 dev_kfree_skb_irq(skb); 1265 lp->current_tx_skb = NULL; 1266 if (lp->pending_tx_skb != NULL) 1267 smc911x_hardware_send_pkt(dev); 1268 else { 1269 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, 1270 "%s: No pending Tx packets. DMA disabled\n", dev->name); 1271 spin_lock_irqsave(&lp->lock, flags); 1272 lp->txdma_active = 0; 1273 if (!lp->tx_throttle) { 1274 netif_wake_queue(dev); 1275 } 1276 spin_unlock_irqrestore(&lp->lock, flags); 1277 } 1278 1279 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, 1280 "%s: TX DMA irq completed\n", dev->name); 1281} 1282static void 1283smc911x_rx_dma_irq(int dma, void *data) 1284{ 1285 struct net_device *dev = (struct net_device *)data; 1286 unsigned long ioaddr = dev->base_addr; 1287 struct smc911x_local *lp = netdev_priv(dev); 1288 struct sk_buff *skb = lp->current_rx_skb; 1289 unsigned long flags; 1290 unsigned int pkts; 1291 1292 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1293 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name); 1294 /* Clear the DMA interrupt sources */ 1295 SMC_DMA_ACK_IRQ(dev, dma); 1296 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE); 1297 BUG_ON(skb == NULL); 1298 lp->current_rx_skb = NULL; 1299 PRINT_PKT(skb->data, skb->len); 1300 dev->last_rx = jiffies; 1301 skb->protocol = eth_type_trans(skb, dev); 1302 dev->stats.rx_packets++; 1303 dev->stats.rx_bytes += skb->len; 1304 netif_rx(skb); 1305 1306 spin_lock_irqsave(&lp->lock, flags); 1307 pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16; 1308 if (pkts != 0) { 1309 smc911x_rcv(dev); 1310 }else { 1311 lp->rxdma_active = 0; 1312 } 1313 spin_unlock_irqrestore(&lp->lock, flags); 1314 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, 1315 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n", 1316 dev->name, pkts); 1317} 1318#endif /* SMC_USE_DMA */ 1319 1320#ifdef CONFIG_NET_POLL_CONTROLLER 1321/* 1322 * Polling receive - used by netconsole and other diagnostic tools 1323 * to allow network i/o with interrupts disabled. 1324 */ 1325static void smc911x_poll_controller(struct net_device *dev) 1326{ 1327 disable_irq(dev->irq); 1328 smc911x_interrupt(dev->irq, dev); 1329 enable_irq(dev->irq); 1330} 1331#endif 1332 1333/* Our watchdog timed out. Called by the networking layer */ 1334static void smc911x_timeout(struct net_device *dev) 1335{ 1336 struct smc911x_local *lp = netdev_priv(dev); 1337 unsigned long ioaddr = dev->base_addr; 1338 int status, mask; 1339 unsigned long flags; 1340 1341 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1342 1343 spin_lock_irqsave(&lp->lock, flags); 1344 status = SMC_GET_INT(); 1345 mask = SMC_GET_INT_EN(); 1346 spin_unlock_irqrestore(&lp->lock, flags); 1347 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n", 1348 dev->name, status, mask); 1349 1350 /* Dump the current TX FIFO contents and restart */ 1351 mask = SMC_GET_TX_CFG(); 1352 SMC_SET_TX_CFG(mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_); 1353 /* 1354 * Reconfiguring the PHY doesn't seem like a bad idea here, but 1355 * smc911x_phy_configure() calls msleep() which calls schedule_timeout() 1356 * which calls schedule(). Hence we use a work queue. 1357 */ 1358 if (lp->phy_type != 0) { 1359 if (schedule_work(&lp->phy_configure)) { 1360 lp->work_pending = 1; 1361 } 1362 } 1363 1364 /* We can accept TX packets again */ 1365 dev->trans_start = jiffies; 1366 netif_wake_queue(dev); 1367} 1368 1369/* 1370 * This routine will, depending on the values passed to it, 1371 * either make it accept multicast packets, go into 1372 * promiscuous mode (for TCPDUMP and cousins) or accept 1373 * a select set of multicast packets 1374 */ 1375static void smc911x_set_multicast_list(struct net_device *dev) 1376{ 1377 struct smc911x_local *lp = netdev_priv(dev); 1378 unsigned long ioaddr = dev->base_addr; 1379 unsigned int multicast_table[2]; 1380 unsigned int mcr, update_multicast = 0; 1381 unsigned long flags; 1382 1383 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1384 1385 spin_lock_irqsave(&lp->lock, flags); 1386 SMC_GET_MAC_CR(mcr); 1387 spin_unlock_irqrestore(&lp->lock, flags); 1388 1389 if (dev->flags & IFF_PROMISC) { 1390 1391 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name); 1392 mcr |= MAC_CR_PRMS_; 1393 } 1394 /* 1395 * Here, I am setting this to accept all multicast packets. 1396 * I don't need to zero the multicast table, because the flag is 1397 * checked before the table is 1398 */ 1399 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) { 1400 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name); 1401 mcr |= MAC_CR_MCPAS_; 1402 } 1403 1404 /* 1405 * This sets the internal hardware table to filter out unwanted 1406 * multicast packets before they take up memory. 1407 * 1408 * The SMC chip uses a hash table where the high 6 bits of the CRC of 1409 * address are the offset into the table. If that bit is 1, then the 1410 * multicast packet is accepted. Otherwise, it's dropped silently. 1411 * 1412 * To use the 6 bits as an offset into the table, the high 1 bit is 1413 * the number of the 32 bit register, while the low 5 bits are the bit 1414 * within that register. 1415 */ 1416 else if (dev->mc_count) { 1417 int i; 1418 struct dev_mc_list *cur_addr; 1419 1420 /* Set the Hash perfec mode */ 1421 mcr |= MAC_CR_HPFILT_; 1422 1423 /* start with a table of all zeros: reject all */ 1424 memset(multicast_table, 0, sizeof(multicast_table)); 1425 1426 cur_addr = dev->mc_list; 1427 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) { 1428 u32 position; 1429 1430 /* do we have a pointer here? */ 1431 if (!cur_addr) 1432 break; 1433 /* make sure this is a multicast address - 1434 shouldn't this be a given if we have it here ? */ 1435 if (!(*cur_addr->dmi_addr & 1)) 1436 continue; 1437 1438 /* upper 6 bits are used as hash index */ 1439 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26; 1440 1441 multicast_table[position>>5] |= 1 << (position&0x1f); 1442 } 1443 1444 /* be sure I get rid of flags I might have set */ 1445 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1446 1447 /* now, the table can be loaded into the chipset */ 1448 update_multicast = 1; 1449 } else { 1450 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n", 1451 dev->name); 1452 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 1453 1454 /* 1455 * since I'm disabling all multicast entirely, I need to 1456 * clear the multicast list 1457 */ 1458 memset(multicast_table, 0, sizeof(multicast_table)); 1459 update_multicast = 1; 1460 } 1461 1462 spin_lock_irqsave(&lp->lock, flags); 1463 SMC_SET_MAC_CR(mcr); 1464 if (update_multicast) { 1465 DBG(SMC_DEBUG_MISC, 1466 "%s: update mcast hash table 0x%08x 0x%08x\n", 1467 dev->name, multicast_table[0], multicast_table[1]); 1468 SMC_SET_HASHL(multicast_table[0]); 1469 SMC_SET_HASHH(multicast_table[1]); 1470 } 1471 spin_unlock_irqrestore(&lp->lock, flags); 1472} 1473 1474 1475/* 1476 * Open and Initialize the board 1477 * 1478 * Set up everything, reset the card, etc.. 1479 */ 1480static int 1481smc911x_open(struct net_device *dev) 1482{ 1483 struct smc911x_local *lp = netdev_priv(dev); 1484 1485 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1486 1487 /* 1488 * Check that the address is valid. If its not, refuse 1489 * to bring the device up. The user must specify an 1490 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx 1491 */ 1492 if (!is_valid_ether_addr(dev->dev_addr)) { 1493 PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__); 1494 return -EINVAL; 1495 } 1496 1497 /* reset the hardware */ 1498 smc911x_reset(dev); 1499 1500 /* Configure the PHY, initialize the link state */ 1501 smc911x_phy_configure(&lp->phy_configure); 1502 1503 /* Turn on Tx + Rx */ 1504 smc911x_enable(dev); 1505 1506 netif_start_queue(dev); 1507 1508 return 0; 1509} 1510 1511/* 1512 * smc911x_close 1513 * 1514 * this makes the board clean up everything that it can 1515 * and not talk to the outside world. Caused by 1516 * an 'ifconfig ethX down' 1517 */ 1518static int smc911x_close(struct net_device *dev) 1519{ 1520 struct smc911x_local *lp = netdev_priv(dev); 1521 1522 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1523 1524 netif_stop_queue(dev); 1525 netif_carrier_off(dev); 1526 1527 /* clear everything */ 1528 smc911x_shutdown(dev); 1529 1530 if (lp->phy_type != 0) { 1531 /* We need to ensure that no calls to 1532 * smc911x_phy_configure are pending. 1533 1534 * flush_scheduled_work() cannot be called because we 1535 * are running with the netlink semaphore held (from 1536 * devinet_ioctl()) and the pending work queue 1537 * contains linkwatch_event() (scheduled by 1538 * netif_carrier_off() above). linkwatch_event() also 1539 * wants the netlink semaphore. 1540 */ 1541 while (lp->work_pending) 1542 schedule(); 1543 smc911x_phy_powerdown(dev, lp->mii.phy_id); 1544 } 1545 1546 if (lp->pending_tx_skb) { 1547 dev_kfree_skb(lp->pending_tx_skb); 1548 lp->pending_tx_skb = NULL; 1549 } 1550 1551 return 0; 1552} 1553 1554/* 1555 * Ethtool support 1556 */ 1557static int 1558smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1559{ 1560 struct smc911x_local *lp = netdev_priv(dev); 1561 unsigned long ioaddr = dev->base_addr; 1562 int ret, status; 1563 unsigned long flags; 1564 1565 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1566 cmd->maxtxpkt = 1; 1567 cmd->maxrxpkt = 1; 1568 1569 if (lp->phy_type != 0) { 1570 spin_lock_irqsave(&lp->lock, flags); 1571 ret = mii_ethtool_gset(&lp->mii, cmd); 1572 spin_unlock_irqrestore(&lp->lock, flags); 1573 } else { 1574 cmd->supported = SUPPORTED_10baseT_Half | 1575 SUPPORTED_10baseT_Full | 1576 SUPPORTED_TP | SUPPORTED_AUI; 1577 1578 if (lp->ctl_rspeed == 10) 1579 cmd->speed = SPEED_10; 1580 else if (lp->ctl_rspeed == 100) 1581 cmd->speed = SPEED_100; 1582 1583 cmd->autoneg = AUTONEG_DISABLE; 1584 if (lp->mii.phy_id==1) 1585 cmd->transceiver = XCVR_INTERNAL; 1586 else 1587 cmd->transceiver = XCVR_EXTERNAL; 1588 cmd->port = 0; 1589 SMC_GET_PHY_SPECIAL(lp->mii.phy_id, status); 1590 cmd->duplex = 1591 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ? 1592 DUPLEX_FULL : DUPLEX_HALF; 1593 ret = 0; 1594 } 1595 1596 return ret; 1597} 1598 1599static int 1600smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd) 1601{ 1602 struct smc911x_local *lp = netdev_priv(dev); 1603 int ret; 1604 unsigned long flags; 1605 1606 if (lp->phy_type != 0) { 1607 spin_lock_irqsave(&lp->lock, flags); 1608 ret = mii_ethtool_sset(&lp->mii, cmd); 1609 spin_unlock_irqrestore(&lp->lock, flags); 1610 } else { 1611 if (cmd->autoneg != AUTONEG_DISABLE || 1612 cmd->speed != SPEED_10 || 1613 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) || 1614 (cmd->port != PORT_TP && cmd->port != PORT_AUI)) 1615 return -EINVAL; 1616 1617 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL; 1618 1619 ret = 0; 1620 } 1621 1622 return ret; 1623} 1624 1625static void 1626smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1627{ 1628 strncpy(info->driver, CARDNAME, sizeof(info->driver)); 1629 strncpy(info->version, version, sizeof(info->version)); 1630 strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info)); 1631} 1632 1633static int smc911x_ethtool_nwayreset(struct net_device *dev) 1634{ 1635 struct smc911x_local *lp = netdev_priv(dev); 1636 int ret = -EINVAL; 1637 unsigned long flags; 1638 1639 if (lp->phy_type != 0) { 1640 spin_lock_irqsave(&lp->lock, flags); 1641 ret = mii_nway_restart(&lp->mii); 1642 spin_unlock_irqrestore(&lp->lock, flags); 1643 } 1644 1645 return ret; 1646} 1647 1648static u32 smc911x_ethtool_getmsglevel(struct net_device *dev) 1649{ 1650 struct smc911x_local *lp = netdev_priv(dev); 1651 return lp->msg_enable; 1652} 1653 1654static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) 1655{ 1656 struct smc911x_local *lp = netdev_priv(dev); 1657 lp->msg_enable = level; 1658} 1659 1660static int smc911x_ethtool_getregslen(struct net_device *dev) 1661{ 1662 /* System regs + MAC regs + PHY regs */ 1663 return (((E2P_CMD - ID_REV)/4 + 1) + 1664 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32); 1665} 1666 1667static void smc911x_ethtool_getregs(struct net_device *dev, 1668 struct ethtool_regs* regs, void *buf) 1669{ 1670 unsigned long ioaddr = dev->base_addr; 1671 struct smc911x_local *lp = netdev_priv(dev); 1672 unsigned long flags; 1673 u32 reg,i,j=0; 1674 u32 *data = (u32*)buf; 1675 1676 regs->version = lp->version; 1677 for(i=ID_REV;i<=E2P_CMD;i+=4) { 1678 data[j++] = SMC_inl(ioaddr,i); 1679 } 1680 for(i=MAC_CR;i<=WUCSR;i++) { 1681 spin_lock_irqsave(&lp->lock, flags); 1682 SMC_GET_MAC_CSR(i, reg); 1683 spin_unlock_irqrestore(&lp->lock, flags); 1684 data[j++] = reg; 1685 } 1686 for(i=0;i<=31;i++) { 1687 spin_lock_irqsave(&lp->lock, flags); 1688 SMC_GET_MII(i, lp->mii.phy_id, reg); 1689 spin_unlock_irqrestore(&lp->lock, flags); 1690 data[j++] = reg & 0xFFFF; 1691 } 1692} 1693 1694static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev) 1695{ 1696 unsigned long ioaddr = dev->base_addr; 1697 unsigned int timeout; 1698 int e2p_cmd; 1699 1700 e2p_cmd = SMC_GET_E2P_CMD(); 1701 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) { 1702 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) { 1703 PRINTK("%s: %s timeout waiting for EEPROM to respond\n", 1704 dev->name, __FUNCTION__); 1705 return -EFAULT; 1706 } 1707 mdelay(1); 1708 e2p_cmd = SMC_GET_E2P_CMD(); 1709 } 1710 if (timeout == 0) { 1711 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n", 1712 dev->name, __FUNCTION__); 1713 return -ETIMEDOUT; 1714 } 1715 return 0; 1716} 1717 1718static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev, 1719 int cmd, int addr) 1720{ 1721 unsigned long ioaddr = dev->base_addr; 1722 int ret; 1723 1724 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1725 return ret; 1726 SMC_SET_E2P_CMD(E2P_CMD_EPC_BUSY_ | 1727 ((cmd) & (0x7<<28)) | 1728 ((addr) & 0xFF)); 1729 return 0; 1730} 1731 1732static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev, 1733 u8 *data) 1734{ 1735 unsigned long ioaddr = dev->base_addr; 1736 int ret; 1737 1738 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1739 return ret; 1740 *data = SMC_GET_E2P_DATA(); 1741 return 0; 1742} 1743 1744static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev, 1745 u8 data) 1746{ 1747 unsigned long ioaddr = dev->base_addr; 1748 int ret; 1749 1750 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) 1751 return ret; 1752 SMC_SET_E2P_DATA(data); 1753 return 0; 1754} 1755 1756static int smc911x_ethtool_geteeprom(struct net_device *dev, 1757 struct ethtool_eeprom *eeprom, u8 *data) 1758{ 1759 u8 eebuf[SMC911X_EEPROM_LEN]; 1760 int i, ret; 1761 1762 for(i=0;i<SMC911X_EEPROM_LEN;i++) { 1763 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0) 1764 return ret; 1765 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0) 1766 return ret; 1767 } 1768 memcpy(data, eebuf+eeprom->offset, eeprom->len); 1769 return 0; 1770} 1771 1772static int smc911x_ethtool_seteeprom(struct net_device *dev, 1773 struct ethtool_eeprom *eeprom, u8 *data) 1774{ 1775 int i, ret; 1776 1777 /* Enable erase */ 1778 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0) 1779 return ret; 1780 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) { 1781 /* erase byte */ 1782 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0) 1783 return ret; 1784 /* write byte */ 1785 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0) 1786 return ret; 1787 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0) 1788 return ret; 1789 } 1790 return 0; 1791} 1792 1793static int smc911x_ethtool_geteeprom_len(struct net_device *dev) 1794{ 1795 return SMC911X_EEPROM_LEN; 1796} 1797 1798static const struct ethtool_ops smc911x_ethtool_ops = { 1799 .get_settings = smc911x_ethtool_getsettings, 1800 .set_settings = smc911x_ethtool_setsettings, 1801 .get_drvinfo = smc911x_ethtool_getdrvinfo, 1802 .get_msglevel = smc911x_ethtool_getmsglevel, 1803 .set_msglevel = smc911x_ethtool_setmsglevel, 1804 .nway_reset = smc911x_ethtool_nwayreset, 1805 .get_link = ethtool_op_get_link, 1806 .get_regs_len = smc911x_ethtool_getregslen, 1807 .get_regs = smc911x_ethtool_getregs, 1808 .get_eeprom_len = smc911x_ethtool_geteeprom_len, 1809 .get_eeprom = smc911x_ethtool_geteeprom, 1810 .set_eeprom = smc911x_ethtool_seteeprom, 1811}; 1812 1813/* 1814 * smc911x_findirq 1815 * 1816 * This routine has a simple purpose -- make the SMC chip generate an 1817 * interrupt, so an auto-detect routine can detect it, and find the IRQ, 1818 */ 1819static int __init smc911x_findirq(unsigned long ioaddr) 1820{ 1821 int timeout = 20; 1822 unsigned long cookie; 1823 1824 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); 1825 1826 cookie = probe_irq_on(); 1827 1828 /* 1829 * Force a SW interrupt 1830 */ 1831 1832 SMC_SET_INT_EN(INT_EN_SW_INT_EN_); 1833 1834 /* 1835 * Wait until positive that the interrupt has been generated 1836 */ 1837 do { 1838 int int_status; 1839 udelay(10); 1840 int_status = SMC_GET_INT_EN(); 1841 if (int_status & INT_EN_SW_INT_EN_) 1842 break; /* got the interrupt */ 1843 } while (--timeout); 1844 1845 /* 1846 * there is really nothing that I can do here if timeout fails, 1847 * as autoirq_report will return a 0 anyway, which is what I 1848 * want in this case. Plus, the clean up is needed in both 1849 * cases. 1850 */ 1851 1852 /* and disable all interrupts again */ 1853 SMC_SET_INT_EN(0); 1854 1855 /* and return what I found */ 1856 return probe_irq_off(cookie); 1857} 1858 1859/* 1860 * Function: smc911x_probe(unsigned long ioaddr) 1861 * 1862 * Purpose: 1863 * Tests to see if a given ioaddr points to an SMC911x chip. 1864 * Returns a 0 on success 1865 * 1866 * Algorithm: 1867 * (1) see if the endian word is OK 1868 * (1) see if I recognize the chip ID in the appropriate register 1869 * 1870 * Here I do typical initialization tasks. 1871 * 1872 * o Initialize the structure if needed 1873 * o print out my vanity message if not done so already 1874 * o print out what type of hardware is detected 1875 * o print out the ethernet address 1876 * o find the IRQ 1877 * o set up my private data 1878 * o configure the dev structure with my subroutines 1879 * o actually GRAB the irq. 1880 * o GRAB the region 1881 */ 1882static int __init smc911x_probe(struct net_device *dev, unsigned long ioaddr) 1883{ 1884 struct smc911x_local *lp = netdev_priv(dev); 1885 int i, retval; 1886 unsigned int val, chip_id, revision; 1887 const char *version_string; 1888 1889 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __FUNCTION__); 1890 1891 /* First, see if the endian word is recognized */ 1892 val = SMC_GET_BYTE_TEST(); 1893 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val); 1894 if (val != 0x87654321) { 1895 printk(KERN_ERR "Invalid chip endian 0x08%x\n",val); 1896 retval = -ENODEV; 1897 goto err_out; 1898 } 1899 1900 /* 1901 * check if the revision register is something that I 1902 * recognize. These might need to be added to later, 1903 * as future revisions could be added. 1904 */ 1905 chip_id = SMC_GET_PN(); 1906 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id); 1907 for(i=0;chip_ids[i].id != 0; i++) { 1908 if (chip_ids[i].id == chip_id) break; 1909 } 1910 if (!chip_ids[i].id) { 1911 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id); 1912 retval = -ENODEV; 1913 goto err_out; 1914 } 1915 version_string = chip_ids[i].name; 1916 1917 revision = SMC_GET_REV(); 1918 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision); 1919 1920 /* At this point I'll assume that the chip is an SMC911x. */ 1921 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name); 1922 1923 /* Validate the TX FIFO size requested */ 1924 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) { 1925 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb); 1926 retval = -EINVAL; 1927 goto err_out; 1928 } 1929 1930 /* fill in some of the fields */ 1931 dev->base_addr = ioaddr; 1932 lp->version = chip_ids[i].id; 1933 lp->revision = revision; 1934 lp->tx_fifo_kb = tx_fifo_kb; 1935 /* Reverse calculate the RX FIFO size from the TX */ 1936 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512; 1937 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15; 1938 1939 /* Set the automatic flow control values */ 1940 switch(lp->tx_fifo_kb) { 1941 /* 1942 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64 1943 * AFC_LO is AFC_HI/2 1944 * BACK_DUR is about 5uS*(AFC_LO) rounded down 1945 */ 1946 case 2:/* 13440 Rx Data Fifo Size */ 1947 lp->afc_cfg=0x008C46AF;break; 1948 case 3:/* 12480 Rx Data Fifo Size */ 1949 lp->afc_cfg=0x0082419F;break; 1950 case 4:/* 11520 Rx Data Fifo Size */ 1951 lp->afc_cfg=0x00783C9F;break; 1952 case 5:/* 10560 Rx Data Fifo Size */ 1953 lp->afc_cfg=0x006E374F;break; 1954 case 6:/* 9600 Rx Data Fifo Size */ 1955 lp->afc_cfg=0x0064328F;break; 1956 case 7:/* 8640 Rx Data Fifo Size */ 1957 lp->afc_cfg=0x005A2D7F;break; 1958 case 8:/* 7680 Rx Data Fifo Size */ 1959 lp->afc_cfg=0x0050287F;break; 1960 case 9:/* 6720 Rx Data Fifo Size */ 1961 lp->afc_cfg=0x0046236F;break; 1962 case 10:/* 5760 Rx Data Fifo Size */ 1963 lp->afc_cfg=0x003C1E6F;break; 1964 case 11:/* 4800 Rx Data Fifo Size */ 1965 lp->afc_cfg=0x0032195F;break; 1966 /* 1967 * AFC_HI is ~1520 bytes less than RX Data Fifo Size 1968 * AFC_LO is AFC_HI/2 1969 * BACK_DUR is about 5uS*(AFC_LO) rounded down 1970 */ 1971 case 12:/* 3840 Rx Data Fifo Size */ 1972 lp->afc_cfg=0x0024124F;break; 1973 case 13:/* 2880 Rx Data Fifo Size */ 1974 lp->afc_cfg=0x0015073F;break; 1975 case 14:/* 1920 Rx Data Fifo Size */ 1976 lp->afc_cfg=0x0006032F;break; 1977 default: 1978 PRINTK("%s: ERROR -- no AFC_CFG setting found", 1979 dev->name); 1980 break; 1981 } 1982 1983 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, 1984 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME, 1985 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg); 1986 1987 spin_lock_init(&lp->lock); 1988 1989 /* Get the MAC address */ 1990 SMC_GET_MAC_ADDR(dev->dev_addr); 1991 1992 /* now, reset the chip, and put it into a known state */ 1993 smc911x_reset(dev); 1994 1995 /* 1996 * If dev->irq is 0, then the device has to be banged on to see 1997 * what the IRQ is. 1998 * 1999 * Specifying an IRQ is done with the assumption that the user knows 2000 * what (s)he is doing. No checking is done!!!! 2001 */ 2002 if (dev->irq < 1) { 2003 int trials; 2004 2005 trials = 3; 2006 while (trials--) { 2007 dev->irq = smc911x_findirq(ioaddr); 2008 if (dev->irq) 2009 break; 2010 /* kick the card and try again */ 2011 smc911x_reset(dev); 2012 } 2013 } 2014 if (dev->irq == 0) { 2015 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n", 2016 dev->name); 2017 retval = -ENODEV; 2018 goto err_out; 2019 } 2020 dev->irq = irq_canonicalize(dev->irq); 2021 2022 /* Fill in the fields of the device structure with ethernet values. */ 2023 ether_setup(dev); 2024 2025 dev->open = smc911x_open; 2026 dev->stop = smc911x_close; 2027 dev->hard_start_xmit = smc911x_hard_start_xmit; 2028 dev->tx_timeout = smc911x_timeout; 2029 dev->watchdog_timeo = msecs_to_jiffies(watchdog); 2030 dev->set_multicast_list = smc911x_set_multicast_list; 2031 dev->ethtool_ops = &smc911x_ethtool_ops; 2032#ifdef CONFIG_NET_POLL_CONTROLLER 2033 dev->poll_controller = smc911x_poll_controller; 2034#endif 2035 2036 INIT_WORK(&lp->phy_configure, smc911x_phy_configure); 2037 lp->mii.phy_id_mask = 0x1f; 2038 lp->mii.reg_num_mask = 0x1f; 2039 lp->mii.force_media = 0; 2040 lp->mii.full_duplex = 0; 2041 lp->mii.dev = dev; 2042 lp->mii.mdio_read = smc911x_phy_read; 2043 lp->mii.mdio_write = smc911x_phy_write; 2044 2045 /* 2046 * Locate the phy, if any. 2047 */ 2048 smc911x_phy_detect(dev); 2049 2050 /* Set default parameters */ 2051 lp->msg_enable = NETIF_MSG_LINK; 2052 lp->ctl_rfduplx = 1; 2053 lp->ctl_rspeed = 100; 2054 2055 /* Grab the IRQ */ 2056 retval = request_irq(dev->irq, &smc911x_interrupt, 2057 IRQF_SHARED | SMC_IRQ_SENSE, dev->name, dev); 2058 if (retval) 2059 goto err_out; 2060 2061#ifdef SMC_USE_DMA 2062 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq); 2063 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq); 2064 lp->rxdma_active = 0; 2065 lp->txdma_active = 0; 2066 dev->dma = lp->rxdma; 2067#endif 2068 2069 retval = register_netdev(dev); 2070 if (retval == 0) { 2071 /* now, print out the card info, in a short format.. */ 2072 printk("%s: %s (rev %d) at %#lx IRQ %d", 2073 dev->name, version_string, lp->revision, 2074 dev->base_addr, dev->irq); 2075 2076#ifdef SMC_USE_DMA 2077 if (lp->rxdma != -1) 2078 printk(" RXDMA %d ", lp->rxdma); 2079 2080 if (lp->txdma != -1) 2081 printk("TXDMA %d", lp->txdma); 2082#endif 2083 printk("\n"); 2084 if (!is_valid_ether_addr(dev->dev_addr)) { 2085 printk("%s: Invalid ethernet MAC address. Please " 2086 "set using ifconfig\n", dev->name); 2087 } else { 2088 /* Print the Ethernet address */ 2089 printk("%s: Ethernet addr: ", dev->name); 2090 for (i = 0; i < 5; i++) 2091 printk("%2.2x:", dev->dev_addr[i]); 2092 printk("%2.2x\n", dev->dev_addr[5]); 2093 } 2094 2095 if (lp->phy_type == 0) { 2096 PRINTK("%s: No PHY found\n", dev->name); 2097 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) { 2098 PRINTK("%s: LAN911x Internal PHY\n", dev->name); 2099 } else { 2100 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type); 2101 } 2102 } 2103 2104err_out: 2105#ifdef SMC_USE_DMA 2106 if (retval) { 2107 if (lp->rxdma != -1) { 2108 SMC_DMA_FREE(dev, lp->rxdma); 2109 } 2110 if (lp->txdma != -1) { 2111 SMC_DMA_FREE(dev, lp->txdma); 2112 } 2113 } 2114#endif 2115 return retval; 2116} 2117 2118/* 2119 * smc911x_init(void) 2120 * 2121 * Output: 2122 * 0 --> there is a device 2123 * anything else, error 2124 */ 2125static int smc911x_drv_probe(struct platform_device *pdev) 2126{ 2127 struct net_device *ndev; 2128 struct resource *res; 2129 struct smc911x_local *lp; 2130 unsigned int *addr; 2131 int ret; 2132 2133 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); 2134 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2135 if (!res) { 2136 ret = -ENODEV; 2137 goto out; 2138 } 2139 2140 /* 2141 * Request the regions. 2142 */ 2143 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) { 2144 ret = -EBUSY; 2145 goto out; 2146 } 2147 2148 ndev = alloc_etherdev(sizeof(struct smc911x_local)); 2149 if (!ndev) { 2150 printk("%s: could not allocate device.\n", CARDNAME); 2151 ret = -ENOMEM; 2152 goto release_1; 2153 } 2154 SET_NETDEV_DEV(ndev, &pdev->dev); 2155 2156 ndev->dma = (unsigned char)-1; 2157 ndev->irq = platform_get_irq(pdev, 0); 2158 lp = netdev_priv(ndev); 2159 lp->netdev = ndev; 2160 2161 addr = ioremap(res->start, SMC911X_IO_EXTENT); 2162 if (!addr) { 2163 ret = -ENOMEM; 2164 goto release_both; 2165 } 2166 2167 platform_set_drvdata(pdev, ndev); 2168 ret = smc911x_probe(ndev, (unsigned long)addr); 2169 if (ret != 0) { 2170 platform_set_drvdata(pdev, NULL); 2171 iounmap(addr); 2172release_both: 2173 free_netdev(ndev); 2174release_1: 2175 release_mem_region(res->start, SMC911X_IO_EXTENT); 2176out: 2177 printk("%s: not found (%d).\n", CARDNAME, ret); 2178 } 2179#ifdef SMC_USE_DMA 2180 else { 2181 lp->physaddr = res->start; 2182 lp->dev = &pdev->dev; 2183 } 2184#endif 2185 2186 return ret; 2187} 2188 2189static int smc911x_drv_remove(struct platform_device *pdev) 2190{ 2191 struct net_device *ndev = platform_get_drvdata(pdev); 2192 struct resource *res; 2193 2194 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); 2195 platform_set_drvdata(pdev, NULL); 2196 2197 unregister_netdev(ndev); 2198 2199 free_irq(ndev->irq, ndev); 2200 2201#ifdef SMC_USE_DMA 2202 { 2203 struct smc911x_local *lp = netdev_priv(ndev); 2204 if (lp->rxdma != -1) { 2205 SMC_DMA_FREE(dev, lp->rxdma); 2206 } 2207 if (lp->txdma != -1) { 2208 SMC_DMA_FREE(dev, lp->txdma); 2209 } 2210 } 2211#endif 2212 iounmap((void *)ndev->base_addr); 2213 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2214 release_mem_region(res->start, SMC911X_IO_EXTENT); 2215 2216 free_netdev(ndev); 2217 return 0; 2218} 2219 2220static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state) 2221{ 2222 struct net_device *ndev = platform_get_drvdata(dev); 2223 unsigned long ioaddr = ndev->base_addr; 2224 2225 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); 2226 if (ndev) { 2227 if (netif_running(ndev)) { 2228 netif_device_detach(ndev); 2229 smc911x_shutdown(ndev); 2230#if POWER_DOWN 2231 /* Set D2 - Energy detect only setting */ 2232 SMC_SET_PMT_CTRL(2<<12); 2233#endif 2234 } 2235 } 2236 return 0; 2237} 2238 2239static int smc911x_drv_resume(struct platform_device *dev) 2240{ 2241 struct net_device *ndev = platform_get_drvdata(dev); 2242 2243 DBG(SMC_DEBUG_FUNC, "--> %s\n", __FUNCTION__); 2244 if (ndev) { 2245 struct smc911x_local *lp = netdev_priv(ndev); 2246 2247 if (netif_running(ndev)) { 2248 smc911x_reset(ndev); 2249 smc911x_enable(ndev); 2250 if (lp->phy_type != 0) 2251 smc911x_phy_configure(&lp->phy_configure); 2252 netif_device_attach(ndev); 2253 } 2254 } 2255 return 0; 2256} 2257 2258static struct platform_driver smc911x_driver = { 2259 .probe = smc911x_drv_probe, 2260 .remove = smc911x_drv_remove, 2261 .suspend = smc911x_drv_suspend, 2262 .resume = smc911x_drv_resume, 2263 .driver = { 2264 .name = CARDNAME, 2265 }, 2266}; 2267 2268static int __init smc911x_init(void) 2269{ 2270 return platform_driver_register(&smc911x_driver); 2271} 2272 2273static void __exit smc911x_cleanup(void) 2274{ 2275 platform_driver_unregister(&smc911x_driver); 2276} 2277 2278module_init(smc911x_init); 2279module_exit(smc911x_cleanup);