tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/*
2 * linux/drivers/net/ehea/ehea.h
3 *
4 * eHEA ethernet device driver for IBM eServer System p
5 *
6 * (C) Copyright IBM Corp. 2006
7 *
8 * Authors:
9 * Christoph Raisch <raisch@de.ibm.com>
10 * Jan-Bernd Themann <themann@de.ibm.com>
11 * Thomas Klein <tklein@de.ibm.com>
12 *
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2, or (at your option)
17 * any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __EHEA_H__
30#define __EHEA_H__
31
32#include <linux/module.h>
33#include <linux/ethtool.h>
34#include <linux/vmalloc.h>
35#include <linux/if_vlan.h>
36#include <linux/inet_lro.h>
37
38#include <asm/ibmebus.h>
39#include <asm/abs_addr.h>
40#include <asm/io.h>
41
42#define DRV_NAME "ehea"
43#define DRV_VERSION "EHEA_0087"
44
45/* eHEA capability flags */
46#define DLPAR_PORT_ADD_REM 1
47#define DLPAR_MEM_ADD 2
48#define DLPAR_MEM_REM 4
49#define EHEA_CAPABILITIES (DLPAR_PORT_ADD_REM | DLPAR_MEM_ADD)
50
51#define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
52 | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
53
54#define EHEA_MAX_ENTRIES_RQ1 32767
55#define EHEA_MAX_ENTRIES_RQ2 16383
56#define EHEA_MAX_ENTRIES_RQ3 16383
57#define EHEA_MAX_ENTRIES_SQ 32767
58#define EHEA_MIN_ENTRIES_QP 127
59
60#define EHEA_SMALL_QUEUES
61#define EHEA_NUM_TX_QP 1
62#define EHEA_LRO_MAX_AGGR 64
63
64#ifdef EHEA_SMALL_QUEUES
65#define EHEA_MAX_CQE_COUNT 1023
66#define EHEA_DEF_ENTRIES_SQ 1023
67#define EHEA_DEF_ENTRIES_RQ1 4095
68#define EHEA_DEF_ENTRIES_RQ2 1023
69#define EHEA_DEF_ENTRIES_RQ3 1023
70#else
71#define EHEA_MAX_CQE_COUNT 4080
72#define EHEA_DEF_ENTRIES_SQ 4080
73#define EHEA_DEF_ENTRIES_RQ1 8160
74#define EHEA_DEF_ENTRIES_RQ2 2040
75#define EHEA_DEF_ENTRIES_RQ3 2040
76#endif
77
78#define EHEA_MAX_ENTRIES_EQ 20
79
80#define EHEA_SG_SQ 2
81#define EHEA_SG_RQ1 1
82#define EHEA_SG_RQ2 0
83#define EHEA_SG_RQ3 0
84
85#define EHEA_MAX_PACKET_SIZE 9022 /* for jumbo frames */
86#define EHEA_RQ2_PKT_SIZE 1522
87#define EHEA_L_PKT_SIZE 256 /* low latency */
88
89#define MAX_LRO_DESCRIPTORS 8
90
91/* Send completion signaling */
92
93/* Protection Domain Identifier */
94#define EHEA_PD_ID 0xaabcdeff
95
96#define EHEA_RQ2_THRESHOLD 1
97#define EHEA_RQ3_THRESHOLD 9 /* use RQ3 threshold of 1522 bytes */
98
99#define EHEA_SPEED_10G 10000
100#define EHEA_SPEED_1G 1000
101#define EHEA_SPEED_100M 100
102#define EHEA_SPEED_10M 10
103#define EHEA_SPEED_AUTONEG 0
104
105/* Broadcast/Multicast registration types */
106#define EHEA_BCMC_SCOPE_ALL 0x08
107#define EHEA_BCMC_SCOPE_SINGLE 0x00
108#define EHEA_BCMC_MULTICAST 0x04
109#define EHEA_BCMC_BROADCAST 0x00
110#define EHEA_BCMC_UNTAGGED 0x02
111#define EHEA_BCMC_TAGGED 0x00
112#define EHEA_BCMC_VLANID_ALL 0x01
113#define EHEA_BCMC_VLANID_SINGLE 0x00
114
115#define EHEA_CACHE_LINE 128
116
117/* Memory Regions */
118#define EHEA_MR_ACC_CTRL 0x00800000
119
120#define EHEA_BUSMAP_START 0x8000000000000000ULL
121
122#define EHEA_WATCH_DOG_TIMEOUT 10*HZ
123
124/* utility functions */
125
126#define ehea_info(fmt, args...) \
127 printk(KERN_INFO DRV_NAME ": " fmt "\n", ## args)
128
129#define ehea_error(fmt, args...) \
130 printk(KERN_ERR DRV_NAME ": Error in %s: " fmt "\n", __func__, ## args)
131
132#ifdef DEBUG
133#define ehea_debug(fmt, args...) \
134 printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
135#else
136#define ehea_debug(fmt, args...) do {} while (0)
137#endif
138
139void ehea_dump(void *adr, int len, char *msg);
140
141#define EHEA_BMASK(pos, length) (((pos) << 16) + (length))
142
143#define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
144
145#define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
146
147#define EHEA_BMASK_MASK(mask) \
148 (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff))
149
150#define EHEA_BMASK_SET(mask, value) \
151 ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask))
152
153#define EHEA_BMASK_GET(mask, value) \
154 (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask)))
155
156/*
157 * Generic ehea page
158 */
159struct ehea_page {
160 u8 entries[PAGE_SIZE];
161};
162
163/*
164 * Generic queue in linux kernel virtual memory
165 */
166struct hw_queue {
167 u64 current_q_offset; /* current queue entry */
168 struct ehea_page **queue_pages; /* array of pages belonging to queue */
169 u32 qe_size; /* queue entry size */
170 u32 queue_length; /* queue length allocated in bytes */
171 u32 pagesize;
172 u32 toggle_state; /* toggle flag - per page */
173 u32 reserved; /* 64 bit alignment */
174};
175
176/*
177 * For pSeries this is a 64bit memory address where
178 * I/O memory is mapped into CPU address space
179 */
180struct h_epa {
181 void __iomem *addr;
182};
183
184struct h_epa_user {
185 u64 addr;
186};
187
188struct h_epas {
189 struct h_epa kernel; /* kernel space accessible resource,
190 set to 0 if unused */
191 struct h_epa_user user; /* user space accessible resource
192 set to 0 if unused */
193};
194
195struct ehea_busmap {
196 unsigned int entries; /* total number of entries */
197 unsigned int valid_sections; /* number of valid sections */
198 u64 *vaddr;
199};
200
201struct ehea_qp;
202struct ehea_cq;
203struct ehea_eq;
204struct ehea_port;
205struct ehea_av;
206
207/*
208 * Queue attributes passed to ehea_create_qp()
209 */
210struct ehea_qp_init_attr {
211 /* input parameter */
212 u32 qp_token; /* queue token */
213 u8 low_lat_rq1;
214 u8 signalingtype; /* cqe generation flag */
215 u8 rq_count; /* num of receive queues */
216 u8 eqe_gen; /* eqe generation flag */
217 u16 max_nr_send_wqes; /* max number of send wqes */
218 u16 max_nr_rwqes_rq1; /* max number of receive wqes */
219 u16 max_nr_rwqes_rq2;
220 u16 max_nr_rwqes_rq3;
221 u8 wqe_size_enc_sq;
222 u8 wqe_size_enc_rq1;
223 u8 wqe_size_enc_rq2;
224 u8 wqe_size_enc_rq3;
225 u8 swqe_imm_data_len; /* immediate data length for swqes */
226 u16 port_nr;
227 u16 rq2_threshold;
228 u16 rq3_threshold;
229 u64 send_cq_handle;
230 u64 recv_cq_handle;
231 u64 aff_eq_handle;
232
233 /* output parameter */
234 u32 qp_nr;
235 u16 act_nr_send_wqes;
236 u16 act_nr_rwqes_rq1;
237 u16 act_nr_rwqes_rq2;
238 u16 act_nr_rwqes_rq3;
239 u8 act_wqe_size_enc_sq;
240 u8 act_wqe_size_enc_rq1;
241 u8 act_wqe_size_enc_rq2;
242 u8 act_wqe_size_enc_rq3;
243 u32 nr_sq_pages;
244 u32 nr_rq1_pages;
245 u32 nr_rq2_pages;
246 u32 nr_rq3_pages;
247 u32 liobn_sq;
248 u32 liobn_rq1;
249 u32 liobn_rq2;
250 u32 liobn_rq3;
251};
252
253/*
254 * Event Queue attributes, passed as paramter
255 */
256struct ehea_eq_attr {
257 u32 type;
258 u32 max_nr_of_eqes;
259 u8 eqe_gen; /* generate eqe flag */
260 u64 eq_handle;
261 u32 act_nr_of_eqes;
262 u32 nr_pages;
263 u32 ist1; /* Interrupt service token */
264 u32 ist2;
265 u32 ist3;
266 u32 ist4;
267};
268
269
270/*
271 * Event Queue
272 */
273struct ehea_eq {
274 struct ehea_adapter *adapter;
275 struct hw_queue hw_queue;
276 u64 fw_handle;
277 struct h_epas epas;
278 spinlock_t spinlock;
279 struct ehea_eq_attr attr;
280};
281
282/*
283 * HEA Queues
284 */
285struct ehea_qp {
286 struct ehea_adapter *adapter;
287 u64 fw_handle; /* QP handle for firmware calls */
288 struct hw_queue hw_squeue;
289 struct hw_queue hw_rqueue1;
290 struct hw_queue hw_rqueue2;
291 struct hw_queue hw_rqueue3;
292 struct h_epas epas;
293 struct ehea_qp_init_attr init_attr;
294};
295
296/*
297 * Completion Queue attributes
298 */
299struct ehea_cq_attr {
300 /* input parameter */
301 u32 max_nr_of_cqes;
302 u32 cq_token;
303 u64 eq_handle;
304
305 /* output parameter */
306 u32 act_nr_of_cqes;
307 u32 nr_pages;
308};
309
310/*
311 * Completion Queue
312 */
313struct ehea_cq {
314 struct ehea_adapter *adapter;
315 u64 fw_handle;
316 struct hw_queue hw_queue;
317 struct h_epas epas;
318 struct ehea_cq_attr attr;
319};
320
321/*
322 * Memory Region
323 */
324struct ehea_mr {
325 struct ehea_adapter *adapter;
326 u64 handle;
327 u64 vaddr;
328 u32 lkey;
329};
330
331/*
332 * Port state information
333 */
334struct port_stats {
335 int poll_receive_errors;
336 int queue_stopped;
337 int err_tcp_cksum;
338 int err_ip_cksum;
339 int err_frame_crc;
340};
341
342#define EHEA_IRQ_NAME_SIZE 20
343
344/*
345 * Queue SKB Array
346 */
347struct ehea_q_skb_arr {
348 struct sk_buff **arr; /* skb array for queue */
349 int len; /* array length */
350 int index; /* array index */
351 int os_skbs; /* rq2/rq3 only: outstanding skbs */
352};
353
354/*
355 * Port resources
356 */
357struct ehea_port_res {
358 struct napi_struct napi;
359 struct port_stats p_stats;
360 struct ehea_mr send_mr; /* send memory region */
361 struct ehea_mr recv_mr; /* receive memory region */
362 spinlock_t xmit_lock;
363 struct ehea_port *port;
364 char int_recv_name[EHEA_IRQ_NAME_SIZE];
365 char int_send_name[EHEA_IRQ_NAME_SIZE];
366 struct ehea_qp *qp;
367 struct ehea_cq *send_cq;
368 struct ehea_cq *recv_cq;
369 struct ehea_eq *eq;
370 struct ehea_q_skb_arr rq1_skba;
371 struct ehea_q_skb_arr rq2_skba;
372 struct ehea_q_skb_arr rq3_skba;
373 struct ehea_q_skb_arr sq_skba;
374 spinlock_t netif_queue;
375 int queue_stopped;
376 int swqe_refill_th;
377 atomic_t swqe_avail;
378 int swqe_ll_count;
379 u32 swqe_id_counter;
380 u64 tx_packets;
381 u64 rx_packets;
382 u32 poll_counter;
383 struct net_lro_mgr lro_mgr;
384 struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS];
385};
386
387
388#define EHEA_MAX_PORTS 16
389
390#define EHEA_NUM_PORTRES_FW_HANDLES 6 /* QP handle, SendCQ handle,
391 RecvCQ handle, EQ handle,
392 SendMR handle, RecvMR handle */
393#define EHEA_NUM_PORT_FW_HANDLES 1 /* EQ handle */
394#define EHEA_NUM_ADAPTER_FW_HANDLES 2 /* MR handle, NEQ handle */
395
396struct ehea_adapter {
397 u64 handle;
398 struct of_device *ofdev;
399 struct ehea_port *port[EHEA_MAX_PORTS];
400 struct ehea_eq *neq; /* notification event queue */
401 struct tasklet_struct neq_tasklet;
402 struct ehea_mr mr;
403 u32 pd; /* protection domain */
404 u64 max_mc_mac; /* max number of multicast mac addresses */
405 int active_ports;
406 struct list_head list;
407};
408
409
410struct ehea_mc_list {
411 struct list_head list;
412 u64 macaddr;
413};
414
415/* kdump support */
416struct ehea_fw_handle_entry {
417 u64 adh; /* Adapter Handle */
418 u64 fwh; /* Firmware Handle */
419};
420
421struct ehea_fw_handle_array {
422 struct ehea_fw_handle_entry *arr;
423 int num_entries;
424 struct semaphore lock;
425};
426
427struct ehea_bcmc_reg_entry {
428 u64 adh; /* Adapter Handle */
429 u32 port_id; /* Logical Port Id */
430 u8 reg_type; /* Registration Type */
431 u64 macaddr;
432};
433
434struct ehea_bcmc_reg_array {
435 struct ehea_bcmc_reg_entry *arr;
436 int num_entries;
437 struct semaphore lock;
438};
439
440#define EHEA_PORT_UP 1
441#define EHEA_PORT_DOWN 0
442#define EHEA_PHY_LINK_UP 1
443#define EHEA_PHY_LINK_DOWN 0
444#define EHEA_MAX_PORT_RES 16
445struct ehea_port {
446 struct ehea_adapter *adapter; /* adapter that owns this port */
447 struct net_device *netdev;
448 struct net_device_stats stats;
449 struct ehea_port_res port_res[EHEA_MAX_PORT_RES];
450 struct of_device ofdev; /* Open Firmware Device */
451 struct ehea_mc_list *mc_list; /* Multicast MAC addresses */
452 struct vlan_group *vgrp;
453 struct ehea_eq *qp_eq;
454 struct work_struct reset_task;
455 struct semaphore port_lock;
456 char int_aff_name[EHEA_IRQ_NAME_SIZE];
457 int allmulti; /* Indicates IFF_ALLMULTI state */
458 int promisc; /* Indicates IFF_PROMISC state */
459 int num_tx_qps;
460 int num_add_tx_qps;
461 int num_mcs;
462 int resets;
463 u64 mac_addr;
464 u32 logical_port_id;
465 u32 port_speed;
466 u32 msg_enable;
467 u32 sig_comp_iv;
468 u32 state;
469 u32 lro_max_aggr;
470 u8 phy_link;
471 u8 full_duplex;
472 u8 autoneg;
473 u8 num_def_qps;
474};
475
476struct port_res_cfg {
477 int max_entries_rcq;
478 int max_entries_scq;
479 int max_entries_sq;
480 int max_entries_rq1;
481 int max_entries_rq2;
482 int max_entries_rq3;
483};
484
485enum ehea_flag_bits {
486 __EHEA_STOP_XFER
487};
488
489void ehea_set_ethtool_ops(struct net_device *netdev);
490int ehea_sense_port_attr(struct ehea_port *port);
491int ehea_set_portspeed(struct ehea_port *port, u32 port_speed);
492
493extern u64 ehea_driver_flags;
494extern struct work_struct ehea_rereg_mr_task;
495
496#endif /* __EHEA_H__ */