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1/******************************************************************************* 2 3 Intel PRO/1000 Linux driver 4 Copyright(c) 1999 - 2006 Intel Corporation. 5 6 This program is free software; you can redistribute it and/or modify it 7 under the terms and conditions of the GNU General Public License, 8 version 2, as published by the Free Software Foundation. 9 10 This program is distributed in the hope it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 18 19 The full GNU General Public License is included in this distribution in 20 the file called "COPYING". 21 22 Contact Information: 23 Linux NICS <linux.nics@intel.com> 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 27*******************************************************************************/ 28 29#include "e1000.h" 30#include <net/ip6_checksum.h> 31 32char e1000_driver_name[] = "e1000"; 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; 34#ifndef CONFIG_E1000_NAPI 35#define DRIVERNAPI 36#else 37#define DRIVERNAPI "-NAPI" 38#endif 39#define DRV_VERSION "7.3.20-k2"DRIVERNAPI 40const char e1000_driver_version[] = DRV_VERSION; 41static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; 42 43/* e1000_pci_tbl - PCI Device ID Table 44 * 45 * Last entry must be all 0s 46 * 47 * Macro expands to... 48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)} 49 */ 50#ifdef CONFIG_E1000E_ENABLED 51 #define PCIE(x) 52#else 53 #define PCIE(x) x, 54#endif 55 56static struct pci_device_id e1000_pci_tbl[] = { 57 INTEL_E1000_ETHERNET_DEVICE(0x1000), 58 INTEL_E1000_ETHERNET_DEVICE(0x1001), 59 INTEL_E1000_ETHERNET_DEVICE(0x1004), 60 INTEL_E1000_ETHERNET_DEVICE(0x1008), 61 INTEL_E1000_ETHERNET_DEVICE(0x1009), 62 INTEL_E1000_ETHERNET_DEVICE(0x100C), 63 INTEL_E1000_ETHERNET_DEVICE(0x100D), 64 INTEL_E1000_ETHERNET_DEVICE(0x100E), 65 INTEL_E1000_ETHERNET_DEVICE(0x100F), 66 INTEL_E1000_ETHERNET_DEVICE(0x1010), 67 INTEL_E1000_ETHERNET_DEVICE(0x1011), 68 INTEL_E1000_ETHERNET_DEVICE(0x1012), 69 INTEL_E1000_ETHERNET_DEVICE(0x1013), 70 INTEL_E1000_ETHERNET_DEVICE(0x1014), 71 INTEL_E1000_ETHERNET_DEVICE(0x1015), 72 INTEL_E1000_ETHERNET_DEVICE(0x1016), 73 INTEL_E1000_ETHERNET_DEVICE(0x1017), 74 INTEL_E1000_ETHERNET_DEVICE(0x1018), 75 INTEL_E1000_ETHERNET_DEVICE(0x1019), 76 INTEL_E1000_ETHERNET_DEVICE(0x101A), 77 INTEL_E1000_ETHERNET_DEVICE(0x101D), 78 INTEL_E1000_ETHERNET_DEVICE(0x101E), 79 INTEL_E1000_ETHERNET_DEVICE(0x1026), 80 INTEL_E1000_ETHERNET_DEVICE(0x1027), 81 INTEL_E1000_ETHERNET_DEVICE(0x1028), 82PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1049)) 83PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104A)) 84PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104B)) 85PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104C)) 86PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104D)) 87PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105E)) 88PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105F)) 89PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060)) 90 INTEL_E1000_ETHERNET_DEVICE(0x1075), 91 INTEL_E1000_ETHERNET_DEVICE(0x1076), 92 INTEL_E1000_ETHERNET_DEVICE(0x1077), 93 INTEL_E1000_ETHERNET_DEVICE(0x1078), 94 INTEL_E1000_ETHERNET_DEVICE(0x1079), 95 INTEL_E1000_ETHERNET_DEVICE(0x107A), 96 INTEL_E1000_ETHERNET_DEVICE(0x107B), 97 INTEL_E1000_ETHERNET_DEVICE(0x107C), 98PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107D)) 99PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107E)) 100PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107F)) 101 INTEL_E1000_ETHERNET_DEVICE(0x108A), 102PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108B)) 103PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108C)) 104PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1096)) 105PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1098)) 106 INTEL_E1000_ETHERNET_DEVICE(0x1099), 107PCIE( INTEL_E1000_ETHERNET_DEVICE(0x109A)) 108PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A4)) 109PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A5)) 110 INTEL_E1000_ETHERNET_DEVICE(0x10B5), 111PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10B9)) 112PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BA)) 113PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BB)) 114PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BC)) 115PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C4)) 116PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C5)) 117PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D5)) 118PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D9)) 119PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10DA)) 120 /* required last entry */ 121 {0,} 122}; 123 124MODULE_DEVICE_TABLE(pci, e1000_pci_tbl); 125 126int e1000_up(struct e1000_adapter *adapter); 127void e1000_down(struct e1000_adapter *adapter); 128void e1000_reinit_locked(struct e1000_adapter *adapter); 129void e1000_reset(struct e1000_adapter *adapter); 130int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx); 131int e1000_setup_all_tx_resources(struct e1000_adapter *adapter); 132int e1000_setup_all_rx_resources(struct e1000_adapter *adapter); 133void e1000_free_all_tx_resources(struct e1000_adapter *adapter); 134void e1000_free_all_rx_resources(struct e1000_adapter *adapter); 135static int e1000_setup_tx_resources(struct e1000_adapter *adapter, 136 struct e1000_tx_ring *txdr); 137static int e1000_setup_rx_resources(struct e1000_adapter *adapter, 138 struct e1000_rx_ring *rxdr); 139static void e1000_free_tx_resources(struct e1000_adapter *adapter, 140 struct e1000_tx_ring *tx_ring); 141static void e1000_free_rx_resources(struct e1000_adapter *adapter, 142 struct e1000_rx_ring *rx_ring); 143void e1000_update_stats(struct e1000_adapter *adapter); 144 145static int e1000_init_module(void); 146static void e1000_exit_module(void); 147static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent); 148static void __devexit e1000_remove(struct pci_dev *pdev); 149static int e1000_alloc_queues(struct e1000_adapter *adapter); 150static int e1000_sw_init(struct e1000_adapter *adapter); 151static int e1000_open(struct net_device *netdev); 152static int e1000_close(struct net_device *netdev); 153static void e1000_configure_tx(struct e1000_adapter *adapter); 154static void e1000_configure_rx(struct e1000_adapter *adapter); 155static void e1000_setup_rctl(struct e1000_adapter *adapter); 156static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter); 157static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter); 158static void e1000_clean_tx_ring(struct e1000_adapter *adapter, 159 struct e1000_tx_ring *tx_ring); 160static void e1000_clean_rx_ring(struct e1000_adapter *adapter, 161 struct e1000_rx_ring *rx_ring); 162static void e1000_set_rx_mode(struct net_device *netdev); 163static void e1000_update_phy_info(unsigned long data); 164static void e1000_watchdog(unsigned long data); 165static void e1000_82547_tx_fifo_stall(unsigned long data); 166static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev); 167static struct net_device_stats * e1000_get_stats(struct net_device *netdev); 168static int e1000_change_mtu(struct net_device *netdev, int new_mtu); 169static int e1000_set_mac(struct net_device *netdev, void *p); 170static irqreturn_t e1000_intr(int irq, void *data); 171static irqreturn_t e1000_intr_msi(int irq, void *data); 172static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, 173 struct e1000_tx_ring *tx_ring); 174#ifdef CONFIG_E1000_NAPI 175static int e1000_clean(struct napi_struct *napi, int budget); 176static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, 177 struct e1000_rx_ring *rx_ring, 178 int *work_done, int work_to_do); 179static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 180 struct e1000_rx_ring *rx_ring, 181 int *work_done, int work_to_do); 182#else 183static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, 184 struct e1000_rx_ring *rx_ring); 185static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 186 struct e1000_rx_ring *rx_ring); 187#endif 188static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 189 struct e1000_rx_ring *rx_ring, 190 int cleaned_count); 191static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 192 struct e1000_rx_ring *rx_ring, 193 int cleaned_count); 194static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); 195static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, 196 int cmd); 197static void e1000_enter_82542_rst(struct e1000_adapter *adapter); 198static void e1000_leave_82542_rst(struct e1000_adapter *adapter); 199static void e1000_tx_timeout(struct net_device *dev); 200static void e1000_reset_task(struct work_struct *work); 201static void e1000_smartspeed(struct e1000_adapter *adapter); 202static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter, 203 struct sk_buff *skb); 204 205static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp); 206static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid); 207static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); 208static void e1000_restore_vlan(struct e1000_adapter *adapter); 209 210static int e1000_suspend(struct pci_dev *pdev, pm_message_t state); 211#ifdef CONFIG_PM 212static int e1000_resume(struct pci_dev *pdev); 213#endif 214static void e1000_shutdown(struct pci_dev *pdev); 215 216#ifdef CONFIG_NET_POLL_CONTROLLER 217/* for netdump / net console */ 218static void e1000_netpoll (struct net_device *netdev); 219#endif 220 221#define COPYBREAK_DEFAULT 256 222static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT; 223module_param(copybreak, uint, 0644); 224MODULE_PARM_DESC(copybreak, 225 "Maximum size of packet that is copied to a new buffer on receive"); 226 227static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, 228 pci_channel_state_t state); 229static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev); 230static void e1000_io_resume(struct pci_dev *pdev); 231 232static struct pci_error_handlers e1000_err_handler = { 233 .error_detected = e1000_io_error_detected, 234 .slot_reset = e1000_io_slot_reset, 235 .resume = e1000_io_resume, 236}; 237 238static struct pci_driver e1000_driver = { 239 .name = e1000_driver_name, 240 .id_table = e1000_pci_tbl, 241 .probe = e1000_probe, 242 .remove = __devexit_p(e1000_remove), 243#ifdef CONFIG_PM 244 /* Power Managment Hooks */ 245 .suspend = e1000_suspend, 246 .resume = e1000_resume, 247#endif 248 .shutdown = e1000_shutdown, 249 .err_handler = &e1000_err_handler 250}; 251 252MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); 253MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver"); 254MODULE_LICENSE("GPL"); 255MODULE_VERSION(DRV_VERSION); 256 257static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE; 258module_param(debug, int, 0); 259MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); 260 261/** 262 * e1000_init_module - Driver Registration Routine 263 * 264 * e1000_init_module is the first routine called when the driver is 265 * loaded. All it does is register with the PCI subsystem. 266 **/ 267 268static int __init 269e1000_init_module(void) 270{ 271 int ret; 272 printk(KERN_INFO "%s - version %s\n", 273 e1000_driver_string, e1000_driver_version); 274 275 printk(KERN_INFO "%s\n", e1000_copyright); 276 277 ret = pci_register_driver(&e1000_driver); 278 if (copybreak != COPYBREAK_DEFAULT) { 279 if (copybreak == 0) 280 printk(KERN_INFO "e1000: copybreak disabled\n"); 281 else 282 printk(KERN_INFO "e1000: copybreak enabled for " 283 "packets <= %u bytes\n", copybreak); 284 } 285 return ret; 286} 287 288module_init(e1000_init_module); 289 290/** 291 * e1000_exit_module - Driver Exit Cleanup Routine 292 * 293 * e1000_exit_module is called just before the driver is removed 294 * from memory. 295 **/ 296 297static void __exit 298e1000_exit_module(void) 299{ 300 pci_unregister_driver(&e1000_driver); 301} 302 303module_exit(e1000_exit_module); 304 305static int e1000_request_irq(struct e1000_adapter *adapter) 306{ 307 struct net_device *netdev = adapter->netdev; 308 irq_handler_t handler = e1000_intr; 309 int irq_flags = IRQF_SHARED; 310 int err; 311 312 if (adapter->hw.mac_type >= e1000_82571) { 313 adapter->have_msi = !pci_enable_msi(adapter->pdev); 314 if (adapter->have_msi) { 315 handler = e1000_intr_msi; 316 irq_flags = 0; 317 } 318 } 319 320 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name, 321 netdev); 322 if (err) { 323 if (adapter->have_msi) 324 pci_disable_msi(adapter->pdev); 325 DPRINTK(PROBE, ERR, 326 "Unable to allocate interrupt Error: %d\n", err); 327 } 328 329 return err; 330} 331 332static void e1000_free_irq(struct e1000_adapter *adapter) 333{ 334 struct net_device *netdev = adapter->netdev; 335 336 free_irq(adapter->pdev->irq, netdev); 337 338 if (adapter->have_msi) 339 pci_disable_msi(adapter->pdev); 340} 341 342/** 343 * e1000_irq_disable - Mask off interrupt generation on the NIC 344 * @adapter: board private structure 345 **/ 346 347static void 348e1000_irq_disable(struct e1000_adapter *adapter) 349{ 350 atomic_inc(&adapter->irq_sem); 351 E1000_WRITE_REG(&adapter->hw, IMC, ~0); 352 E1000_WRITE_FLUSH(&adapter->hw); 353 synchronize_irq(adapter->pdev->irq); 354} 355 356/** 357 * e1000_irq_enable - Enable default interrupt generation settings 358 * @adapter: board private structure 359 **/ 360 361static void 362e1000_irq_enable(struct e1000_adapter *adapter) 363{ 364 if (likely(atomic_dec_and_test(&adapter->irq_sem))) { 365 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK); 366 E1000_WRITE_FLUSH(&adapter->hw); 367 } 368} 369 370static void 371e1000_update_mng_vlan(struct e1000_adapter *adapter) 372{ 373 struct net_device *netdev = adapter->netdev; 374 uint16_t vid = adapter->hw.mng_cookie.vlan_id; 375 uint16_t old_vid = adapter->mng_vlan_id; 376 if (adapter->vlgrp) { 377 if (!vlan_group_get_device(adapter->vlgrp, vid)) { 378 if (adapter->hw.mng_cookie.status & 379 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) { 380 e1000_vlan_rx_add_vid(netdev, vid); 381 adapter->mng_vlan_id = vid; 382 } else 383 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 384 385 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) && 386 (vid != old_vid) && 387 !vlan_group_get_device(adapter->vlgrp, old_vid)) 388 e1000_vlan_rx_kill_vid(netdev, old_vid); 389 } else 390 adapter->mng_vlan_id = vid; 391 } 392} 393 394/** 395 * e1000_release_hw_control - release control of the h/w to f/w 396 * @adapter: address of board private structure 397 * 398 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit. 399 * For ASF and Pass Through versions of f/w this means that the 400 * driver is no longer loaded. For AMT version (only with 82573) i 401 * of the f/w this means that the network i/f is closed. 402 * 403 **/ 404 405static void 406e1000_release_hw_control(struct e1000_adapter *adapter) 407{ 408 uint32_t ctrl_ext; 409 uint32_t swsm; 410 411 /* Let firmware taken over control of h/w */ 412 switch (adapter->hw.mac_type) { 413 case e1000_82573: 414 swsm = E1000_READ_REG(&adapter->hw, SWSM); 415 E1000_WRITE_REG(&adapter->hw, SWSM, 416 swsm & ~E1000_SWSM_DRV_LOAD); 417 break; 418 case e1000_82571: 419 case e1000_82572: 420 case e1000_80003es2lan: 421 case e1000_ich8lan: 422 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); 423 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, 424 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); 425 break; 426 default: 427 break; 428 } 429} 430 431/** 432 * e1000_get_hw_control - get control of the h/w from f/w 433 * @adapter: address of board private structure 434 * 435 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit. 436 * For ASF and Pass Through versions of f/w this means that 437 * the driver is loaded. For AMT version (only with 82573) 438 * of the f/w this means that the network i/f is open. 439 * 440 **/ 441 442static void 443e1000_get_hw_control(struct e1000_adapter *adapter) 444{ 445 uint32_t ctrl_ext; 446 uint32_t swsm; 447 448 /* Let firmware know the driver has taken over */ 449 switch (adapter->hw.mac_type) { 450 case e1000_82573: 451 swsm = E1000_READ_REG(&adapter->hw, SWSM); 452 E1000_WRITE_REG(&adapter->hw, SWSM, 453 swsm | E1000_SWSM_DRV_LOAD); 454 break; 455 case e1000_82571: 456 case e1000_82572: 457 case e1000_80003es2lan: 458 case e1000_ich8lan: 459 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); 460 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, 461 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); 462 break; 463 default: 464 break; 465 } 466} 467 468static void 469e1000_init_manageability(struct e1000_adapter *adapter) 470{ 471 if (adapter->en_mng_pt) { 472 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); 473 474 /* disable hardware interception of ARP */ 475 manc &= ~(E1000_MANC_ARP_EN); 476 477 /* enable receiving management packets to the host */ 478 /* this will probably generate destination unreachable messages 479 * from the host OS, but the packets will be handled on SMBUS */ 480 if (adapter->hw.has_manc2h) { 481 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H); 482 483 manc |= E1000_MANC_EN_MNG2HOST; 484#define E1000_MNG2HOST_PORT_623 (1 << 5) 485#define E1000_MNG2HOST_PORT_664 (1 << 6) 486 manc2h |= E1000_MNG2HOST_PORT_623; 487 manc2h |= E1000_MNG2HOST_PORT_664; 488 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h); 489 } 490 491 E1000_WRITE_REG(&adapter->hw, MANC, manc); 492 } 493} 494 495static void 496e1000_release_manageability(struct e1000_adapter *adapter) 497{ 498 if (adapter->en_mng_pt) { 499 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC); 500 501 /* re-enable hardware interception of ARP */ 502 manc |= E1000_MANC_ARP_EN; 503 504 if (adapter->hw.has_manc2h) 505 manc &= ~E1000_MANC_EN_MNG2HOST; 506 507 /* don't explicitly have to mess with MANC2H since 508 * MANC has an enable disable that gates MANC2H */ 509 510 E1000_WRITE_REG(&adapter->hw, MANC, manc); 511 } 512} 513 514/** 515 * e1000_configure - configure the hardware for RX and TX 516 * @adapter = private board structure 517 **/ 518static void e1000_configure(struct e1000_adapter *adapter) 519{ 520 struct net_device *netdev = adapter->netdev; 521 int i; 522 523 e1000_set_rx_mode(netdev); 524 525 e1000_restore_vlan(adapter); 526 e1000_init_manageability(adapter); 527 528 e1000_configure_tx(adapter); 529 e1000_setup_rctl(adapter); 530 e1000_configure_rx(adapter); 531 /* call E1000_DESC_UNUSED which always leaves 532 * at least 1 descriptor unused to make sure 533 * next_to_use != next_to_clean */ 534 for (i = 0; i < adapter->num_rx_queues; i++) { 535 struct e1000_rx_ring *ring = &adapter->rx_ring[i]; 536 adapter->alloc_rx_buf(adapter, ring, 537 E1000_DESC_UNUSED(ring)); 538 } 539 540 adapter->tx_queue_len = netdev->tx_queue_len; 541} 542 543int e1000_up(struct e1000_adapter *adapter) 544{ 545 /* hardware has been reset, we need to reload some things */ 546 e1000_configure(adapter); 547 548 clear_bit(__E1000_DOWN, &adapter->flags); 549 550#ifdef CONFIG_E1000_NAPI 551 napi_enable(&adapter->napi); 552#endif 553 e1000_irq_enable(adapter); 554 555 /* fire a link change interrupt to start the watchdog */ 556 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC); 557 return 0; 558} 559 560/** 561 * e1000_power_up_phy - restore link in case the phy was powered down 562 * @adapter: address of board private structure 563 * 564 * The phy may be powered down to save power and turn off link when the 565 * driver is unloaded and wake on lan is not enabled (among others) 566 * *** this routine MUST be followed by a call to e1000_reset *** 567 * 568 **/ 569 570void e1000_power_up_phy(struct e1000_adapter *adapter) 571{ 572 uint16_t mii_reg = 0; 573 574 /* Just clear the power down bit to wake the phy back up */ 575 if (adapter->hw.media_type == e1000_media_type_copper) { 576 /* according to the manual, the phy will retain its 577 * settings across a power-down/up cycle */ 578 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); 579 mii_reg &= ~MII_CR_POWER_DOWN; 580 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); 581 } 582} 583 584static void e1000_power_down_phy(struct e1000_adapter *adapter) 585{ 586 /* Power down the PHY so no link is implied when interface is down * 587 * The PHY cannot be powered down if any of the following is TRUE * 588 * (a) WoL is enabled 589 * (b) AMT is active 590 * (c) SoL/IDER session is active */ 591 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 && 592 adapter->hw.media_type == e1000_media_type_copper) { 593 uint16_t mii_reg = 0; 594 595 switch (adapter->hw.mac_type) { 596 case e1000_82540: 597 case e1000_82545: 598 case e1000_82545_rev_3: 599 case e1000_82546: 600 case e1000_82546_rev_3: 601 case e1000_82541: 602 case e1000_82541_rev_2: 603 case e1000_82547: 604 case e1000_82547_rev_2: 605 if (E1000_READ_REG(&adapter->hw, MANC) & 606 E1000_MANC_SMBUS_EN) 607 goto out; 608 break; 609 case e1000_82571: 610 case e1000_82572: 611 case e1000_82573: 612 case e1000_80003es2lan: 613 case e1000_ich8lan: 614 if (e1000_check_mng_mode(&adapter->hw) || 615 e1000_check_phy_reset_block(&adapter->hw)) 616 goto out; 617 break; 618 default: 619 goto out; 620 } 621 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg); 622 mii_reg |= MII_CR_POWER_DOWN; 623 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg); 624 mdelay(1); 625 } 626out: 627 return; 628} 629 630void 631e1000_down(struct e1000_adapter *adapter) 632{ 633 struct net_device *netdev = adapter->netdev; 634 635 /* signal that we're down so the interrupt handler does not 636 * reschedule our watchdog timer */ 637 set_bit(__E1000_DOWN, &adapter->flags); 638 639#ifdef CONFIG_E1000_NAPI 640 napi_disable(&adapter->napi); 641 atomic_set(&adapter->irq_sem, 0); 642#endif 643 e1000_irq_disable(adapter); 644 645 del_timer_sync(&adapter->tx_fifo_stall_timer); 646 del_timer_sync(&adapter->watchdog_timer); 647 del_timer_sync(&adapter->phy_info_timer); 648 649 netdev->tx_queue_len = adapter->tx_queue_len; 650 adapter->link_speed = 0; 651 adapter->link_duplex = 0; 652 netif_carrier_off(netdev); 653 netif_stop_queue(netdev); 654 655 e1000_reset(adapter); 656 e1000_clean_all_tx_rings(adapter); 657 e1000_clean_all_rx_rings(adapter); 658} 659 660void 661e1000_reinit_locked(struct e1000_adapter *adapter) 662{ 663 WARN_ON(in_interrupt()); 664 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) 665 msleep(1); 666 e1000_down(adapter); 667 e1000_up(adapter); 668 clear_bit(__E1000_RESETTING, &adapter->flags); 669} 670 671void 672e1000_reset(struct e1000_adapter *adapter) 673{ 674 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space; 675 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; 676 boolean_t legacy_pba_adjust = FALSE; 677 678 /* Repartition Pba for greater than 9k mtu 679 * To take effect CTRL.RST is required. 680 */ 681 682 switch (adapter->hw.mac_type) { 683 case e1000_82542_rev2_0: 684 case e1000_82542_rev2_1: 685 case e1000_82543: 686 case e1000_82544: 687 case e1000_82540: 688 case e1000_82541: 689 case e1000_82541_rev_2: 690 legacy_pba_adjust = TRUE; 691 pba = E1000_PBA_48K; 692 break; 693 case e1000_82545: 694 case e1000_82545_rev_3: 695 case e1000_82546: 696 case e1000_82546_rev_3: 697 pba = E1000_PBA_48K; 698 break; 699 case e1000_82547: 700 case e1000_82547_rev_2: 701 legacy_pba_adjust = TRUE; 702 pba = E1000_PBA_30K; 703 break; 704 case e1000_82571: 705 case e1000_82572: 706 case e1000_80003es2lan: 707 pba = E1000_PBA_38K; 708 break; 709 case e1000_82573: 710 pba = E1000_PBA_20K; 711 break; 712 case e1000_ich8lan: 713 pba = E1000_PBA_8K; 714 case e1000_undefined: 715 case e1000_num_macs: 716 break; 717 } 718 719 if (legacy_pba_adjust == TRUE) { 720 if (adapter->netdev->mtu > E1000_RXBUFFER_8192) 721 pba -= 8; /* allocate more FIFO for Tx */ 722 723 if (adapter->hw.mac_type == e1000_82547) { 724 adapter->tx_fifo_head = 0; 725 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT; 726 adapter->tx_fifo_size = 727 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT; 728 atomic_set(&adapter->tx_fifo_stall, 0); 729 } 730 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) { 731 /* adjust PBA for jumbo frames */ 732 E1000_WRITE_REG(&adapter->hw, PBA, pba); 733 734 /* To maintain wire speed transmits, the Tx FIFO should be 735 * large enough to accomodate two full transmit packets, 736 * rounded up to the next 1KB and expressed in KB. Likewise, 737 * the Rx FIFO should be large enough to accomodate at least 738 * one full receive packet and is similarly rounded up and 739 * expressed in KB. */ 740 pba = E1000_READ_REG(&adapter->hw, PBA); 741 /* upper 16 bits has Tx packet buffer allocation size in KB */ 742 tx_space = pba >> 16; 743 /* lower 16 bits has Rx packet buffer allocation size in KB */ 744 pba &= 0xffff; 745 /* don't include ethernet FCS because hardware appends/strips */ 746 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE + 747 VLAN_TAG_SIZE; 748 min_tx_space = min_rx_space; 749 min_tx_space *= 2; 750 min_tx_space = ALIGN(min_tx_space, 1024); 751 min_tx_space >>= 10; 752 min_rx_space = ALIGN(min_rx_space, 1024); 753 min_rx_space >>= 10; 754 755 /* If current Tx allocation is less than the min Tx FIFO size, 756 * and the min Tx FIFO size is less than the current Rx FIFO 757 * allocation, take space away from current Rx allocation */ 758 if (tx_space < min_tx_space && 759 ((min_tx_space - tx_space) < pba)) { 760 pba = pba - (min_tx_space - tx_space); 761 762 /* PCI/PCIx hardware has PBA alignment constraints */ 763 switch (adapter->hw.mac_type) { 764 case e1000_82545 ... e1000_82546_rev_3: 765 pba &= ~(E1000_PBA_8K - 1); 766 break; 767 default: 768 break; 769 } 770 771 /* if short on rx space, rx wins and must trump tx 772 * adjustment or use Early Receive if available */ 773 if (pba < min_rx_space) { 774 switch (adapter->hw.mac_type) { 775 case e1000_82573: 776 /* ERT enabled in e1000_configure_rx */ 777 break; 778 default: 779 pba = min_rx_space; 780 break; 781 } 782 } 783 } 784 } 785 786 E1000_WRITE_REG(&adapter->hw, PBA, pba); 787 788 /* flow control settings */ 789 /* Set the FC high water mark to 90% of the FIFO size. 790 * Required to clear last 3 LSB */ 791 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8; 792 /* We can't use 90% on small FIFOs because the remainder 793 * would be less than 1 full frame. In this case, we size 794 * it to allow at least a full frame above the high water 795 * mark. */ 796 if (pba < E1000_PBA_16K) 797 fc_high_water_mark = (pba * 1024) - 1600; 798 799 adapter->hw.fc_high_water = fc_high_water_mark; 800 adapter->hw.fc_low_water = fc_high_water_mark - 8; 801 if (adapter->hw.mac_type == e1000_80003es2lan) 802 adapter->hw.fc_pause_time = 0xFFFF; 803 else 804 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME; 805 adapter->hw.fc_send_xon = 1; 806 adapter->hw.fc = adapter->hw.original_fc; 807 808 /* Allow time for pending master requests to run */ 809 e1000_reset_hw(&adapter->hw); 810 if (adapter->hw.mac_type >= e1000_82544) 811 E1000_WRITE_REG(&adapter->hw, WUC, 0); 812 813 if (e1000_init_hw(&adapter->hw)) 814 DPRINTK(PROBE, ERR, "Hardware Error\n"); 815 e1000_update_mng_vlan(adapter); 816 817 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */ 818 if (adapter->hw.mac_type >= e1000_82544 && 819 adapter->hw.mac_type <= e1000_82547_rev_2 && 820 adapter->hw.autoneg == 1 && 821 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) { 822 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL); 823 /* clear phy power management bit if we are in gig only mode, 824 * which if enabled will attempt negotiation to 100Mb, which 825 * can cause a loss of link at power off or driver unload */ 826 ctrl &= ~E1000_CTRL_SWDPIN3; 827 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 828 } 829 830 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ 831 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE); 832 833 e1000_reset_adaptive(&adapter->hw); 834 e1000_phy_get_info(&adapter->hw, &adapter->phy_info); 835 836 if (!adapter->smart_power_down && 837 (adapter->hw.mac_type == e1000_82571 || 838 adapter->hw.mac_type == e1000_82572)) { 839 uint16_t phy_data = 0; 840 /* speed up time to link by disabling smart power down, ignore 841 * the return value of this function because there is nothing 842 * different we would do if it failed */ 843 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, 844 &phy_data); 845 phy_data &= ~IGP02E1000_PM_SPD; 846 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT, 847 phy_data); 848 } 849 850 e1000_release_manageability(adapter); 851} 852 853/** 854 * Dump the eeprom for users having checksum issues 855 **/ 856static void e1000_dump_eeprom(struct e1000_adapter *adapter) 857{ 858 struct net_device *netdev = adapter->netdev; 859 struct ethtool_eeprom eeprom; 860 const struct ethtool_ops *ops = netdev->ethtool_ops; 861 u8 *data; 862 int i; 863 u16 csum_old, csum_new = 0; 864 865 eeprom.len = ops->get_eeprom_len(netdev); 866 eeprom.offset = 0; 867 868 data = kmalloc(eeprom.len, GFP_KERNEL); 869 if (!data) { 870 printk(KERN_ERR "Unable to allocate memory to dump EEPROM" 871 " data\n"); 872 return; 873 } 874 875 ops->get_eeprom(netdev, &eeprom, data); 876 877 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) + 878 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8); 879 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2) 880 csum_new += data[i] + (data[i + 1] << 8); 881 csum_new = EEPROM_SUM - csum_new; 882 883 printk(KERN_ERR "/*********************/\n"); 884 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old); 885 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new); 886 887 printk(KERN_ERR "Offset Values\n"); 888 printk(KERN_ERR "======== ======\n"); 889 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0); 890 891 printk(KERN_ERR "Include this output when contacting your support " 892 "provider.\n"); 893 printk(KERN_ERR "This is not a software error! Something bad " 894 "happened to your hardware or\n"); 895 printk(KERN_ERR "EEPROM image. Ignoring this " 896 "problem could result in further problems,\n"); 897 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n"); 898 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, " 899 "which is invalid\n"); 900 printk(KERN_ERR "and requires you to set the proper MAC " 901 "address manually before continuing\n"); 902 printk(KERN_ERR "to enable this network device.\n"); 903 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue " 904 "to your hardware vendor\n"); 905 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n"); 906 printk(KERN_ERR "/*********************/\n"); 907 908 kfree(data); 909} 910 911/** 912 * e1000_probe - Device Initialization Routine 913 * @pdev: PCI device information struct 914 * @ent: entry in e1000_pci_tbl 915 * 916 * Returns 0 on success, negative on failure 917 * 918 * e1000_probe initializes an adapter identified by a pci_dev structure. 919 * The OS initialization, configuring of the adapter private structure, 920 * and a hardware reset occur. 921 **/ 922 923static int __devinit 924e1000_probe(struct pci_dev *pdev, 925 const struct pci_device_id *ent) 926{ 927 struct net_device *netdev; 928 struct e1000_adapter *adapter; 929 930 static int cards_found = 0; 931 static int global_quad_port_a = 0; /* global ksp3 port a indication */ 932 int i, err, pci_using_dac; 933 uint16_t eeprom_data = 0; 934 uint16_t eeprom_apme_mask = E1000_EEPROM_APME; 935 DECLARE_MAC_BUF(mac); 936 937 if ((err = pci_enable_device(pdev))) 938 return err; 939 940 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) && 941 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) { 942 pci_using_dac = 1; 943 } else { 944 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) && 945 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) { 946 E1000_ERR("No usable DMA configuration, aborting\n"); 947 goto err_dma; 948 } 949 pci_using_dac = 0; 950 } 951 952 if ((err = pci_request_regions(pdev, e1000_driver_name))) 953 goto err_pci_reg; 954 955 pci_set_master(pdev); 956 957 err = -ENOMEM; 958 netdev = alloc_etherdev(sizeof(struct e1000_adapter)); 959 if (!netdev) 960 goto err_alloc_etherdev; 961 962 SET_NETDEV_DEV(netdev, &pdev->dev); 963 964 pci_set_drvdata(pdev, netdev); 965 adapter = netdev_priv(netdev); 966 adapter->netdev = netdev; 967 adapter->pdev = pdev; 968 adapter->hw.back = adapter; 969 adapter->msg_enable = (1 << debug) - 1; 970 971 err = -EIO; 972 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0), 973 pci_resource_len(pdev, BAR_0)); 974 if (!adapter->hw.hw_addr) 975 goto err_ioremap; 976 977 for (i = BAR_1; i <= BAR_5; i++) { 978 if (pci_resource_len(pdev, i) == 0) 979 continue; 980 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { 981 adapter->hw.io_base = pci_resource_start(pdev, i); 982 break; 983 } 984 } 985 986 netdev->open = &e1000_open; 987 netdev->stop = &e1000_close; 988 netdev->hard_start_xmit = &e1000_xmit_frame; 989 netdev->get_stats = &e1000_get_stats; 990 netdev->set_rx_mode = &e1000_set_rx_mode; 991 netdev->set_mac_address = &e1000_set_mac; 992 netdev->change_mtu = &e1000_change_mtu; 993 netdev->do_ioctl = &e1000_ioctl; 994 e1000_set_ethtool_ops(netdev); 995 netdev->tx_timeout = &e1000_tx_timeout; 996 netdev->watchdog_timeo = 5 * HZ; 997#ifdef CONFIG_E1000_NAPI 998 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64); 999#endif 1000 netdev->vlan_rx_register = e1000_vlan_rx_register; 1001 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid; 1002 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid; 1003#ifdef CONFIG_NET_POLL_CONTROLLER 1004 netdev->poll_controller = e1000_netpoll; 1005#endif 1006 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); 1007 1008 adapter->bd_number = cards_found; 1009 1010 /* setup the private structure */ 1011 1012 if ((err = e1000_sw_init(adapter))) 1013 goto err_sw_init; 1014 1015 err = -EIO; 1016 /* Flash BAR mapping must happen after e1000_sw_init 1017 * because it depends on mac_type */ 1018 if ((adapter->hw.mac_type == e1000_ich8lan) && 1019 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 1020 adapter->hw.flash_address = 1021 ioremap(pci_resource_start(pdev, 1), 1022 pci_resource_len(pdev, 1)); 1023 if (!adapter->hw.flash_address) 1024 goto err_flashmap; 1025 } 1026 1027 if (e1000_check_phy_reset_block(&adapter->hw)) 1028 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n"); 1029 1030 if (adapter->hw.mac_type >= e1000_82543) { 1031 netdev->features = NETIF_F_SG | 1032 NETIF_F_HW_CSUM | 1033 NETIF_F_HW_VLAN_TX | 1034 NETIF_F_HW_VLAN_RX | 1035 NETIF_F_HW_VLAN_FILTER; 1036 if (adapter->hw.mac_type == e1000_ich8lan) 1037 netdev->features &= ~NETIF_F_HW_VLAN_FILTER; 1038 } 1039 1040 if ((adapter->hw.mac_type >= e1000_82544) && 1041 (adapter->hw.mac_type != e1000_82547)) 1042 netdev->features |= NETIF_F_TSO; 1043 1044 if (adapter->hw.mac_type > e1000_82547_rev_2) 1045 netdev->features |= NETIF_F_TSO6; 1046 if (pci_using_dac) 1047 netdev->features |= NETIF_F_HIGHDMA; 1048 1049 netdev->features |= NETIF_F_LLTX; 1050 1051 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw); 1052 1053 /* initialize eeprom parameters */ 1054 if (e1000_init_eeprom_params(&adapter->hw)) { 1055 E1000_ERR("EEPROM initialization failed\n"); 1056 goto err_eeprom; 1057 } 1058 1059 /* before reading the EEPROM, reset the controller to 1060 * put the device in a known good starting state */ 1061 1062 e1000_reset_hw(&adapter->hw); 1063 1064 /* make sure the EEPROM is good */ 1065 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) { 1066 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n"); 1067 e1000_dump_eeprom(adapter); 1068 /* 1069 * set MAC address to all zeroes to invalidate and temporary 1070 * disable this device for the user. This blocks regular 1071 * traffic while still permitting ethtool ioctls from reaching 1072 * the hardware as well as allowing the user to run the 1073 * interface after manually setting a hw addr using 1074 * `ip set address` 1075 */ 1076 memset(adapter->hw.mac_addr, 0, netdev->addr_len); 1077 } else { 1078 /* copy the MAC address out of the EEPROM */ 1079 if (e1000_read_mac_addr(&adapter->hw)) 1080 DPRINTK(PROBE, ERR, "EEPROM Read Error\n"); 1081 } 1082 /* don't block initalization here due to bad MAC address */ 1083 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len); 1084 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len); 1085 1086 if (!is_valid_ether_addr(netdev->perm_addr)) 1087 DPRINTK(PROBE, ERR, "Invalid MAC Address\n"); 1088 1089 e1000_get_bus_info(&adapter->hw); 1090 1091 init_timer(&adapter->tx_fifo_stall_timer); 1092 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall; 1093 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter; 1094 1095 init_timer(&adapter->watchdog_timer); 1096 adapter->watchdog_timer.function = &e1000_watchdog; 1097 adapter->watchdog_timer.data = (unsigned long) adapter; 1098 1099 init_timer(&adapter->phy_info_timer); 1100 adapter->phy_info_timer.function = &e1000_update_phy_info; 1101 adapter->phy_info_timer.data = (unsigned long) adapter; 1102 1103 INIT_WORK(&adapter->reset_task, e1000_reset_task); 1104 1105 e1000_check_options(adapter); 1106 1107 /* Initial Wake on LAN setting 1108 * If APM wake is enabled in the EEPROM, 1109 * enable the ACPI Magic Packet filter 1110 */ 1111 1112 switch (adapter->hw.mac_type) { 1113 case e1000_82542_rev2_0: 1114 case e1000_82542_rev2_1: 1115 case e1000_82543: 1116 break; 1117 case e1000_82544: 1118 e1000_read_eeprom(&adapter->hw, 1119 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data); 1120 eeprom_apme_mask = E1000_EEPROM_82544_APM; 1121 break; 1122 case e1000_ich8lan: 1123 e1000_read_eeprom(&adapter->hw, 1124 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data); 1125 eeprom_apme_mask = E1000_EEPROM_ICH8_APME; 1126 break; 1127 case e1000_82546: 1128 case e1000_82546_rev_3: 1129 case e1000_82571: 1130 case e1000_80003es2lan: 1131 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){ 1132 e1000_read_eeprom(&adapter->hw, 1133 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data); 1134 break; 1135 } 1136 /* Fall Through */ 1137 default: 1138 e1000_read_eeprom(&adapter->hw, 1139 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data); 1140 break; 1141 } 1142 if (eeprom_data & eeprom_apme_mask) 1143 adapter->eeprom_wol |= E1000_WUFC_MAG; 1144 1145 /* now that we have the eeprom settings, apply the special cases 1146 * where the eeprom may be wrong or the board simply won't support 1147 * wake on lan on a particular port */ 1148 switch (pdev->device) { 1149 case E1000_DEV_ID_82546GB_PCIE: 1150 adapter->eeprom_wol = 0; 1151 break; 1152 case E1000_DEV_ID_82546EB_FIBER: 1153 case E1000_DEV_ID_82546GB_FIBER: 1154 case E1000_DEV_ID_82571EB_FIBER: 1155 /* Wake events only supported on port A for dual fiber 1156 * regardless of eeprom setting */ 1157 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1) 1158 adapter->eeprom_wol = 0; 1159 break; 1160 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3: 1161 case E1000_DEV_ID_82571EB_QUAD_COPPER: 1162 case E1000_DEV_ID_82571EB_QUAD_FIBER: 1163 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE: 1164 case E1000_DEV_ID_82571PT_QUAD_COPPER: 1165 /* if quad port adapter, disable WoL on all but port A */ 1166 if (global_quad_port_a != 0) 1167 adapter->eeprom_wol = 0; 1168 else 1169 adapter->quad_port_a = 1; 1170 /* Reset for multiple quad port adapters */ 1171 if (++global_quad_port_a == 4) 1172 global_quad_port_a = 0; 1173 break; 1174 } 1175 1176 /* initialize the wol settings based on the eeprom settings */ 1177 adapter->wol = adapter->eeprom_wol; 1178 1179 /* print bus type/speed/width info */ 1180 { 1181 struct e1000_hw *hw = &adapter->hw; 1182 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ", 1183 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : 1184 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")), 1185 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" : 1186 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" : 1187 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" : 1188 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" : 1189 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"), 1190 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : 1191 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" : 1192 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" : 1193 "32-bit")); 1194 } 1195 1196 printk("%s\n", print_mac(mac, netdev->dev_addr)); 1197 1198 if (adapter->hw.bus_type == e1000_bus_type_pci_express) { 1199 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no " 1200 "longer be supported by this driver in the future.\n", 1201 pdev->vendor, pdev->device); 1202 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" " 1203 "driver instead.\n"); 1204 } 1205 1206 /* reset the hardware with the new settings */ 1207 e1000_reset(adapter); 1208 1209 /* If the controller is 82573 and f/w is AMT, do not set 1210 * DRV_LOAD until the interface is up. For all other cases, 1211 * let the f/w know that the h/w is now under the control 1212 * of the driver. */ 1213 if (adapter->hw.mac_type != e1000_82573 || 1214 !e1000_check_mng_mode(&adapter->hw)) 1215 e1000_get_hw_control(adapter); 1216 1217 /* tell the stack to leave us alone until e1000_open() is called */ 1218 netif_carrier_off(netdev); 1219 netif_stop_queue(netdev); 1220 1221 strcpy(netdev->name, "eth%d"); 1222 if ((err = register_netdev(netdev))) 1223 goto err_register; 1224 1225 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n"); 1226 1227 cards_found++; 1228 return 0; 1229 1230err_register: 1231 e1000_release_hw_control(adapter); 1232err_eeprom: 1233 if (!e1000_check_phy_reset_block(&adapter->hw)) 1234 e1000_phy_hw_reset(&adapter->hw); 1235 1236 if (adapter->hw.flash_address) 1237 iounmap(adapter->hw.flash_address); 1238err_flashmap: 1239#ifdef CONFIG_E1000_NAPI 1240 for (i = 0; i < adapter->num_rx_queues; i++) 1241 dev_put(&adapter->polling_netdev[i]); 1242#endif 1243 1244 kfree(adapter->tx_ring); 1245 kfree(adapter->rx_ring); 1246#ifdef CONFIG_E1000_NAPI 1247 kfree(adapter->polling_netdev); 1248#endif 1249err_sw_init: 1250 iounmap(adapter->hw.hw_addr); 1251err_ioremap: 1252 free_netdev(netdev); 1253err_alloc_etherdev: 1254 pci_release_regions(pdev); 1255err_pci_reg: 1256err_dma: 1257 pci_disable_device(pdev); 1258 return err; 1259} 1260 1261/** 1262 * e1000_remove - Device Removal Routine 1263 * @pdev: PCI device information struct 1264 * 1265 * e1000_remove is called by the PCI subsystem to alert the driver 1266 * that it should release a PCI device. The could be caused by a 1267 * Hot-Plug event, or because the driver is going to be removed from 1268 * memory. 1269 **/ 1270 1271static void __devexit 1272e1000_remove(struct pci_dev *pdev) 1273{ 1274 struct net_device *netdev = pci_get_drvdata(pdev); 1275 struct e1000_adapter *adapter = netdev_priv(netdev); 1276#ifdef CONFIG_E1000_NAPI 1277 int i; 1278#endif 1279 1280 cancel_work_sync(&adapter->reset_task); 1281 1282 e1000_release_manageability(adapter); 1283 1284 /* Release control of h/w to f/w. If f/w is AMT enabled, this 1285 * would have already happened in close and is redundant. */ 1286 e1000_release_hw_control(adapter); 1287 1288#ifdef CONFIG_E1000_NAPI 1289 for (i = 0; i < adapter->num_rx_queues; i++) 1290 dev_put(&adapter->polling_netdev[i]); 1291#endif 1292 1293 unregister_netdev(netdev); 1294 1295 if (!e1000_check_phy_reset_block(&adapter->hw)) 1296 e1000_phy_hw_reset(&adapter->hw); 1297 1298 kfree(adapter->tx_ring); 1299 kfree(adapter->rx_ring); 1300#ifdef CONFIG_E1000_NAPI 1301 kfree(adapter->polling_netdev); 1302#endif 1303 1304 iounmap(adapter->hw.hw_addr); 1305 if (adapter->hw.flash_address) 1306 iounmap(adapter->hw.flash_address); 1307 pci_release_regions(pdev); 1308 1309 free_netdev(netdev); 1310 1311 pci_disable_device(pdev); 1312} 1313 1314/** 1315 * e1000_sw_init - Initialize general software structures (struct e1000_adapter) 1316 * @adapter: board private structure to initialize 1317 * 1318 * e1000_sw_init initializes the Adapter private data structure. 1319 * Fields are initialized based on PCI device information and 1320 * OS network device settings (MTU size). 1321 **/ 1322 1323static int __devinit 1324e1000_sw_init(struct e1000_adapter *adapter) 1325{ 1326 struct e1000_hw *hw = &adapter->hw; 1327 struct net_device *netdev = adapter->netdev; 1328 struct pci_dev *pdev = adapter->pdev; 1329#ifdef CONFIG_E1000_NAPI 1330 int i; 1331#endif 1332 1333 /* PCI config space info */ 1334 1335 hw->vendor_id = pdev->vendor; 1336 hw->device_id = pdev->device; 1337 hw->subsystem_vendor_id = pdev->subsystem_vendor; 1338 hw->subsystem_id = pdev->subsystem_device; 1339 hw->revision_id = pdev->revision; 1340 1341 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word); 1342 1343 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; 1344 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128; 1345 hw->max_frame_size = netdev->mtu + 1346 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; 1347 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE; 1348 1349 /* identify the MAC */ 1350 1351 if (e1000_set_mac_type(hw)) { 1352 DPRINTK(PROBE, ERR, "Unknown MAC Type\n"); 1353 return -EIO; 1354 } 1355 1356 switch (hw->mac_type) { 1357 default: 1358 break; 1359 case e1000_82541: 1360 case e1000_82547: 1361 case e1000_82541_rev_2: 1362 case e1000_82547_rev_2: 1363 hw->phy_init_script = 1; 1364 break; 1365 } 1366 1367 e1000_set_media_type(hw); 1368 1369 hw->wait_autoneg_complete = FALSE; 1370 hw->tbi_compatibility_en = TRUE; 1371 hw->adaptive_ifs = TRUE; 1372 1373 /* Copper options */ 1374 1375 if (hw->media_type == e1000_media_type_copper) { 1376 hw->mdix = AUTO_ALL_MODES; 1377 hw->disable_polarity_correction = FALSE; 1378 hw->master_slave = E1000_MASTER_SLAVE; 1379 } 1380 1381 adapter->num_tx_queues = 1; 1382 adapter->num_rx_queues = 1; 1383 1384 if (e1000_alloc_queues(adapter)) { 1385 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n"); 1386 return -ENOMEM; 1387 } 1388 1389#ifdef CONFIG_E1000_NAPI 1390 for (i = 0; i < adapter->num_rx_queues; i++) { 1391 adapter->polling_netdev[i].priv = adapter; 1392 dev_hold(&adapter->polling_netdev[i]); 1393 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state); 1394 } 1395 spin_lock_init(&adapter->tx_queue_lock); 1396#endif 1397 1398 /* Explicitly disable IRQ since the NIC can be in any state. */ 1399 atomic_set(&adapter->irq_sem, 0); 1400 e1000_irq_disable(adapter); 1401 1402 spin_lock_init(&adapter->stats_lock); 1403 1404 set_bit(__E1000_DOWN, &adapter->flags); 1405 1406 return 0; 1407} 1408 1409/** 1410 * e1000_alloc_queues - Allocate memory for all rings 1411 * @adapter: board private structure to initialize 1412 * 1413 * We allocate one ring per queue at run-time since we don't know the 1414 * number of queues at compile-time. The polling_netdev array is 1415 * intended for Multiqueue, but should work fine with a single queue. 1416 **/ 1417 1418static int __devinit 1419e1000_alloc_queues(struct e1000_adapter *adapter) 1420{ 1421 adapter->tx_ring = kcalloc(adapter->num_tx_queues, 1422 sizeof(struct e1000_tx_ring), GFP_KERNEL); 1423 if (!adapter->tx_ring) 1424 return -ENOMEM; 1425 1426 adapter->rx_ring = kcalloc(adapter->num_rx_queues, 1427 sizeof(struct e1000_rx_ring), GFP_KERNEL); 1428 if (!adapter->rx_ring) { 1429 kfree(adapter->tx_ring); 1430 return -ENOMEM; 1431 } 1432 1433#ifdef CONFIG_E1000_NAPI 1434 adapter->polling_netdev = kcalloc(adapter->num_rx_queues, 1435 sizeof(struct net_device), 1436 GFP_KERNEL); 1437 if (!adapter->polling_netdev) { 1438 kfree(adapter->tx_ring); 1439 kfree(adapter->rx_ring); 1440 return -ENOMEM; 1441 } 1442#endif 1443 1444 return E1000_SUCCESS; 1445} 1446 1447/** 1448 * e1000_open - Called when a network interface is made active 1449 * @netdev: network interface device structure 1450 * 1451 * Returns 0 on success, negative value on failure 1452 * 1453 * The open entry point is called when a network interface is made 1454 * active by the system (IFF_UP). At this point all resources needed 1455 * for transmit and receive operations are allocated, the interrupt 1456 * handler is registered with the OS, the watchdog timer is started, 1457 * and the stack is notified that the interface is ready. 1458 **/ 1459 1460static int 1461e1000_open(struct net_device *netdev) 1462{ 1463 struct e1000_adapter *adapter = netdev_priv(netdev); 1464 int err; 1465 1466 /* disallow open during test */ 1467 if (test_bit(__E1000_TESTING, &adapter->flags)) 1468 return -EBUSY; 1469 1470 /* allocate transmit descriptors */ 1471 err = e1000_setup_all_tx_resources(adapter); 1472 if (err) 1473 goto err_setup_tx; 1474 1475 /* allocate receive descriptors */ 1476 err = e1000_setup_all_rx_resources(adapter); 1477 if (err) 1478 goto err_setup_rx; 1479 1480 e1000_power_up_phy(adapter); 1481 1482 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 1483 if ((adapter->hw.mng_cookie.status & 1484 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) { 1485 e1000_update_mng_vlan(adapter); 1486 } 1487 1488 /* If AMT is enabled, let the firmware know that the network 1489 * interface is now open */ 1490 if (adapter->hw.mac_type == e1000_82573 && 1491 e1000_check_mng_mode(&adapter->hw)) 1492 e1000_get_hw_control(adapter); 1493 1494 /* before we allocate an interrupt, we must be ready to handle it. 1495 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt 1496 * as soon as we call pci_request_irq, so we have to setup our 1497 * clean_rx handler before we do so. */ 1498 e1000_configure(adapter); 1499 1500 err = e1000_request_irq(adapter); 1501 if (err) 1502 goto err_req_irq; 1503 1504 /* From here on the code is the same as e1000_up() */ 1505 clear_bit(__E1000_DOWN, &adapter->flags); 1506 1507#ifdef CONFIG_E1000_NAPI 1508 napi_enable(&adapter->napi); 1509#endif 1510 1511 e1000_irq_enable(adapter); 1512 1513 /* fire a link status change interrupt to start the watchdog */ 1514 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC); 1515 1516 return E1000_SUCCESS; 1517 1518err_req_irq: 1519 e1000_release_hw_control(adapter); 1520 e1000_power_down_phy(adapter); 1521 e1000_free_all_rx_resources(adapter); 1522err_setup_rx: 1523 e1000_free_all_tx_resources(adapter); 1524err_setup_tx: 1525 e1000_reset(adapter); 1526 1527 return err; 1528} 1529 1530/** 1531 * e1000_close - Disables a network interface 1532 * @netdev: network interface device structure 1533 * 1534 * Returns 0, this is not allowed to fail 1535 * 1536 * The close entry point is called when an interface is de-activated 1537 * by the OS. The hardware is still under the drivers control, but 1538 * needs to be disabled. A global MAC reset is issued to stop the 1539 * hardware, and all transmit and receive resources are freed. 1540 **/ 1541 1542static int 1543e1000_close(struct net_device *netdev) 1544{ 1545 struct e1000_adapter *adapter = netdev_priv(netdev); 1546 1547 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); 1548 e1000_down(adapter); 1549 e1000_power_down_phy(adapter); 1550 e1000_free_irq(adapter); 1551 1552 e1000_free_all_tx_resources(adapter); 1553 e1000_free_all_rx_resources(adapter); 1554 1555 /* kill manageability vlan ID if supported, but not if a vlan with 1556 * the same ID is registered on the host OS (let 8021q kill it) */ 1557 if ((adapter->hw.mng_cookie.status & 1558 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && 1559 !(adapter->vlgrp && 1560 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) { 1561 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); 1562 } 1563 1564 /* If AMT is enabled, let the firmware know that the network 1565 * interface is now closed */ 1566 if (adapter->hw.mac_type == e1000_82573 && 1567 e1000_check_mng_mode(&adapter->hw)) 1568 e1000_release_hw_control(adapter); 1569 1570 return 0; 1571} 1572 1573/** 1574 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary 1575 * @adapter: address of board private structure 1576 * @start: address of beginning of memory 1577 * @len: length of memory 1578 **/ 1579static boolean_t 1580e1000_check_64k_bound(struct e1000_adapter *adapter, 1581 void *start, unsigned long len) 1582{ 1583 unsigned long begin = (unsigned long) start; 1584 unsigned long end = begin + len; 1585 1586 /* First rev 82545 and 82546 need to not allow any memory 1587 * write location to cross 64k boundary due to errata 23 */ 1588 if (adapter->hw.mac_type == e1000_82545 || 1589 adapter->hw.mac_type == e1000_82546) { 1590 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; 1591 } 1592 1593 return TRUE; 1594} 1595 1596/** 1597 * e1000_setup_tx_resources - allocate Tx resources (Descriptors) 1598 * @adapter: board private structure 1599 * @txdr: tx descriptor ring (for a specific queue) to setup 1600 * 1601 * Return 0 on success, negative on failure 1602 **/ 1603 1604static int 1605e1000_setup_tx_resources(struct e1000_adapter *adapter, 1606 struct e1000_tx_ring *txdr) 1607{ 1608 struct pci_dev *pdev = adapter->pdev; 1609 int size; 1610 1611 size = sizeof(struct e1000_buffer) * txdr->count; 1612 txdr->buffer_info = vmalloc(size); 1613 if (!txdr->buffer_info) { 1614 DPRINTK(PROBE, ERR, 1615 "Unable to allocate memory for the transmit descriptor ring\n"); 1616 return -ENOMEM; 1617 } 1618 memset(txdr->buffer_info, 0, size); 1619 1620 /* round up to nearest 4K */ 1621 1622 txdr->size = txdr->count * sizeof(struct e1000_tx_desc); 1623 txdr->size = ALIGN(txdr->size, 4096); 1624 1625 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); 1626 if (!txdr->desc) { 1627setup_tx_desc_die: 1628 vfree(txdr->buffer_info); 1629 DPRINTK(PROBE, ERR, 1630 "Unable to allocate memory for the transmit descriptor ring\n"); 1631 return -ENOMEM; 1632 } 1633 1634 /* Fix for errata 23, can't cross 64kB boundary */ 1635 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { 1636 void *olddesc = txdr->desc; 1637 dma_addr_t olddma = txdr->dma; 1638 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes " 1639 "at %p\n", txdr->size, txdr->desc); 1640 /* Try again, without freeing the previous */ 1641 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma); 1642 /* Failed allocation, critical failure */ 1643 if (!txdr->desc) { 1644 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1645 goto setup_tx_desc_die; 1646 } 1647 1648 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) { 1649 /* give up */ 1650 pci_free_consistent(pdev, txdr->size, txdr->desc, 1651 txdr->dma); 1652 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1653 DPRINTK(PROBE, ERR, 1654 "Unable to allocate aligned memory " 1655 "for the transmit descriptor ring\n"); 1656 vfree(txdr->buffer_info); 1657 return -ENOMEM; 1658 } else { 1659 /* Free old allocation, new allocation was successful */ 1660 pci_free_consistent(pdev, txdr->size, olddesc, olddma); 1661 } 1662 } 1663 memset(txdr->desc, 0, txdr->size); 1664 1665 txdr->next_to_use = 0; 1666 txdr->next_to_clean = 0; 1667 spin_lock_init(&txdr->tx_lock); 1668 1669 return 0; 1670} 1671 1672/** 1673 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources 1674 * (Descriptors) for all queues 1675 * @adapter: board private structure 1676 * 1677 * Return 0 on success, negative on failure 1678 **/ 1679 1680int 1681e1000_setup_all_tx_resources(struct e1000_adapter *adapter) 1682{ 1683 int i, err = 0; 1684 1685 for (i = 0; i < adapter->num_tx_queues; i++) { 1686 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]); 1687 if (err) { 1688 DPRINTK(PROBE, ERR, 1689 "Allocation for Tx Queue %u failed\n", i); 1690 for (i-- ; i >= 0; i--) 1691 e1000_free_tx_resources(adapter, 1692 &adapter->tx_ring[i]); 1693 break; 1694 } 1695 } 1696 1697 return err; 1698} 1699 1700/** 1701 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset 1702 * @adapter: board private structure 1703 * 1704 * Configure the Tx unit of the MAC after a reset. 1705 **/ 1706 1707static void 1708e1000_configure_tx(struct e1000_adapter *adapter) 1709{ 1710 uint64_t tdba; 1711 struct e1000_hw *hw = &adapter->hw; 1712 uint32_t tdlen, tctl, tipg, tarc; 1713 uint32_t ipgr1, ipgr2; 1714 1715 /* Setup the HW Tx Head and Tail descriptor pointers */ 1716 1717 switch (adapter->num_tx_queues) { 1718 case 1: 1719 default: 1720 tdba = adapter->tx_ring[0].dma; 1721 tdlen = adapter->tx_ring[0].count * 1722 sizeof(struct e1000_tx_desc); 1723 E1000_WRITE_REG(hw, TDLEN, tdlen); 1724 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32)); 1725 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL)); 1726 E1000_WRITE_REG(hw, TDT, 0); 1727 E1000_WRITE_REG(hw, TDH, 0); 1728 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH); 1729 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT); 1730 break; 1731 } 1732 1733 /* Set the default values for the Tx Inter Packet Gap timer */ 1734 if (adapter->hw.mac_type <= e1000_82547_rev_2 && 1735 (hw->media_type == e1000_media_type_fiber || 1736 hw->media_type == e1000_media_type_internal_serdes)) 1737 tipg = DEFAULT_82543_TIPG_IPGT_FIBER; 1738 else 1739 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; 1740 1741 switch (hw->mac_type) { 1742 case e1000_82542_rev2_0: 1743 case e1000_82542_rev2_1: 1744 tipg = DEFAULT_82542_TIPG_IPGT; 1745 ipgr1 = DEFAULT_82542_TIPG_IPGR1; 1746 ipgr2 = DEFAULT_82542_TIPG_IPGR2; 1747 break; 1748 case e1000_80003es2lan: 1749 ipgr1 = DEFAULT_82543_TIPG_IPGR1; 1750 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; 1751 break; 1752 default: 1753 ipgr1 = DEFAULT_82543_TIPG_IPGR1; 1754 ipgr2 = DEFAULT_82543_TIPG_IPGR2; 1755 break; 1756 } 1757 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT; 1758 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT; 1759 E1000_WRITE_REG(hw, TIPG, tipg); 1760 1761 /* Set the Tx Interrupt Delay register */ 1762 1763 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay); 1764 if (hw->mac_type >= e1000_82540) 1765 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay); 1766 1767 /* Program the Transmit Control Register */ 1768 1769 tctl = E1000_READ_REG(hw, TCTL); 1770 tctl &= ~E1000_TCTL_CT; 1771 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | 1772 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); 1773 1774 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) { 1775 tarc = E1000_READ_REG(hw, TARC0); 1776 /* set the speed mode bit, we'll clear it if we're not at 1777 * gigabit link later */ 1778 tarc |= (1 << 21); 1779 E1000_WRITE_REG(hw, TARC0, tarc); 1780 } else if (hw->mac_type == e1000_80003es2lan) { 1781 tarc = E1000_READ_REG(hw, TARC0); 1782 tarc |= 1; 1783 E1000_WRITE_REG(hw, TARC0, tarc); 1784 tarc = E1000_READ_REG(hw, TARC1); 1785 tarc |= 1; 1786 E1000_WRITE_REG(hw, TARC1, tarc); 1787 } 1788 1789 e1000_config_collision_dist(hw); 1790 1791 /* Setup Transmit Descriptor Settings for eop descriptor */ 1792 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS; 1793 1794 /* only set IDE if we are delaying interrupts using the timers */ 1795 if (adapter->tx_int_delay) 1796 adapter->txd_cmd |= E1000_TXD_CMD_IDE; 1797 1798 if (hw->mac_type < e1000_82543) 1799 adapter->txd_cmd |= E1000_TXD_CMD_RPS; 1800 else 1801 adapter->txd_cmd |= E1000_TXD_CMD_RS; 1802 1803 /* Cache if we're 82544 running in PCI-X because we'll 1804 * need this to apply a workaround later in the send path. */ 1805 if (hw->mac_type == e1000_82544 && 1806 hw->bus_type == e1000_bus_type_pcix) 1807 adapter->pcix_82544 = 1; 1808 1809 E1000_WRITE_REG(hw, TCTL, tctl); 1810 1811} 1812 1813/** 1814 * e1000_setup_rx_resources - allocate Rx resources (Descriptors) 1815 * @adapter: board private structure 1816 * @rxdr: rx descriptor ring (for a specific queue) to setup 1817 * 1818 * Returns 0 on success, negative on failure 1819 **/ 1820 1821static int 1822e1000_setup_rx_resources(struct e1000_adapter *adapter, 1823 struct e1000_rx_ring *rxdr) 1824{ 1825 struct pci_dev *pdev = adapter->pdev; 1826 int size, desc_len; 1827 1828 size = sizeof(struct e1000_buffer) * rxdr->count; 1829 rxdr->buffer_info = vmalloc(size); 1830 if (!rxdr->buffer_info) { 1831 DPRINTK(PROBE, ERR, 1832 "Unable to allocate memory for the receive descriptor ring\n"); 1833 return -ENOMEM; 1834 } 1835 memset(rxdr->buffer_info, 0, size); 1836 1837 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page), 1838 GFP_KERNEL); 1839 if (!rxdr->ps_page) { 1840 vfree(rxdr->buffer_info); 1841 DPRINTK(PROBE, ERR, 1842 "Unable to allocate memory for the receive descriptor ring\n"); 1843 return -ENOMEM; 1844 } 1845 1846 rxdr->ps_page_dma = kcalloc(rxdr->count, 1847 sizeof(struct e1000_ps_page_dma), 1848 GFP_KERNEL); 1849 if (!rxdr->ps_page_dma) { 1850 vfree(rxdr->buffer_info); 1851 kfree(rxdr->ps_page); 1852 DPRINTK(PROBE, ERR, 1853 "Unable to allocate memory for the receive descriptor ring\n"); 1854 return -ENOMEM; 1855 } 1856 1857 if (adapter->hw.mac_type <= e1000_82547_rev_2) 1858 desc_len = sizeof(struct e1000_rx_desc); 1859 else 1860 desc_len = sizeof(union e1000_rx_desc_packet_split); 1861 1862 /* Round up to nearest 4K */ 1863 1864 rxdr->size = rxdr->count * desc_len; 1865 rxdr->size = ALIGN(rxdr->size, 4096); 1866 1867 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); 1868 1869 if (!rxdr->desc) { 1870 DPRINTK(PROBE, ERR, 1871 "Unable to allocate memory for the receive descriptor ring\n"); 1872setup_rx_desc_die: 1873 vfree(rxdr->buffer_info); 1874 kfree(rxdr->ps_page); 1875 kfree(rxdr->ps_page_dma); 1876 return -ENOMEM; 1877 } 1878 1879 /* Fix for errata 23, can't cross 64kB boundary */ 1880 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { 1881 void *olddesc = rxdr->desc; 1882 dma_addr_t olddma = rxdr->dma; 1883 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes " 1884 "at %p\n", rxdr->size, rxdr->desc); 1885 /* Try again, without freeing the previous */ 1886 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma); 1887 /* Failed allocation, critical failure */ 1888 if (!rxdr->desc) { 1889 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1890 DPRINTK(PROBE, ERR, 1891 "Unable to allocate memory " 1892 "for the receive descriptor ring\n"); 1893 goto setup_rx_desc_die; 1894 } 1895 1896 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) { 1897 /* give up */ 1898 pci_free_consistent(pdev, rxdr->size, rxdr->desc, 1899 rxdr->dma); 1900 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1901 DPRINTK(PROBE, ERR, 1902 "Unable to allocate aligned memory " 1903 "for the receive descriptor ring\n"); 1904 goto setup_rx_desc_die; 1905 } else { 1906 /* Free old allocation, new allocation was successful */ 1907 pci_free_consistent(pdev, rxdr->size, olddesc, olddma); 1908 } 1909 } 1910 memset(rxdr->desc, 0, rxdr->size); 1911 1912 rxdr->next_to_clean = 0; 1913 rxdr->next_to_use = 0; 1914 1915 return 0; 1916} 1917 1918/** 1919 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources 1920 * (Descriptors) for all queues 1921 * @adapter: board private structure 1922 * 1923 * Return 0 on success, negative on failure 1924 **/ 1925 1926int 1927e1000_setup_all_rx_resources(struct e1000_adapter *adapter) 1928{ 1929 int i, err = 0; 1930 1931 for (i = 0; i < adapter->num_rx_queues; i++) { 1932 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]); 1933 if (err) { 1934 DPRINTK(PROBE, ERR, 1935 "Allocation for Rx Queue %u failed\n", i); 1936 for (i-- ; i >= 0; i--) 1937 e1000_free_rx_resources(adapter, 1938 &adapter->rx_ring[i]); 1939 break; 1940 } 1941 } 1942 1943 return err; 1944} 1945 1946/** 1947 * e1000_setup_rctl - configure the receive control registers 1948 * @adapter: Board private structure 1949 **/ 1950#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \ 1951 (((S) & (PAGE_SIZE - 1)) ? 1 : 0)) 1952static void 1953e1000_setup_rctl(struct e1000_adapter *adapter) 1954{ 1955 uint32_t rctl, rfctl; 1956 uint32_t psrctl = 0; 1957#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT 1958 uint32_t pages = 0; 1959#endif 1960 1961 rctl = E1000_READ_REG(&adapter->hw, RCTL); 1962 1963 rctl &= ~(3 << E1000_RCTL_MO_SHIFT); 1964 1965 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | 1966 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | 1967 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT); 1968 1969 if (adapter->hw.tbi_compatibility_on == 1) 1970 rctl |= E1000_RCTL_SBP; 1971 else 1972 rctl &= ~E1000_RCTL_SBP; 1973 1974 if (adapter->netdev->mtu <= ETH_DATA_LEN) 1975 rctl &= ~E1000_RCTL_LPE; 1976 else 1977 rctl |= E1000_RCTL_LPE; 1978 1979 /* Setup buffer sizes */ 1980 rctl &= ~E1000_RCTL_SZ_4096; 1981 rctl |= E1000_RCTL_BSEX; 1982 switch (adapter->rx_buffer_len) { 1983 case E1000_RXBUFFER_256: 1984 rctl |= E1000_RCTL_SZ_256; 1985 rctl &= ~E1000_RCTL_BSEX; 1986 break; 1987 case E1000_RXBUFFER_512: 1988 rctl |= E1000_RCTL_SZ_512; 1989 rctl &= ~E1000_RCTL_BSEX; 1990 break; 1991 case E1000_RXBUFFER_1024: 1992 rctl |= E1000_RCTL_SZ_1024; 1993 rctl &= ~E1000_RCTL_BSEX; 1994 break; 1995 case E1000_RXBUFFER_2048: 1996 default: 1997 rctl |= E1000_RCTL_SZ_2048; 1998 rctl &= ~E1000_RCTL_BSEX; 1999 break; 2000 case E1000_RXBUFFER_4096: 2001 rctl |= E1000_RCTL_SZ_4096; 2002 break; 2003 case E1000_RXBUFFER_8192: 2004 rctl |= E1000_RCTL_SZ_8192; 2005 break; 2006 case E1000_RXBUFFER_16384: 2007 rctl |= E1000_RCTL_SZ_16384; 2008 break; 2009 } 2010 2011#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT 2012 /* 82571 and greater support packet-split where the protocol 2013 * header is placed in skb->data and the packet data is 2014 * placed in pages hanging off of skb_shinfo(skb)->nr_frags. 2015 * In the case of a non-split, skb->data is linearly filled, 2016 * followed by the page buffers. Therefore, skb->data is 2017 * sized to hold the largest protocol header. 2018 */ 2019 /* allocations using alloc_page take too long for regular MTU 2020 * so only enable packet split for jumbo frames */ 2021 pages = PAGE_USE_COUNT(adapter->netdev->mtu); 2022 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) && 2023 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE)) 2024 adapter->rx_ps_pages = pages; 2025 else 2026 adapter->rx_ps_pages = 0; 2027#endif 2028 if (adapter->rx_ps_pages) { 2029 /* Configure extra packet-split registers */ 2030 rfctl = E1000_READ_REG(&adapter->hw, RFCTL); 2031 rfctl |= E1000_RFCTL_EXTEN; 2032 /* disable packet split support for IPv6 extension headers, 2033 * because some malformed IPv6 headers can hang the RX */ 2034 rfctl |= (E1000_RFCTL_IPV6_EX_DIS | 2035 E1000_RFCTL_NEW_IPV6_EXT_DIS); 2036 2037 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl); 2038 2039 rctl |= E1000_RCTL_DTYP_PS; 2040 2041 psrctl |= adapter->rx_ps_bsize0 >> 2042 E1000_PSRCTL_BSIZE0_SHIFT; 2043 2044 switch (adapter->rx_ps_pages) { 2045 case 3: 2046 psrctl |= PAGE_SIZE << 2047 E1000_PSRCTL_BSIZE3_SHIFT; 2048 case 2: 2049 psrctl |= PAGE_SIZE << 2050 E1000_PSRCTL_BSIZE2_SHIFT; 2051 case 1: 2052 psrctl |= PAGE_SIZE >> 2053 E1000_PSRCTL_BSIZE1_SHIFT; 2054 break; 2055 } 2056 2057 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl); 2058 } 2059 2060 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 2061} 2062 2063/** 2064 * e1000_configure_rx - Configure 8254x Receive Unit after Reset 2065 * @adapter: board private structure 2066 * 2067 * Configure the Rx unit of the MAC after a reset. 2068 **/ 2069 2070static void 2071e1000_configure_rx(struct e1000_adapter *adapter) 2072{ 2073 uint64_t rdba; 2074 struct e1000_hw *hw = &adapter->hw; 2075 uint32_t rdlen, rctl, rxcsum, ctrl_ext; 2076 2077 if (adapter->rx_ps_pages) { 2078 /* this is a 32 byte descriptor */ 2079 rdlen = adapter->rx_ring[0].count * 2080 sizeof(union e1000_rx_desc_packet_split); 2081 adapter->clean_rx = e1000_clean_rx_irq_ps; 2082 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps; 2083 } else { 2084 rdlen = adapter->rx_ring[0].count * 2085 sizeof(struct e1000_rx_desc); 2086 adapter->clean_rx = e1000_clean_rx_irq; 2087 adapter->alloc_rx_buf = e1000_alloc_rx_buffers; 2088 } 2089 2090 /* disable receives while setting up the descriptors */ 2091 rctl = E1000_READ_REG(hw, RCTL); 2092 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); 2093 2094 /* set the Receive Delay Timer Register */ 2095 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay); 2096 2097 if (hw->mac_type >= e1000_82540) { 2098 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay); 2099 if (adapter->itr_setting != 0) 2100 E1000_WRITE_REG(hw, ITR, 2101 1000000000 / (adapter->itr * 256)); 2102 } 2103 2104 if (hw->mac_type >= e1000_82571) { 2105 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); 2106 /* Reset delay timers after every interrupt */ 2107 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR; 2108#ifdef CONFIG_E1000_NAPI 2109 /* Auto-Mask interrupts upon ICR access */ 2110 ctrl_ext |= E1000_CTRL_EXT_IAME; 2111 E1000_WRITE_REG(hw, IAM, 0xffffffff); 2112#endif 2113 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext); 2114 E1000_WRITE_FLUSH(hw); 2115 } 2116 2117 /* Setup the HW Rx Head and Tail Descriptor Pointers and 2118 * the Base and Length of the Rx Descriptor Ring */ 2119 switch (adapter->num_rx_queues) { 2120 case 1: 2121 default: 2122 rdba = adapter->rx_ring[0].dma; 2123 E1000_WRITE_REG(hw, RDLEN, rdlen); 2124 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32)); 2125 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL)); 2126 E1000_WRITE_REG(hw, RDT, 0); 2127 E1000_WRITE_REG(hw, RDH, 0); 2128 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH); 2129 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT); 2130 break; 2131 } 2132 2133 /* Enable 82543 Receive Checksum Offload for TCP and UDP */ 2134 if (hw->mac_type >= e1000_82543) { 2135 rxcsum = E1000_READ_REG(hw, RXCSUM); 2136 if (adapter->rx_csum == TRUE) { 2137 rxcsum |= E1000_RXCSUM_TUOFL; 2138 2139 /* Enable 82571 IPv4 payload checksum for UDP fragments 2140 * Must be used in conjunction with packet-split. */ 2141 if ((hw->mac_type >= e1000_82571) && 2142 (adapter->rx_ps_pages)) { 2143 rxcsum |= E1000_RXCSUM_IPPCSE; 2144 } 2145 } else { 2146 rxcsum &= ~E1000_RXCSUM_TUOFL; 2147 /* don't need to clear IPPCSE as it defaults to 0 */ 2148 } 2149 E1000_WRITE_REG(hw, RXCSUM, rxcsum); 2150 } 2151 2152 /* enable early receives on 82573, only takes effect if using > 2048 2153 * byte total frame size. for example only for jumbo frames */ 2154#define E1000_ERT_2048 0x100 2155 if (hw->mac_type == e1000_82573) 2156 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048); 2157 2158 /* Enable Receives */ 2159 E1000_WRITE_REG(hw, RCTL, rctl); 2160} 2161 2162/** 2163 * e1000_free_tx_resources - Free Tx Resources per Queue 2164 * @adapter: board private structure 2165 * @tx_ring: Tx descriptor ring for a specific queue 2166 * 2167 * Free all transmit software resources 2168 **/ 2169 2170static void 2171e1000_free_tx_resources(struct e1000_adapter *adapter, 2172 struct e1000_tx_ring *tx_ring) 2173{ 2174 struct pci_dev *pdev = adapter->pdev; 2175 2176 e1000_clean_tx_ring(adapter, tx_ring); 2177 2178 vfree(tx_ring->buffer_info); 2179 tx_ring->buffer_info = NULL; 2180 2181 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); 2182 2183 tx_ring->desc = NULL; 2184} 2185 2186/** 2187 * e1000_free_all_tx_resources - Free Tx Resources for All Queues 2188 * @adapter: board private structure 2189 * 2190 * Free all transmit software resources 2191 **/ 2192 2193void 2194e1000_free_all_tx_resources(struct e1000_adapter *adapter) 2195{ 2196 int i; 2197 2198 for (i = 0; i < adapter->num_tx_queues; i++) 2199 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]); 2200} 2201 2202static void 2203e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter, 2204 struct e1000_buffer *buffer_info) 2205{ 2206 if (buffer_info->dma) { 2207 pci_unmap_page(adapter->pdev, 2208 buffer_info->dma, 2209 buffer_info->length, 2210 PCI_DMA_TODEVICE); 2211 buffer_info->dma = 0; 2212 } 2213 if (buffer_info->skb) { 2214 dev_kfree_skb_any(buffer_info->skb); 2215 buffer_info->skb = NULL; 2216 } 2217 /* buffer_info must be completely set up in the transmit path */ 2218} 2219 2220/** 2221 * e1000_clean_tx_ring - Free Tx Buffers 2222 * @adapter: board private structure 2223 * @tx_ring: ring to be cleaned 2224 **/ 2225 2226static void 2227e1000_clean_tx_ring(struct e1000_adapter *adapter, 2228 struct e1000_tx_ring *tx_ring) 2229{ 2230 struct e1000_buffer *buffer_info; 2231 unsigned long size; 2232 unsigned int i; 2233 2234 /* Free all the Tx ring sk_buffs */ 2235 2236 for (i = 0; i < tx_ring->count; i++) { 2237 buffer_info = &tx_ring->buffer_info[i]; 2238 e1000_unmap_and_free_tx_resource(adapter, buffer_info); 2239 } 2240 2241 size = sizeof(struct e1000_buffer) * tx_ring->count; 2242 memset(tx_ring->buffer_info, 0, size); 2243 2244 /* Zero out the descriptor ring */ 2245 2246 memset(tx_ring->desc, 0, tx_ring->size); 2247 2248 tx_ring->next_to_use = 0; 2249 tx_ring->next_to_clean = 0; 2250 tx_ring->last_tx_tso = 0; 2251 2252 writel(0, adapter->hw.hw_addr + tx_ring->tdh); 2253 writel(0, adapter->hw.hw_addr + tx_ring->tdt); 2254} 2255 2256/** 2257 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues 2258 * @adapter: board private structure 2259 **/ 2260 2261static void 2262e1000_clean_all_tx_rings(struct e1000_adapter *adapter) 2263{ 2264 int i; 2265 2266 for (i = 0; i < adapter->num_tx_queues; i++) 2267 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]); 2268} 2269 2270/** 2271 * e1000_free_rx_resources - Free Rx Resources 2272 * @adapter: board private structure 2273 * @rx_ring: ring to clean the resources from 2274 * 2275 * Free all receive software resources 2276 **/ 2277 2278static void 2279e1000_free_rx_resources(struct e1000_adapter *adapter, 2280 struct e1000_rx_ring *rx_ring) 2281{ 2282 struct pci_dev *pdev = adapter->pdev; 2283 2284 e1000_clean_rx_ring(adapter, rx_ring); 2285 2286 vfree(rx_ring->buffer_info); 2287 rx_ring->buffer_info = NULL; 2288 kfree(rx_ring->ps_page); 2289 rx_ring->ps_page = NULL; 2290 kfree(rx_ring->ps_page_dma); 2291 rx_ring->ps_page_dma = NULL; 2292 2293 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); 2294 2295 rx_ring->desc = NULL; 2296} 2297 2298/** 2299 * e1000_free_all_rx_resources - Free Rx Resources for All Queues 2300 * @adapter: board private structure 2301 * 2302 * Free all receive software resources 2303 **/ 2304 2305void 2306e1000_free_all_rx_resources(struct e1000_adapter *adapter) 2307{ 2308 int i; 2309 2310 for (i = 0; i < adapter->num_rx_queues; i++) 2311 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]); 2312} 2313 2314/** 2315 * e1000_clean_rx_ring - Free Rx Buffers per Queue 2316 * @adapter: board private structure 2317 * @rx_ring: ring to free buffers from 2318 **/ 2319 2320static void 2321e1000_clean_rx_ring(struct e1000_adapter *adapter, 2322 struct e1000_rx_ring *rx_ring) 2323{ 2324 struct e1000_buffer *buffer_info; 2325 struct e1000_ps_page *ps_page; 2326 struct e1000_ps_page_dma *ps_page_dma; 2327 struct pci_dev *pdev = adapter->pdev; 2328 unsigned long size; 2329 unsigned int i, j; 2330 2331 /* Free all the Rx ring sk_buffs */ 2332 for (i = 0; i < rx_ring->count; i++) { 2333 buffer_info = &rx_ring->buffer_info[i]; 2334 if (buffer_info->skb) { 2335 pci_unmap_single(pdev, 2336 buffer_info->dma, 2337 buffer_info->length, 2338 PCI_DMA_FROMDEVICE); 2339 2340 dev_kfree_skb(buffer_info->skb); 2341 buffer_info->skb = NULL; 2342 } 2343 ps_page = &rx_ring->ps_page[i]; 2344 ps_page_dma = &rx_ring->ps_page_dma[i]; 2345 for (j = 0; j < adapter->rx_ps_pages; j++) { 2346 if (!ps_page->ps_page[j]) break; 2347 pci_unmap_page(pdev, 2348 ps_page_dma->ps_page_dma[j], 2349 PAGE_SIZE, PCI_DMA_FROMDEVICE); 2350 ps_page_dma->ps_page_dma[j] = 0; 2351 put_page(ps_page->ps_page[j]); 2352 ps_page->ps_page[j] = NULL; 2353 } 2354 } 2355 2356 size = sizeof(struct e1000_buffer) * rx_ring->count; 2357 memset(rx_ring->buffer_info, 0, size); 2358 size = sizeof(struct e1000_ps_page) * rx_ring->count; 2359 memset(rx_ring->ps_page, 0, size); 2360 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count; 2361 memset(rx_ring->ps_page_dma, 0, size); 2362 2363 /* Zero out the descriptor ring */ 2364 2365 memset(rx_ring->desc, 0, rx_ring->size); 2366 2367 rx_ring->next_to_clean = 0; 2368 rx_ring->next_to_use = 0; 2369 2370 writel(0, adapter->hw.hw_addr + rx_ring->rdh); 2371 writel(0, adapter->hw.hw_addr + rx_ring->rdt); 2372} 2373 2374/** 2375 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues 2376 * @adapter: board private structure 2377 **/ 2378 2379static void 2380e1000_clean_all_rx_rings(struct e1000_adapter *adapter) 2381{ 2382 int i; 2383 2384 for (i = 0; i < adapter->num_rx_queues; i++) 2385 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]); 2386} 2387 2388/* The 82542 2.0 (revision 2) needs to have the receive unit in reset 2389 * and memory write and invalidate disabled for certain operations 2390 */ 2391static void 2392e1000_enter_82542_rst(struct e1000_adapter *adapter) 2393{ 2394 struct net_device *netdev = adapter->netdev; 2395 uint32_t rctl; 2396 2397 e1000_pci_clear_mwi(&adapter->hw); 2398 2399 rctl = E1000_READ_REG(&adapter->hw, RCTL); 2400 rctl |= E1000_RCTL_RST; 2401 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 2402 E1000_WRITE_FLUSH(&adapter->hw); 2403 mdelay(5); 2404 2405 if (netif_running(netdev)) 2406 e1000_clean_all_rx_rings(adapter); 2407} 2408 2409static void 2410e1000_leave_82542_rst(struct e1000_adapter *adapter) 2411{ 2412 struct net_device *netdev = adapter->netdev; 2413 uint32_t rctl; 2414 2415 rctl = E1000_READ_REG(&adapter->hw, RCTL); 2416 rctl &= ~E1000_RCTL_RST; 2417 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 2418 E1000_WRITE_FLUSH(&adapter->hw); 2419 mdelay(5); 2420 2421 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE) 2422 e1000_pci_set_mwi(&adapter->hw); 2423 2424 if (netif_running(netdev)) { 2425 /* No need to loop, because 82542 supports only 1 queue */ 2426 struct e1000_rx_ring *ring = &adapter->rx_ring[0]; 2427 e1000_configure_rx(adapter); 2428 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring)); 2429 } 2430} 2431 2432/** 2433 * e1000_set_mac - Change the Ethernet Address of the NIC 2434 * @netdev: network interface device structure 2435 * @p: pointer to an address structure 2436 * 2437 * Returns 0 on success, negative on failure 2438 **/ 2439 2440static int 2441e1000_set_mac(struct net_device *netdev, void *p) 2442{ 2443 struct e1000_adapter *adapter = netdev_priv(netdev); 2444 struct sockaddr *addr = p; 2445 2446 if (!is_valid_ether_addr(addr->sa_data)) 2447 return -EADDRNOTAVAIL; 2448 2449 /* 82542 2.0 needs to be in reset to write receive address registers */ 2450 2451 if (adapter->hw.mac_type == e1000_82542_rev2_0) 2452 e1000_enter_82542_rst(adapter); 2453 2454 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 2455 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len); 2456 2457 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); 2458 2459 /* With 82571 controllers, LAA may be overwritten (with the default) 2460 * due to controller reset from the other port. */ 2461 if (adapter->hw.mac_type == e1000_82571) { 2462 /* activate the work around */ 2463 adapter->hw.laa_is_present = 1; 2464 2465 /* Hold a copy of the LAA in RAR[14] This is done so that 2466 * between the time RAR[0] gets clobbered and the time it 2467 * gets fixed (in e1000_watchdog), the actual LAA is in one 2468 * of the RARs and no incoming packets directed to this port 2469 * are dropped. Eventaully the LAA will be in RAR[0] and 2470 * RAR[14] */ 2471 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 2472 E1000_RAR_ENTRIES - 1); 2473 } 2474 2475 if (adapter->hw.mac_type == e1000_82542_rev2_0) 2476 e1000_leave_82542_rst(adapter); 2477 2478 return 0; 2479} 2480 2481/** 2482 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set 2483 * @netdev: network interface device structure 2484 * 2485 * The set_rx_mode entry point is called whenever the unicast or multicast 2486 * address lists or the network interface flags are updated. This routine is 2487 * responsible for configuring the hardware for proper unicast, multicast, 2488 * promiscuous mode, and all-multi behavior. 2489 **/ 2490 2491static void 2492e1000_set_rx_mode(struct net_device *netdev) 2493{ 2494 struct e1000_adapter *adapter = netdev_priv(netdev); 2495 struct e1000_hw *hw = &adapter->hw; 2496 struct dev_addr_list *uc_ptr; 2497 struct dev_addr_list *mc_ptr; 2498 uint32_t rctl; 2499 uint32_t hash_value; 2500 int i, rar_entries = E1000_RAR_ENTRIES; 2501 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ? 2502 E1000_NUM_MTA_REGISTERS_ICH8LAN : 2503 E1000_NUM_MTA_REGISTERS; 2504 2505 if (adapter->hw.mac_type == e1000_ich8lan) 2506 rar_entries = E1000_RAR_ENTRIES_ICH8LAN; 2507 2508 /* reserve RAR[14] for LAA over-write work-around */ 2509 if (adapter->hw.mac_type == e1000_82571) 2510 rar_entries--; 2511 2512 /* Check for Promiscuous and All Multicast modes */ 2513 2514 rctl = E1000_READ_REG(hw, RCTL); 2515 2516 if (netdev->flags & IFF_PROMISC) { 2517 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); 2518 } else if (netdev->flags & IFF_ALLMULTI) { 2519 rctl |= E1000_RCTL_MPE; 2520 } else { 2521 rctl &= ~E1000_RCTL_MPE; 2522 } 2523 2524 uc_ptr = NULL; 2525 if (netdev->uc_count > rar_entries - 1) { 2526 rctl |= E1000_RCTL_UPE; 2527 } else if (!(netdev->flags & IFF_PROMISC)) { 2528 rctl &= ~E1000_RCTL_UPE; 2529 uc_ptr = netdev->uc_list; 2530 } 2531 2532 E1000_WRITE_REG(hw, RCTL, rctl); 2533 2534 /* 82542 2.0 needs to be in reset to write receive address registers */ 2535 2536 if (hw->mac_type == e1000_82542_rev2_0) 2537 e1000_enter_82542_rst(adapter); 2538 2539 /* load the first 14 addresses into the exact filters 1-14. Unicast 2540 * addresses take precedence to avoid disabling unicast filtering 2541 * when possible. 2542 * 2543 * RAR 0 is used for the station MAC adddress 2544 * if there are not 14 addresses, go ahead and clear the filters 2545 * -- with 82571 controllers only 0-13 entries are filled here 2546 */ 2547 mc_ptr = netdev->mc_list; 2548 2549 for (i = 1; i < rar_entries; i++) { 2550 if (uc_ptr) { 2551 e1000_rar_set(hw, uc_ptr->da_addr, i); 2552 uc_ptr = uc_ptr->next; 2553 } else if (mc_ptr) { 2554 e1000_rar_set(hw, mc_ptr->da_addr, i); 2555 mc_ptr = mc_ptr->next; 2556 } else { 2557 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0); 2558 E1000_WRITE_FLUSH(hw); 2559 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0); 2560 E1000_WRITE_FLUSH(hw); 2561 } 2562 } 2563 WARN_ON(uc_ptr != NULL); 2564 2565 /* clear the old settings from the multicast hash table */ 2566 2567 for (i = 0; i < mta_reg_count; i++) { 2568 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0); 2569 E1000_WRITE_FLUSH(hw); 2570 } 2571 2572 /* load any remaining addresses into the hash table */ 2573 2574 for (; mc_ptr; mc_ptr = mc_ptr->next) { 2575 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr); 2576 e1000_mta_set(hw, hash_value); 2577 } 2578 2579 if (hw->mac_type == e1000_82542_rev2_0) 2580 e1000_leave_82542_rst(adapter); 2581} 2582 2583/* Need to wait a few seconds after link up to get diagnostic information from 2584 * the phy */ 2585 2586static void 2587e1000_update_phy_info(unsigned long data) 2588{ 2589 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 2590 e1000_phy_get_info(&adapter->hw, &adapter->phy_info); 2591} 2592 2593/** 2594 * e1000_82547_tx_fifo_stall - Timer Call-back 2595 * @data: pointer to adapter cast into an unsigned long 2596 **/ 2597 2598static void 2599e1000_82547_tx_fifo_stall(unsigned long data) 2600{ 2601 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 2602 struct net_device *netdev = adapter->netdev; 2603 uint32_t tctl; 2604 2605 if (atomic_read(&adapter->tx_fifo_stall)) { 2606 if ((E1000_READ_REG(&adapter->hw, TDT) == 2607 E1000_READ_REG(&adapter->hw, TDH)) && 2608 (E1000_READ_REG(&adapter->hw, TDFT) == 2609 E1000_READ_REG(&adapter->hw, TDFH)) && 2610 (E1000_READ_REG(&adapter->hw, TDFTS) == 2611 E1000_READ_REG(&adapter->hw, TDFHS))) { 2612 tctl = E1000_READ_REG(&adapter->hw, TCTL); 2613 E1000_WRITE_REG(&adapter->hw, TCTL, 2614 tctl & ~E1000_TCTL_EN); 2615 E1000_WRITE_REG(&adapter->hw, TDFT, 2616 adapter->tx_head_addr); 2617 E1000_WRITE_REG(&adapter->hw, TDFH, 2618 adapter->tx_head_addr); 2619 E1000_WRITE_REG(&adapter->hw, TDFTS, 2620 adapter->tx_head_addr); 2621 E1000_WRITE_REG(&adapter->hw, TDFHS, 2622 adapter->tx_head_addr); 2623 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 2624 E1000_WRITE_FLUSH(&adapter->hw); 2625 2626 adapter->tx_fifo_head = 0; 2627 atomic_set(&adapter->tx_fifo_stall, 0); 2628 netif_wake_queue(netdev); 2629 } else { 2630 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); 2631 } 2632 } 2633} 2634 2635/** 2636 * e1000_watchdog - Timer Call-back 2637 * @data: pointer to adapter cast into an unsigned long 2638 **/ 2639static void 2640e1000_watchdog(unsigned long data) 2641{ 2642 struct e1000_adapter *adapter = (struct e1000_adapter *) data; 2643 struct net_device *netdev = adapter->netdev; 2644 struct e1000_tx_ring *txdr = adapter->tx_ring; 2645 uint32_t link, tctl; 2646 int32_t ret_val; 2647 2648 ret_val = e1000_check_for_link(&adapter->hw); 2649 if ((ret_val == E1000_ERR_PHY) && 2650 (adapter->hw.phy_type == e1000_phy_igp_3) && 2651 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) { 2652 /* See e1000_kumeran_lock_loss_workaround() */ 2653 DPRINTK(LINK, INFO, 2654 "Gigabit has been disabled, downgrading speed\n"); 2655 } 2656 2657 if (adapter->hw.mac_type == e1000_82573) { 2658 e1000_enable_tx_pkt_filtering(&adapter->hw); 2659 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id) 2660 e1000_update_mng_vlan(adapter); 2661 } 2662 2663 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) && 2664 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE)) 2665 link = !adapter->hw.serdes_link_down; 2666 else 2667 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU; 2668 2669 if (link) { 2670 if (!netif_carrier_ok(netdev)) { 2671 uint32_t ctrl; 2672 boolean_t txb2b = 1; 2673 e1000_get_speed_and_duplex(&adapter->hw, 2674 &adapter->link_speed, 2675 &adapter->link_duplex); 2676 2677 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 2678 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, " 2679 "Flow Control: %s\n", 2680 adapter->link_speed, 2681 adapter->link_duplex == FULL_DUPLEX ? 2682 "Full Duplex" : "Half Duplex", 2683 ((ctrl & E1000_CTRL_TFCE) && (ctrl & 2684 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & 2685 E1000_CTRL_RFCE) ? "RX" : ((ctrl & 2686 E1000_CTRL_TFCE) ? "TX" : "None" ))); 2687 2688 /* tweak tx_queue_len according to speed/duplex 2689 * and adjust the timeout factor */ 2690 netdev->tx_queue_len = adapter->tx_queue_len; 2691 adapter->tx_timeout_factor = 1; 2692 switch (adapter->link_speed) { 2693 case SPEED_10: 2694 txb2b = 0; 2695 netdev->tx_queue_len = 10; 2696 adapter->tx_timeout_factor = 8; 2697 break; 2698 case SPEED_100: 2699 txb2b = 0; 2700 netdev->tx_queue_len = 100; 2701 /* maybe add some timeout factor ? */ 2702 break; 2703 } 2704 2705 if ((adapter->hw.mac_type == e1000_82571 || 2706 adapter->hw.mac_type == e1000_82572) && 2707 txb2b == 0) { 2708 uint32_t tarc0; 2709 tarc0 = E1000_READ_REG(&adapter->hw, TARC0); 2710 tarc0 &= ~(1 << 21); 2711 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0); 2712 } 2713 2714 /* disable TSO for pcie and 10/100 speeds, to avoid 2715 * some hardware issues */ 2716 if (!adapter->tso_force && 2717 adapter->hw.bus_type == e1000_bus_type_pci_express){ 2718 switch (adapter->link_speed) { 2719 case SPEED_10: 2720 case SPEED_100: 2721 DPRINTK(PROBE,INFO, 2722 "10/100 speed: disabling TSO\n"); 2723 netdev->features &= ~NETIF_F_TSO; 2724 netdev->features &= ~NETIF_F_TSO6; 2725 break; 2726 case SPEED_1000: 2727 netdev->features |= NETIF_F_TSO; 2728 netdev->features |= NETIF_F_TSO6; 2729 break; 2730 default: 2731 /* oops */ 2732 break; 2733 } 2734 } 2735 2736 /* enable transmits in the hardware, need to do this 2737 * after setting TARC0 */ 2738 tctl = E1000_READ_REG(&adapter->hw, TCTL); 2739 tctl |= E1000_TCTL_EN; 2740 E1000_WRITE_REG(&adapter->hw, TCTL, tctl); 2741 2742 netif_carrier_on(netdev); 2743 netif_wake_queue(netdev); 2744 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); 2745 adapter->smartspeed = 0; 2746 } else { 2747 /* make sure the receive unit is started */ 2748 if (adapter->hw.rx_needs_kicking) { 2749 struct e1000_hw *hw = &adapter->hw; 2750 uint32_t rctl = E1000_READ_REG(hw, RCTL); 2751 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN); 2752 } 2753 } 2754 } else { 2755 if (netif_carrier_ok(netdev)) { 2756 adapter->link_speed = 0; 2757 adapter->link_duplex = 0; 2758 DPRINTK(LINK, INFO, "NIC Link is Down\n"); 2759 netif_carrier_off(netdev); 2760 netif_stop_queue(netdev); 2761 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ)); 2762 2763 /* 80003ES2LAN workaround-- 2764 * For packet buffer work-around on link down event; 2765 * disable receives in the ISR and 2766 * reset device here in the watchdog 2767 */ 2768 if (adapter->hw.mac_type == e1000_80003es2lan) 2769 /* reset device */ 2770 schedule_work(&adapter->reset_task); 2771 } 2772 2773 e1000_smartspeed(adapter); 2774 } 2775 2776 e1000_update_stats(adapter); 2777 2778 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 2779 adapter->tpt_old = adapter->stats.tpt; 2780 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old; 2781 adapter->colc_old = adapter->stats.colc; 2782 2783 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old; 2784 adapter->gorcl_old = adapter->stats.gorcl; 2785 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old; 2786 adapter->gotcl_old = adapter->stats.gotcl; 2787 2788 e1000_update_adaptive(&adapter->hw); 2789 2790 if (!netif_carrier_ok(netdev)) { 2791 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) { 2792 /* We've lost link, so the controller stops DMA, 2793 * but we've got queued Tx work that's never going 2794 * to get done, so reset controller to flush Tx. 2795 * (Do the reset outside of interrupt context). */ 2796 adapter->tx_timeout_count++; 2797 schedule_work(&adapter->reset_task); 2798 } 2799 } 2800 2801 /* Cause software interrupt to ensure rx ring is cleaned */ 2802 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); 2803 2804 /* Force detection of hung controller every watchdog period */ 2805 adapter->detect_tx_hung = TRUE; 2806 2807 /* With 82571 controllers, LAA may be overwritten due to controller 2808 * reset from the other port. Set the appropriate LAA in RAR[0] */ 2809 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present) 2810 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0); 2811 2812 /* Reset the timer */ 2813 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ)); 2814} 2815 2816enum latency_range { 2817 lowest_latency = 0, 2818 low_latency = 1, 2819 bulk_latency = 2, 2820 latency_invalid = 255 2821}; 2822 2823/** 2824 * e1000_update_itr - update the dynamic ITR value based on statistics 2825 * Stores a new ITR value based on packets and byte 2826 * counts during the last interrupt. The advantage of per interrupt 2827 * computation is faster updates and more accurate ITR for the current 2828 * traffic pattern. Constants in this function were computed 2829 * based on theoretical maximum wire speed and thresholds were set based 2830 * on testing data as well as attempting to minimize response time 2831 * while increasing bulk throughput. 2832 * this functionality is controlled by the InterruptThrottleRate module 2833 * parameter (see e1000_param.c) 2834 * @adapter: pointer to adapter 2835 * @itr_setting: current adapter->itr 2836 * @packets: the number of packets during this measurement interval 2837 * @bytes: the number of bytes during this measurement interval 2838 **/ 2839static unsigned int e1000_update_itr(struct e1000_adapter *adapter, 2840 uint16_t itr_setting, 2841 int packets, 2842 int bytes) 2843{ 2844 unsigned int retval = itr_setting; 2845 struct e1000_hw *hw = &adapter->hw; 2846 2847 if (unlikely(hw->mac_type < e1000_82540)) 2848 goto update_itr_done; 2849 2850 if (packets == 0) 2851 goto update_itr_done; 2852 2853 switch (itr_setting) { 2854 case lowest_latency: 2855 /* jumbo frames get bulk treatment*/ 2856 if (bytes/packets > 8000) 2857 retval = bulk_latency; 2858 else if ((packets < 5) && (bytes > 512)) 2859 retval = low_latency; 2860 break; 2861 case low_latency: /* 50 usec aka 20000 ints/s */ 2862 if (bytes > 10000) { 2863 /* jumbo frames need bulk latency setting */ 2864 if (bytes/packets > 8000) 2865 retval = bulk_latency; 2866 else if ((packets < 10) || ((bytes/packets) > 1200)) 2867 retval = bulk_latency; 2868 else if ((packets > 35)) 2869 retval = lowest_latency; 2870 } else if (bytes/packets > 2000) 2871 retval = bulk_latency; 2872 else if (packets <= 2 && bytes < 512) 2873 retval = lowest_latency; 2874 break; 2875 case bulk_latency: /* 250 usec aka 4000 ints/s */ 2876 if (bytes > 25000) { 2877 if (packets > 35) 2878 retval = low_latency; 2879 } else if (bytes < 6000) { 2880 retval = low_latency; 2881 } 2882 break; 2883 } 2884 2885update_itr_done: 2886 return retval; 2887} 2888 2889static void e1000_set_itr(struct e1000_adapter *adapter) 2890{ 2891 struct e1000_hw *hw = &adapter->hw; 2892 uint16_t current_itr; 2893 uint32_t new_itr = adapter->itr; 2894 2895 if (unlikely(hw->mac_type < e1000_82540)) 2896 return; 2897 2898 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ 2899 if (unlikely(adapter->link_speed != SPEED_1000)) { 2900 current_itr = 0; 2901 new_itr = 4000; 2902 goto set_itr_now; 2903 } 2904 2905 adapter->tx_itr = e1000_update_itr(adapter, 2906 adapter->tx_itr, 2907 adapter->total_tx_packets, 2908 adapter->total_tx_bytes); 2909 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2910 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency) 2911 adapter->tx_itr = low_latency; 2912 2913 adapter->rx_itr = e1000_update_itr(adapter, 2914 adapter->rx_itr, 2915 adapter->total_rx_packets, 2916 adapter->total_rx_bytes); 2917 /* conservative mode (itr 3) eliminates the lowest_latency setting */ 2918 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) 2919 adapter->rx_itr = low_latency; 2920 2921 current_itr = max(adapter->rx_itr, adapter->tx_itr); 2922 2923 switch (current_itr) { 2924 /* counts and packets in update_itr are dependent on these numbers */ 2925 case lowest_latency: 2926 new_itr = 70000; 2927 break; 2928 case low_latency: 2929 new_itr = 20000; /* aka hwitr = ~200 */ 2930 break; 2931 case bulk_latency: 2932 new_itr = 4000; 2933 break; 2934 default: 2935 break; 2936 } 2937 2938set_itr_now: 2939 if (new_itr != adapter->itr) { 2940 /* this attempts to bias the interrupt rate towards Bulk 2941 * by adding intermediate steps when interrupt rate is 2942 * increasing */ 2943 new_itr = new_itr > adapter->itr ? 2944 min(adapter->itr + (new_itr >> 2), new_itr) : 2945 new_itr; 2946 adapter->itr = new_itr; 2947 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256)); 2948 } 2949 2950 return; 2951} 2952 2953#define E1000_TX_FLAGS_CSUM 0x00000001 2954#define E1000_TX_FLAGS_VLAN 0x00000002 2955#define E1000_TX_FLAGS_TSO 0x00000004 2956#define E1000_TX_FLAGS_IPV4 0x00000008 2957#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 2958#define E1000_TX_FLAGS_VLAN_SHIFT 16 2959 2960static int 2961e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, 2962 struct sk_buff *skb) 2963{ 2964 struct e1000_context_desc *context_desc; 2965 struct e1000_buffer *buffer_info; 2966 unsigned int i; 2967 uint32_t cmd_length = 0; 2968 uint16_t ipcse = 0, tucse, mss; 2969 uint8_t ipcss, ipcso, tucss, tucso, hdr_len; 2970 int err; 2971 2972 if (skb_is_gso(skb)) { 2973 if (skb_header_cloned(skb)) { 2974 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 2975 if (err) 2976 return err; 2977 } 2978 2979 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 2980 mss = skb_shinfo(skb)->gso_size; 2981 if (skb->protocol == htons(ETH_P_IP)) { 2982 struct iphdr *iph = ip_hdr(skb); 2983 iph->tot_len = 0; 2984 iph->check = 0; 2985 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, 2986 iph->daddr, 0, 2987 IPPROTO_TCP, 2988 0); 2989 cmd_length = E1000_TXD_CMD_IP; 2990 ipcse = skb_transport_offset(skb) - 1; 2991 } else if (skb->protocol == htons(ETH_P_IPV6)) { 2992 ipv6_hdr(skb)->payload_len = 0; 2993 tcp_hdr(skb)->check = 2994 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, 2995 &ipv6_hdr(skb)->daddr, 2996 0, IPPROTO_TCP, 0); 2997 ipcse = 0; 2998 } 2999 ipcss = skb_network_offset(skb); 3000 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data; 3001 tucss = skb_transport_offset(skb); 3002 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data; 3003 tucse = 0; 3004 3005 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE | 3006 E1000_TXD_CMD_TCP | (skb->len - (hdr_len))); 3007 3008 i = tx_ring->next_to_use; 3009 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 3010 buffer_info = &tx_ring->buffer_info[i]; 3011 3012 context_desc->lower_setup.ip_fields.ipcss = ipcss; 3013 context_desc->lower_setup.ip_fields.ipcso = ipcso; 3014 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse); 3015 context_desc->upper_setup.tcp_fields.tucss = tucss; 3016 context_desc->upper_setup.tcp_fields.tucso = tucso; 3017 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse); 3018 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss); 3019 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len; 3020 context_desc->cmd_and_length = cpu_to_le32(cmd_length); 3021 3022 buffer_info->time_stamp = jiffies; 3023 buffer_info->next_to_watch = i; 3024 3025 if (++i == tx_ring->count) i = 0; 3026 tx_ring->next_to_use = i; 3027 3028 return TRUE; 3029 } 3030 return FALSE; 3031} 3032 3033static boolean_t 3034e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, 3035 struct sk_buff *skb) 3036{ 3037 struct e1000_context_desc *context_desc; 3038 struct e1000_buffer *buffer_info; 3039 unsigned int i; 3040 uint8_t css; 3041 3042 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { 3043 css = skb_transport_offset(skb); 3044 3045 i = tx_ring->next_to_use; 3046 buffer_info = &tx_ring->buffer_info[i]; 3047 context_desc = E1000_CONTEXT_DESC(*tx_ring, i); 3048 3049 context_desc->lower_setup.ip_config = 0; 3050 context_desc->upper_setup.tcp_fields.tucss = css; 3051 context_desc->upper_setup.tcp_fields.tucso = 3052 css + skb->csum_offset; 3053 context_desc->upper_setup.tcp_fields.tucse = 0; 3054 context_desc->tcp_seg_setup.data = 0; 3055 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT); 3056 3057 buffer_info->time_stamp = jiffies; 3058 buffer_info->next_to_watch = i; 3059 3060 if (unlikely(++i == tx_ring->count)) i = 0; 3061 tx_ring->next_to_use = i; 3062 3063 return TRUE; 3064 } 3065 3066 return FALSE; 3067} 3068 3069#define E1000_MAX_TXD_PWR 12 3070#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR) 3071 3072static int 3073e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, 3074 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd, 3075 unsigned int nr_frags, unsigned int mss) 3076{ 3077 struct e1000_buffer *buffer_info; 3078 unsigned int len = skb->len; 3079 unsigned int offset = 0, size, count = 0, i; 3080 unsigned int f; 3081 len -= skb->data_len; 3082 3083 i = tx_ring->next_to_use; 3084 3085 while (len) { 3086 buffer_info = &tx_ring->buffer_info[i]; 3087 size = min(len, max_per_txd); 3088 /* Workaround for Controller erratum -- 3089 * descriptor for non-tso packet in a linear SKB that follows a 3090 * tso gets written back prematurely before the data is fully 3091 * DMA'd to the controller */ 3092 if (!skb->data_len && tx_ring->last_tx_tso && 3093 !skb_is_gso(skb)) { 3094 tx_ring->last_tx_tso = 0; 3095 size -= 4; 3096 } 3097 3098 /* Workaround for premature desc write-backs 3099 * in TSO mode. Append 4-byte sentinel desc */ 3100 if (unlikely(mss && !nr_frags && size == len && size > 8)) 3101 size -= 4; 3102 /* work-around for errata 10 and it applies 3103 * to all controllers in PCI-X mode 3104 * The fix is to make sure that the first descriptor of a 3105 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes 3106 */ 3107 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && 3108 (size > 2015) && count == 0)) 3109 size = 2015; 3110 3111 /* Workaround for potential 82544 hang in PCI-X. Avoid 3112 * terminating buffers within evenly-aligned dwords. */ 3113 if (unlikely(adapter->pcix_82544 && 3114 !((unsigned long)(skb->data + offset + size - 1) & 4) && 3115 size > 4)) 3116 size -= 4; 3117 3118 buffer_info->length = size; 3119 buffer_info->dma = 3120 pci_map_single(adapter->pdev, 3121 skb->data + offset, 3122 size, 3123 PCI_DMA_TODEVICE); 3124 buffer_info->time_stamp = jiffies; 3125 buffer_info->next_to_watch = i; 3126 3127 len -= size; 3128 offset += size; 3129 count++; 3130 if (unlikely(++i == tx_ring->count)) i = 0; 3131 } 3132 3133 for (f = 0; f < nr_frags; f++) { 3134 struct skb_frag_struct *frag; 3135 3136 frag = &skb_shinfo(skb)->frags[f]; 3137 len = frag->size; 3138 offset = frag->page_offset; 3139 3140 while (len) { 3141 buffer_info = &tx_ring->buffer_info[i]; 3142 size = min(len, max_per_txd); 3143 /* Workaround for premature desc write-backs 3144 * in TSO mode. Append 4-byte sentinel desc */ 3145 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8)) 3146 size -= 4; 3147 /* Workaround for potential 82544 hang in PCI-X. 3148 * Avoid terminating buffers within evenly-aligned 3149 * dwords. */ 3150 if (unlikely(adapter->pcix_82544 && 3151 !((unsigned long)(frag->page+offset+size-1) & 4) && 3152 size > 4)) 3153 size -= 4; 3154 3155 buffer_info->length = size; 3156 buffer_info->dma = 3157 pci_map_page(adapter->pdev, 3158 frag->page, 3159 offset, 3160 size, 3161 PCI_DMA_TODEVICE); 3162 buffer_info->time_stamp = jiffies; 3163 buffer_info->next_to_watch = i; 3164 3165 len -= size; 3166 offset += size; 3167 count++; 3168 if (unlikely(++i == tx_ring->count)) i = 0; 3169 } 3170 } 3171 3172 i = (i == 0) ? tx_ring->count - 1 : i - 1; 3173 tx_ring->buffer_info[i].skb = skb; 3174 tx_ring->buffer_info[first].next_to_watch = i; 3175 3176 return count; 3177} 3178 3179static void 3180e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, 3181 int tx_flags, int count) 3182{ 3183 struct e1000_tx_desc *tx_desc = NULL; 3184 struct e1000_buffer *buffer_info; 3185 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS; 3186 unsigned int i; 3187 3188 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) { 3189 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D | 3190 E1000_TXD_CMD_TSE; 3191 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3192 3193 if (likely(tx_flags & E1000_TX_FLAGS_IPV4)) 3194 txd_upper |= E1000_TXD_POPTS_IXSM << 8; 3195 } 3196 3197 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) { 3198 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D; 3199 txd_upper |= E1000_TXD_POPTS_TXSM << 8; 3200 } 3201 3202 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) { 3203 txd_lower |= E1000_TXD_CMD_VLE; 3204 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK); 3205 } 3206 3207 i = tx_ring->next_to_use; 3208 3209 while (count--) { 3210 buffer_info = &tx_ring->buffer_info[i]; 3211 tx_desc = E1000_TX_DESC(*tx_ring, i); 3212 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 3213 tx_desc->lower.data = 3214 cpu_to_le32(txd_lower | buffer_info->length); 3215 tx_desc->upper.data = cpu_to_le32(txd_upper); 3216 if (unlikely(++i == tx_ring->count)) i = 0; 3217 } 3218 3219 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd); 3220 3221 /* Force memory writes to complete before letting h/w 3222 * know there are new descriptors to fetch. (Only 3223 * applicable for weak-ordered memory model archs, 3224 * such as IA-64). */ 3225 wmb(); 3226 3227 tx_ring->next_to_use = i; 3228 writel(i, adapter->hw.hw_addr + tx_ring->tdt); 3229 /* we need this if more than one processor can write to our tail 3230 * at a time, it syncronizes IO on IA64/Altix systems */ 3231 mmiowb(); 3232} 3233 3234/** 3235 * 82547 workaround to avoid controller hang in half-duplex environment. 3236 * The workaround is to avoid queuing a large packet that would span 3237 * the internal Tx FIFO ring boundary by notifying the stack to resend 3238 * the packet at a later time. This gives the Tx FIFO an opportunity to 3239 * flush all packets. When that occurs, we reset the Tx FIFO pointers 3240 * to the beginning of the Tx FIFO. 3241 **/ 3242 3243#define E1000_FIFO_HDR 0x10 3244#define E1000_82547_PAD_LEN 0x3E0 3245 3246static int 3247e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb) 3248{ 3249 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head; 3250 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR; 3251 3252 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR); 3253 3254 if (adapter->link_duplex != HALF_DUPLEX) 3255 goto no_fifo_stall_required; 3256 3257 if (atomic_read(&adapter->tx_fifo_stall)) 3258 return 1; 3259 3260 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) { 3261 atomic_set(&adapter->tx_fifo_stall, 1); 3262 return 1; 3263 } 3264 3265no_fifo_stall_required: 3266 adapter->tx_fifo_head += skb_fifo_len; 3267 if (adapter->tx_fifo_head >= adapter->tx_fifo_size) 3268 adapter->tx_fifo_head -= adapter->tx_fifo_size; 3269 return 0; 3270} 3271 3272#define MINIMUM_DHCP_PACKET_SIZE 282 3273static int 3274e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) 3275{ 3276 struct e1000_hw *hw = &adapter->hw; 3277 uint16_t length, offset; 3278 if (vlan_tx_tag_present(skb)) { 3279 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) && 3280 ( adapter->hw.mng_cookie.status & 3281 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) ) 3282 return 0; 3283 } 3284 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) { 3285 struct ethhdr *eth = (struct ethhdr *) skb->data; 3286 if ((htons(ETH_P_IP) == eth->h_proto)) { 3287 const struct iphdr *ip = 3288 (struct iphdr *)((uint8_t *)skb->data+14); 3289 if (IPPROTO_UDP == ip->protocol) { 3290 struct udphdr *udp = 3291 (struct udphdr *)((uint8_t *)ip + 3292 (ip->ihl << 2)); 3293 if (ntohs(udp->dest) == 67) { 3294 offset = (uint8_t *)udp + 8 - skb->data; 3295 length = skb->len - offset; 3296 3297 return e1000_mng_write_dhcp_info(hw, 3298 (uint8_t *)udp + 8, 3299 length); 3300 } 3301 } 3302 } 3303 } 3304 return 0; 3305} 3306 3307static int __e1000_maybe_stop_tx(struct net_device *netdev, int size) 3308{ 3309 struct e1000_adapter *adapter = netdev_priv(netdev); 3310 struct e1000_tx_ring *tx_ring = adapter->tx_ring; 3311 3312 netif_stop_queue(netdev); 3313 /* Herbert's original patch had: 3314 * smp_mb__after_netif_stop_queue(); 3315 * but since that doesn't exist yet, just open code it. */ 3316 smp_mb(); 3317 3318 /* We need to check again in a case another CPU has just 3319 * made room available. */ 3320 if (likely(E1000_DESC_UNUSED(tx_ring) < size)) 3321 return -EBUSY; 3322 3323 /* A reprieve! */ 3324 netif_start_queue(netdev); 3325 ++adapter->restart_queue; 3326 return 0; 3327} 3328 3329static int e1000_maybe_stop_tx(struct net_device *netdev, 3330 struct e1000_tx_ring *tx_ring, int size) 3331{ 3332 if (likely(E1000_DESC_UNUSED(tx_ring) >= size)) 3333 return 0; 3334 return __e1000_maybe_stop_tx(netdev, size); 3335} 3336 3337#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 ) 3338static int 3339e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 3340{ 3341 struct e1000_adapter *adapter = netdev_priv(netdev); 3342 struct e1000_tx_ring *tx_ring; 3343 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; 3344 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; 3345 unsigned int tx_flags = 0; 3346 unsigned int len = skb->len - skb->data_len; 3347 unsigned long flags; 3348 unsigned int nr_frags; 3349 unsigned int mss; 3350 int count = 0; 3351 int tso; 3352 unsigned int f; 3353 3354 /* This goes back to the question of how to logically map a tx queue 3355 * to a flow. Right now, performance is impacted slightly negatively 3356 * if using multiple tx queues. If the stack breaks away from a 3357 * single qdisc implementation, we can look at this again. */ 3358 tx_ring = adapter->tx_ring; 3359 3360 if (unlikely(skb->len <= 0)) { 3361 dev_kfree_skb_any(skb); 3362 return NETDEV_TX_OK; 3363 } 3364 3365 /* 82571 and newer doesn't need the workaround that limited descriptor 3366 * length to 4kB */ 3367 if (adapter->hw.mac_type >= e1000_82571) 3368 max_per_txd = 8192; 3369 3370 mss = skb_shinfo(skb)->gso_size; 3371 /* The controller does a simple calculation to 3372 * make sure there is enough room in the FIFO before 3373 * initiating the DMA for each buffer. The calc is: 3374 * 4 = ceil(buffer len/mss). To make sure we don't 3375 * overrun the FIFO, adjust the max buffer len if mss 3376 * drops. */ 3377 if (mss) { 3378 uint8_t hdr_len; 3379 max_per_txd = min(mss << 2, max_per_txd); 3380 max_txd_pwr = fls(max_per_txd) - 1; 3381 3382 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data 3383 * points to just header, pull a few bytes of payload from 3384 * frags into skb->data */ 3385 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); 3386 if (skb->data_len && hdr_len == len) { 3387 switch (adapter->hw.mac_type) { 3388 unsigned int pull_size; 3389 case e1000_82544: 3390 /* Make sure we have room to chop off 4 bytes, 3391 * and that the end alignment will work out to 3392 * this hardware's requirements 3393 * NOTE: this is a TSO only workaround 3394 * if end byte alignment not correct move us 3395 * into the next dword */ 3396 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4) 3397 break; 3398 /* fall through */ 3399 case e1000_82571: 3400 case e1000_82572: 3401 case e1000_82573: 3402 case e1000_ich8lan: 3403 pull_size = min((unsigned int)4, skb->data_len); 3404 if (!__pskb_pull_tail(skb, pull_size)) { 3405 DPRINTK(DRV, ERR, 3406 "__pskb_pull_tail failed.\n"); 3407 dev_kfree_skb_any(skb); 3408 return NETDEV_TX_OK; 3409 } 3410 len = skb->len - skb->data_len; 3411 break; 3412 default: 3413 /* do nothing */ 3414 break; 3415 } 3416 } 3417 } 3418 3419 /* reserve a descriptor for the offload context */ 3420 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL)) 3421 count++; 3422 count++; 3423 3424 /* Controller Erratum workaround */ 3425 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb)) 3426 count++; 3427 3428 count += TXD_USE_COUNT(len, max_txd_pwr); 3429 3430 if (adapter->pcix_82544) 3431 count++; 3432 3433 /* work-around for errata 10 and it applies to all controllers 3434 * in PCI-X mode, so add one more descriptor to the count 3435 */ 3436 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) && 3437 (len > 2015))) 3438 count++; 3439 3440 nr_frags = skb_shinfo(skb)->nr_frags; 3441 for (f = 0; f < nr_frags; f++) 3442 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size, 3443 max_txd_pwr); 3444 if (adapter->pcix_82544) 3445 count += nr_frags; 3446 3447 3448 if (adapter->hw.tx_pkt_filtering && 3449 (adapter->hw.mac_type == e1000_82573)) 3450 e1000_transfer_dhcp_info(adapter, skb); 3451 3452 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags)) 3453 /* Collision - tell upper layer to requeue */ 3454 return NETDEV_TX_LOCKED; 3455 3456 /* need: count + 2 desc gap to keep tail from touching 3457 * head, otherwise try next time */ 3458 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) { 3459 spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 3460 return NETDEV_TX_BUSY; 3461 } 3462 3463 if (unlikely(adapter->hw.mac_type == e1000_82547)) { 3464 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) { 3465 netif_stop_queue(netdev); 3466 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1); 3467 spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 3468 return NETDEV_TX_BUSY; 3469 } 3470 } 3471 3472 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) { 3473 tx_flags |= E1000_TX_FLAGS_VLAN; 3474 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT); 3475 } 3476 3477 first = tx_ring->next_to_use; 3478 3479 tso = e1000_tso(adapter, tx_ring, skb); 3480 if (tso < 0) { 3481 dev_kfree_skb_any(skb); 3482 spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 3483 return NETDEV_TX_OK; 3484 } 3485 3486 if (likely(tso)) { 3487 tx_ring->last_tx_tso = 1; 3488 tx_flags |= E1000_TX_FLAGS_TSO; 3489 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) 3490 tx_flags |= E1000_TX_FLAGS_CSUM; 3491 3492 /* Old method was to assume IPv4 packet by default if TSO was enabled. 3493 * 82571 hardware supports TSO capabilities for IPv6 as well... 3494 * no longer assume, we must. */ 3495 if (likely(skb->protocol == htons(ETH_P_IP))) 3496 tx_flags |= E1000_TX_FLAGS_IPV4; 3497 3498 e1000_tx_queue(adapter, tx_ring, tx_flags, 3499 e1000_tx_map(adapter, tx_ring, skb, first, 3500 max_per_txd, nr_frags, mss)); 3501 3502 netdev->trans_start = jiffies; 3503 3504 /* Make sure there is space in the ring for the next send. */ 3505 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2); 3506 3507 spin_unlock_irqrestore(&tx_ring->tx_lock, flags); 3508 return NETDEV_TX_OK; 3509} 3510 3511/** 3512 * e1000_tx_timeout - Respond to a Tx Hang 3513 * @netdev: network interface device structure 3514 **/ 3515 3516static void 3517e1000_tx_timeout(struct net_device *netdev) 3518{ 3519 struct e1000_adapter *adapter = netdev_priv(netdev); 3520 3521 /* Do the reset outside of interrupt context */ 3522 adapter->tx_timeout_count++; 3523 schedule_work(&adapter->reset_task); 3524} 3525 3526static void 3527e1000_reset_task(struct work_struct *work) 3528{ 3529 struct e1000_adapter *adapter = 3530 container_of(work, struct e1000_adapter, reset_task); 3531 3532 e1000_reinit_locked(adapter); 3533} 3534 3535/** 3536 * e1000_get_stats - Get System Network Statistics 3537 * @netdev: network interface device structure 3538 * 3539 * Returns the address of the device statistics structure. 3540 * The statistics are actually updated from the timer callback. 3541 **/ 3542 3543static struct net_device_stats * 3544e1000_get_stats(struct net_device *netdev) 3545{ 3546 struct e1000_adapter *adapter = netdev_priv(netdev); 3547 3548 /* only return the current stats */ 3549 return &adapter->net_stats; 3550} 3551 3552/** 3553 * e1000_change_mtu - Change the Maximum Transfer Unit 3554 * @netdev: network interface device structure 3555 * @new_mtu: new value for maximum frame size 3556 * 3557 * Returns 0 on success, negative on failure 3558 **/ 3559 3560static int 3561e1000_change_mtu(struct net_device *netdev, int new_mtu) 3562{ 3563 struct e1000_adapter *adapter = netdev_priv(netdev); 3564 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; 3565 uint16_t eeprom_data = 0; 3566 3567 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || 3568 (max_frame > MAX_JUMBO_FRAME_SIZE)) { 3569 DPRINTK(PROBE, ERR, "Invalid MTU setting\n"); 3570 return -EINVAL; 3571 } 3572 3573 /* Adapter-specific max frame size limits. */ 3574 switch (adapter->hw.mac_type) { 3575 case e1000_undefined ... e1000_82542_rev2_1: 3576 case e1000_ich8lan: 3577 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { 3578 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n"); 3579 return -EINVAL; 3580 } 3581 break; 3582 case e1000_82573: 3583 /* Jumbo Frames not supported if: 3584 * - this is not an 82573L device 3585 * - ASPM is enabled in any way (0x1A bits 3:2) */ 3586 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1, 3587 &eeprom_data); 3588 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) || 3589 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) { 3590 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) { 3591 DPRINTK(PROBE, ERR, 3592 "Jumbo Frames not supported.\n"); 3593 return -EINVAL; 3594 } 3595 break; 3596 } 3597 /* ERT will be enabled later to enable wire speed receives */ 3598 3599 /* fall through to get support */ 3600 case e1000_82571: 3601 case e1000_82572: 3602 case e1000_80003es2lan: 3603#define MAX_STD_JUMBO_FRAME_SIZE 9234 3604 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { 3605 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n"); 3606 return -EINVAL; 3607 } 3608 break; 3609 default: 3610 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */ 3611 break; 3612 } 3613 3614 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN 3615 * means we reserve 2 more, this pushes us to allocate from the next 3616 * larger slab size 3617 * i.e. RXBUFFER_2048 --> size-4096 slab */ 3618 3619 if (max_frame <= E1000_RXBUFFER_256) 3620 adapter->rx_buffer_len = E1000_RXBUFFER_256; 3621 else if (max_frame <= E1000_RXBUFFER_512) 3622 adapter->rx_buffer_len = E1000_RXBUFFER_512; 3623 else if (max_frame <= E1000_RXBUFFER_1024) 3624 adapter->rx_buffer_len = E1000_RXBUFFER_1024; 3625 else if (max_frame <= E1000_RXBUFFER_2048) 3626 adapter->rx_buffer_len = E1000_RXBUFFER_2048; 3627 else if (max_frame <= E1000_RXBUFFER_4096) 3628 adapter->rx_buffer_len = E1000_RXBUFFER_4096; 3629 else if (max_frame <= E1000_RXBUFFER_8192) 3630 adapter->rx_buffer_len = E1000_RXBUFFER_8192; 3631 else if (max_frame <= E1000_RXBUFFER_16384) 3632 adapter->rx_buffer_len = E1000_RXBUFFER_16384; 3633 3634 /* adjust allocation if LPE protects us, and we aren't using SBP */ 3635 if (!adapter->hw.tbi_compatibility_on && 3636 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) || 3637 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))) 3638 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; 3639 3640 netdev->mtu = new_mtu; 3641 adapter->hw.max_frame_size = max_frame; 3642 3643 if (netif_running(netdev)) 3644 e1000_reinit_locked(adapter); 3645 3646 return 0; 3647} 3648 3649/** 3650 * e1000_update_stats - Update the board statistics counters 3651 * @adapter: board private structure 3652 **/ 3653 3654void 3655e1000_update_stats(struct e1000_adapter *adapter) 3656{ 3657 struct e1000_hw *hw = &adapter->hw; 3658 struct pci_dev *pdev = adapter->pdev; 3659 unsigned long flags; 3660 uint16_t phy_tmp; 3661 3662#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF 3663 3664 /* 3665 * Prevent stats update while adapter is being reset, or if the pci 3666 * connection is down. 3667 */ 3668 if (adapter->link_speed == 0) 3669 return; 3670 if (pci_channel_offline(pdev)) 3671 return; 3672 3673 spin_lock_irqsave(&adapter->stats_lock, flags); 3674 3675 /* these counters are modified from e1000_tbi_adjust_stats, 3676 * called from the interrupt context, so they must only 3677 * be written while holding adapter->stats_lock 3678 */ 3679 3680 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS); 3681 adapter->stats.gprc += E1000_READ_REG(hw, GPRC); 3682 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL); 3683 adapter->stats.gorch += E1000_READ_REG(hw, GORCH); 3684 adapter->stats.bprc += E1000_READ_REG(hw, BPRC); 3685 adapter->stats.mprc += E1000_READ_REG(hw, MPRC); 3686 adapter->stats.roc += E1000_READ_REG(hw, ROC); 3687 3688 if (adapter->hw.mac_type != e1000_ich8lan) { 3689 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64); 3690 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127); 3691 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255); 3692 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511); 3693 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023); 3694 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522); 3695 } 3696 3697 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS); 3698 adapter->stats.mpc += E1000_READ_REG(hw, MPC); 3699 adapter->stats.scc += E1000_READ_REG(hw, SCC); 3700 adapter->stats.ecol += E1000_READ_REG(hw, ECOL); 3701 adapter->stats.mcc += E1000_READ_REG(hw, MCC); 3702 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL); 3703 adapter->stats.dc += E1000_READ_REG(hw, DC); 3704 adapter->stats.sec += E1000_READ_REG(hw, SEC); 3705 adapter->stats.rlec += E1000_READ_REG(hw, RLEC); 3706 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC); 3707 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC); 3708 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC); 3709 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC); 3710 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC); 3711 adapter->stats.gptc += E1000_READ_REG(hw, GPTC); 3712 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL); 3713 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH); 3714 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC); 3715 adapter->stats.ruc += E1000_READ_REG(hw, RUC); 3716 adapter->stats.rfc += E1000_READ_REG(hw, RFC); 3717 adapter->stats.rjc += E1000_READ_REG(hw, RJC); 3718 adapter->stats.torl += E1000_READ_REG(hw, TORL); 3719 adapter->stats.torh += E1000_READ_REG(hw, TORH); 3720 adapter->stats.totl += E1000_READ_REG(hw, TOTL); 3721 adapter->stats.toth += E1000_READ_REG(hw, TOTH); 3722 adapter->stats.tpr += E1000_READ_REG(hw, TPR); 3723 3724 if (adapter->hw.mac_type != e1000_ich8lan) { 3725 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64); 3726 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127); 3727 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255); 3728 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511); 3729 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023); 3730 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522); 3731 } 3732 3733 adapter->stats.mptc += E1000_READ_REG(hw, MPTC); 3734 adapter->stats.bptc += E1000_READ_REG(hw, BPTC); 3735 3736 /* used for adaptive IFS */ 3737 3738 hw->tx_packet_delta = E1000_READ_REG(hw, TPT); 3739 adapter->stats.tpt += hw->tx_packet_delta; 3740 hw->collision_delta = E1000_READ_REG(hw, COLC); 3741 adapter->stats.colc += hw->collision_delta; 3742 3743 if (hw->mac_type >= e1000_82543) { 3744 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC); 3745 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC); 3746 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS); 3747 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR); 3748 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC); 3749 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC); 3750 } 3751 if (hw->mac_type > e1000_82547_rev_2) { 3752 adapter->stats.iac += E1000_READ_REG(hw, IAC); 3753 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC); 3754 3755 if (adapter->hw.mac_type != e1000_ich8lan) { 3756 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC); 3757 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC); 3758 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC); 3759 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC); 3760 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC); 3761 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC); 3762 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC); 3763 } 3764 } 3765 3766 /* Fill out the OS statistics structure */ 3767 adapter->net_stats.multicast = adapter->stats.mprc; 3768 adapter->net_stats.collisions = adapter->stats.colc; 3769 3770 /* Rx Errors */ 3771 3772 /* RLEC on some newer hardware can be incorrect so build 3773 * our own version based on RUC and ROC */ 3774 adapter->net_stats.rx_errors = adapter->stats.rxerrc + 3775 adapter->stats.crcerrs + adapter->stats.algnerrc + 3776 adapter->stats.ruc + adapter->stats.roc + 3777 adapter->stats.cexterr; 3778 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc; 3779 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc; 3780 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; 3781 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; 3782 adapter->net_stats.rx_missed_errors = adapter->stats.mpc; 3783 3784 /* Tx Errors */ 3785 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol; 3786 adapter->net_stats.tx_errors = adapter->stats.txerrc; 3787 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; 3788 adapter->net_stats.tx_window_errors = adapter->stats.latecol; 3789 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; 3790 if (adapter->hw.bad_tx_carr_stats_fd && 3791 adapter->link_duplex == FULL_DUPLEX) { 3792 adapter->net_stats.tx_carrier_errors = 0; 3793 adapter->stats.tncrs = 0; 3794 } 3795 3796 /* Tx Dropped needs to be maintained elsewhere */ 3797 3798 /* Phy Stats */ 3799 if (hw->media_type == e1000_media_type_copper) { 3800 if ((adapter->link_speed == SPEED_1000) && 3801 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) { 3802 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; 3803 adapter->phy_stats.idle_errors += phy_tmp; 3804 } 3805 3806 if ((hw->mac_type <= e1000_82546) && 3807 (hw->phy_type == e1000_phy_m88) && 3808 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp)) 3809 adapter->phy_stats.receive_errors += phy_tmp; 3810 } 3811 3812 /* Management Stats */ 3813 if (adapter->hw.has_smbus) { 3814 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC); 3815 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC); 3816 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC); 3817 } 3818 3819 spin_unlock_irqrestore(&adapter->stats_lock, flags); 3820} 3821 3822/** 3823 * e1000_intr_msi - Interrupt Handler 3824 * @irq: interrupt number 3825 * @data: pointer to a network interface device structure 3826 **/ 3827 3828static irqreturn_t 3829e1000_intr_msi(int irq, void *data) 3830{ 3831 struct net_device *netdev = data; 3832 struct e1000_adapter *adapter = netdev_priv(netdev); 3833 struct e1000_hw *hw = &adapter->hw; 3834#ifndef CONFIG_E1000_NAPI 3835 int i; 3836#endif 3837 uint32_t icr = E1000_READ_REG(hw, ICR); 3838 3839#ifdef CONFIG_E1000_NAPI 3840 /* read ICR disables interrupts using IAM, so keep up with our 3841 * enable/disable accounting */ 3842 atomic_inc(&adapter->irq_sem); 3843#endif 3844 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { 3845 hw->get_link_status = 1; 3846 /* 80003ES2LAN workaround-- For packet buffer work-around on 3847 * link down event; disable receives here in the ISR and reset 3848 * adapter in watchdog */ 3849 if (netif_carrier_ok(netdev) && 3850 (adapter->hw.mac_type == e1000_80003es2lan)) { 3851 /* disable receives */ 3852 uint32_t rctl = E1000_READ_REG(hw, RCTL); 3853 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); 3854 } 3855 /* guard against interrupt when we're going down */ 3856 if (!test_bit(__E1000_DOWN, &adapter->flags)) 3857 mod_timer(&adapter->watchdog_timer, jiffies + 1); 3858 } 3859 3860#ifdef CONFIG_E1000_NAPI 3861 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) { 3862 adapter->total_tx_bytes = 0; 3863 adapter->total_tx_packets = 0; 3864 adapter->total_rx_bytes = 0; 3865 adapter->total_rx_packets = 0; 3866 __netif_rx_schedule(netdev, &adapter->napi); 3867 } else 3868 e1000_irq_enable(adapter); 3869#else 3870 adapter->total_tx_bytes = 0; 3871 adapter->total_rx_bytes = 0; 3872 adapter->total_tx_packets = 0; 3873 adapter->total_rx_packets = 0; 3874 3875 for (i = 0; i < E1000_MAX_INTR; i++) 3876 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & 3877 !e1000_clean_tx_irq(adapter, adapter->tx_ring))) 3878 break; 3879 3880 if (likely(adapter->itr_setting & 3)) 3881 e1000_set_itr(adapter); 3882#endif 3883 3884 return IRQ_HANDLED; 3885} 3886 3887/** 3888 * e1000_intr - Interrupt Handler 3889 * @irq: interrupt number 3890 * @data: pointer to a network interface device structure 3891 **/ 3892 3893static irqreturn_t 3894e1000_intr(int irq, void *data) 3895{ 3896 struct net_device *netdev = data; 3897 struct e1000_adapter *adapter = netdev_priv(netdev); 3898 struct e1000_hw *hw = &adapter->hw; 3899 uint32_t rctl, icr = E1000_READ_REG(hw, ICR); 3900#ifndef CONFIG_E1000_NAPI 3901 int i; 3902#endif 3903 if (unlikely(!icr)) 3904 return IRQ_NONE; /* Not our interrupt */ 3905 3906#ifdef CONFIG_E1000_NAPI 3907 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is 3908 * not set, then the adapter didn't send an interrupt */ 3909 if (unlikely(hw->mac_type >= e1000_82571 && 3910 !(icr & E1000_ICR_INT_ASSERTED))) 3911 return IRQ_NONE; 3912 3913 /* Interrupt Auto-Mask...upon reading ICR, 3914 * interrupts are masked. No need for the 3915 * IMC write, but it does mean we should 3916 * account for it ASAP. */ 3917 if (likely(hw->mac_type >= e1000_82571)) 3918 atomic_inc(&adapter->irq_sem); 3919#endif 3920 3921 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { 3922 hw->get_link_status = 1; 3923 /* 80003ES2LAN workaround-- 3924 * For packet buffer work-around on link down event; 3925 * disable receives here in the ISR and 3926 * reset adapter in watchdog 3927 */ 3928 if (netif_carrier_ok(netdev) && 3929 (adapter->hw.mac_type == e1000_80003es2lan)) { 3930 /* disable receives */ 3931 rctl = E1000_READ_REG(hw, RCTL); 3932 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN); 3933 } 3934 /* guard against interrupt when we're going down */ 3935 if (!test_bit(__E1000_DOWN, &adapter->flags)) 3936 mod_timer(&adapter->watchdog_timer, jiffies + 1); 3937 } 3938 3939#ifdef CONFIG_E1000_NAPI 3940 if (unlikely(hw->mac_type < e1000_82571)) { 3941 /* disable interrupts, without the synchronize_irq bit */ 3942 atomic_inc(&adapter->irq_sem); 3943 E1000_WRITE_REG(hw, IMC, ~0); 3944 E1000_WRITE_FLUSH(hw); 3945 } 3946 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) { 3947 adapter->total_tx_bytes = 0; 3948 adapter->total_tx_packets = 0; 3949 adapter->total_rx_bytes = 0; 3950 adapter->total_rx_packets = 0; 3951 __netif_rx_schedule(netdev, &adapter->napi); 3952 } else 3953 /* this really should not happen! if it does it is basically a 3954 * bug, but not a hard error, so enable ints and continue */ 3955 e1000_irq_enable(adapter); 3956#else 3957 /* Writing IMC and IMS is needed for 82547. 3958 * Due to Hub Link bus being occupied, an interrupt 3959 * de-assertion message is not able to be sent. 3960 * When an interrupt assertion message is generated later, 3961 * two messages are re-ordered and sent out. 3962 * That causes APIC to think 82547 is in de-assertion 3963 * state, while 82547 is in assertion state, resulting 3964 * in dead lock. Writing IMC forces 82547 into 3965 * de-assertion state. 3966 */ 3967 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) { 3968 atomic_inc(&adapter->irq_sem); 3969 E1000_WRITE_REG(hw, IMC, ~0); 3970 } 3971 3972 adapter->total_tx_bytes = 0; 3973 adapter->total_rx_bytes = 0; 3974 adapter->total_tx_packets = 0; 3975 adapter->total_rx_packets = 0; 3976 3977 for (i = 0; i < E1000_MAX_INTR; i++) 3978 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & 3979 !e1000_clean_tx_irq(adapter, adapter->tx_ring))) 3980 break; 3981 3982 if (likely(adapter->itr_setting & 3)) 3983 e1000_set_itr(adapter); 3984 3985 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) 3986 e1000_irq_enable(adapter); 3987 3988#endif 3989 return IRQ_HANDLED; 3990} 3991 3992#ifdef CONFIG_E1000_NAPI 3993/** 3994 * e1000_clean - NAPI Rx polling callback 3995 * @adapter: board private structure 3996 **/ 3997 3998static int 3999e1000_clean(struct napi_struct *napi, int budget) 4000{ 4001 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi); 4002 struct net_device *poll_dev = adapter->netdev; 4003 int tx_cleaned = 0, work_done = 0; 4004 4005 /* Must NOT use netdev_priv macro here. */ 4006 adapter = poll_dev->priv; 4007 4008 /* e1000_clean is called per-cpu. This lock protects 4009 * tx_ring[0] from being cleaned by multiple cpus 4010 * simultaneously. A failure obtaining the lock means 4011 * tx_ring[0] is currently being cleaned anyway. */ 4012 if (spin_trylock(&adapter->tx_queue_lock)) { 4013 tx_cleaned = e1000_clean_tx_irq(adapter, 4014 &adapter->tx_ring[0]); 4015 spin_unlock(&adapter->tx_queue_lock); 4016 } 4017 4018 adapter->clean_rx(adapter, &adapter->rx_ring[0], 4019 &work_done, budget); 4020 4021 if (tx_cleaned) 4022 work_done = budget; 4023 4024 /* If budget not fully consumed, exit the polling mode */ 4025 if (work_done < budget) { 4026 if (likely(adapter->itr_setting & 3)) 4027 e1000_set_itr(adapter); 4028 netif_rx_complete(poll_dev, napi); 4029 e1000_irq_enable(adapter); 4030 } 4031 4032 return work_done; 4033} 4034 4035#endif 4036/** 4037 * e1000_clean_tx_irq - Reclaim resources after transmit completes 4038 * @adapter: board private structure 4039 **/ 4040 4041static boolean_t 4042e1000_clean_tx_irq(struct e1000_adapter *adapter, 4043 struct e1000_tx_ring *tx_ring) 4044{ 4045 struct net_device *netdev = adapter->netdev; 4046 struct e1000_tx_desc *tx_desc, *eop_desc; 4047 struct e1000_buffer *buffer_info; 4048 unsigned int i, eop; 4049#ifdef CONFIG_E1000_NAPI 4050 unsigned int count = 0; 4051#endif 4052 boolean_t cleaned = FALSE; 4053 unsigned int total_tx_bytes=0, total_tx_packets=0; 4054 4055 i = tx_ring->next_to_clean; 4056 eop = tx_ring->buffer_info[i].next_to_watch; 4057 eop_desc = E1000_TX_DESC(*tx_ring, eop); 4058 4059 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { 4060 for (cleaned = FALSE; !cleaned; ) { 4061 tx_desc = E1000_TX_DESC(*tx_ring, i); 4062 buffer_info = &tx_ring->buffer_info[i]; 4063 cleaned = (i == eop); 4064 4065 if (cleaned) { 4066 struct sk_buff *skb = buffer_info->skb; 4067 unsigned int segs, bytecount; 4068 segs = skb_shinfo(skb)->gso_segs ?: 1; 4069 /* multiply data chunks by size of headers */ 4070 bytecount = ((segs - 1) * skb_headlen(skb)) + 4071 skb->len; 4072 total_tx_packets += segs; 4073 total_tx_bytes += bytecount; 4074 } 4075 e1000_unmap_and_free_tx_resource(adapter, buffer_info); 4076 tx_desc->upper.data = 0; 4077 4078 if (unlikely(++i == tx_ring->count)) i = 0; 4079 } 4080 4081 eop = tx_ring->buffer_info[i].next_to_watch; 4082 eop_desc = E1000_TX_DESC(*tx_ring, eop); 4083#ifdef CONFIG_E1000_NAPI 4084#define E1000_TX_WEIGHT 64 4085 /* weight of a sort for tx, to avoid endless transmit cleanup */ 4086 if (count++ == E1000_TX_WEIGHT) break; 4087#endif 4088 } 4089 4090 tx_ring->next_to_clean = i; 4091 4092#define TX_WAKE_THRESHOLD 32 4093 if (unlikely(cleaned && netif_carrier_ok(netdev) && 4094 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) { 4095 /* Make sure that anybody stopping the queue after this 4096 * sees the new next_to_clean. 4097 */ 4098 smp_mb(); 4099 if (netif_queue_stopped(netdev)) { 4100 netif_wake_queue(netdev); 4101 ++adapter->restart_queue; 4102 } 4103 } 4104 4105 if (adapter->detect_tx_hung) { 4106 /* Detect a transmit hang in hardware, this serializes the 4107 * check with the clearing of time_stamp and movement of i */ 4108 adapter->detect_tx_hung = FALSE; 4109 if (tx_ring->buffer_info[eop].dma && 4110 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + 4111 (adapter->tx_timeout_factor * HZ)) 4112 && !(E1000_READ_REG(&adapter->hw, STATUS) & 4113 E1000_STATUS_TXOFF)) { 4114 4115 /* detected Tx unit hang */ 4116 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" 4117 " Tx Queue <%lu>\n" 4118 " TDH <%x>\n" 4119 " TDT <%x>\n" 4120 " next_to_use <%x>\n" 4121 " next_to_clean <%x>\n" 4122 "buffer_info[next_to_clean]\n" 4123 " time_stamp <%lx>\n" 4124 " next_to_watch <%x>\n" 4125 " jiffies <%lx>\n" 4126 " next_to_watch.status <%x>\n", 4127 (unsigned long)((tx_ring - adapter->tx_ring) / 4128 sizeof(struct e1000_tx_ring)), 4129 readl(adapter->hw.hw_addr + tx_ring->tdh), 4130 readl(adapter->hw.hw_addr + tx_ring->tdt), 4131 tx_ring->next_to_use, 4132 tx_ring->next_to_clean, 4133 tx_ring->buffer_info[eop].time_stamp, 4134 eop, 4135 jiffies, 4136 eop_desc->upper.fields.status); 4137 netif_stop_queue(netdev); 4138 } 4139 } 4140 adapter->total_tx_bytes += total_tx_bytes; 4141 adapter->total_tx_packets += total_tx_packets; 4142 adapter->net_stats.tx_bytes += total_tx_bytes; 4143 adapter->net_stats.tx_packets += total_tx_packets; 4144 return cleaned; 4145} 4146 4147/** 4148 * e1000_rx_checksum - Receive Checksum Offload for 82543 4149 * @adapter: board private structure 4150 * @status_err: receive descriptor status and error fields 4151 * @csum: receive descriptor csum field 4152 * @sk_buff: socket buffer with received data 4153 **/ 4154 4155static void 4156e1000_rx_checksum(struct e1000_adapter *adapter, 4157 uint32_t status_err, uint32_t csum, 4158 struct sk_buff *skb) 4159{ 4160 uint16_t status = (uint16_t)status_err; 4161 uint8_t errors = (uint8_t)(status_err >> 24); 4162 skb->ip_summed = CHECKSUM_NONE; 4163 4164 /* 82543 or newer only */ 4165 if (unlikely(adapter->hw.mac_type < e1000_82543)) return; 4166 /* Ignore Checksum bit is set */ 4167 if (unlikely(status & E1000_RXD_STAT_IXSM)) return; 4168 /* TCP/UDP checksum error bit is set */ 4169 if (unlikely(errors & E1000_RXD_ERR_TCPE)) { 4170 /* let the stack verify checksum errors */ 4171 adapter->hw_csum_err++; 4172 return; 4173 } 4174 /* TCP/UDP Checksum has not been calculated */ 4175 if (adapter->hw.mac_type <= e1000_82547_rev_2) { 4176 if (!(status & E1000_RXD_STAT_TCPCS)) 4177 return; 4178 } else { 4179 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))) 4180 return; 4181 } 4182 /* It must be a TCP or UDP packet with a valid checksum */ 4183 if (likely(status & E1000_RXD_STAT_TCPCS)) { 4184 /* TCP checksum is good */ 4185 skb->ip_summed = CHECKSUM_UNNECESSARY; 4186 } else if (adapter->hw.mac_type > e1000_82547_rev_2) { 4187 /* IP fragment with UDP payload */ 4188 /* Hardware complements the payload checksum, so we undo it 4189 * and then put the value in host order for further stack use. 4190 */ 4191 __sum16 sum = (__force __sum16)htons(csum); 4192 skb->csum = csum_unfold(~sum); 4193 skb->ip_summed = CHECKSUM_COMPLETE; 4194 } 4195 adapter->hw_csum_good++; 4196} 4197 4198/** 4199 * e1000_clean_rx_irq - Send received data up the network stack; legacy 4200 * @adapter: board private structure 4201 **/ 4202 4203static boolean_t 4204#ifdef CONFIG_E1000_NAPI 4205e1000_clean_rx_irq(struct e1000_adapter *adapter, 4206 struct e1000_rx_ring *rx_ring, 4207 int *work_done, int work_to_do) 4208#else 4209e1000_clean_rx_irq(struct e1000_adapter *adapter, 4210 struct e1000_rx_ring *rx_ring) 4211#endif 4212{ 4213 struct net_device *netdev = adapter->netdev; 4214 struct pci_dev *pdev = adapter->pdev; 4215 struct e1000_rx_desc *rx_desc, *next_rxd; 4216 struct e1000_buffer *buffer_info, *next_buffer; 4217 unsigned long flags; 4218 uint32_t length; 4219 uint8_t last_byte; 4220 unsigned int i; 4221 int cleaned_count = 0; 4222 boolean_t cleaned = FALSE; 4223 unsigned int total_rx_bytes=0, total_rx_packets=0; 4224 4225 i = rx_ring->next_to_clean; 4226 rx_desc = E1000_RX_DESC(*rx_ring, i); 4227 buffer_info = &rx_ring->buffer_info[i]; 4228 4229 while (rx_desc->status & E1000_RXD_STAT_DD) { 4230 struct sk_buff *skb; 4231 u8 status; 4232 4233#ifdef CONFIG_E1000_NAPI 4234 if (*work_done >= work_to_do) 4235 break; 4236 (*work_done)++; 4237#endif 4238 status = rx_desc->status; 4239 skb = buffer_info->skb; 4240 buffer_info->skb = NULL; 4241 4242 prefetch(skb->data - NET_IP_ALIGN); 4243 4244 if (++i == rx_ring->count) i = 0; 4245 next_rxd = E1000_RX_DESC(*rx_ring, i); 4246 prefetch(next_rxd); 4247 4248 next_buffer = &rx_ring->buffer_info[i]; 4249 4250 cleaned = TRUE; 4251 cleaned_count++; 4252 pci_unmap_single(pdev, 4253 buffer_info->dma, 4254 buffer_info->length, 4255 PCI_DMA_FROMDEVICE); 4256 4257 length = le16_to_cpu(rx_desc->length); 4258 4259 if (unlikely(!(status & E1000_RXD_STAT_EOP))) { 4260 /* All receives must fit into a single buffer */ 4261 E1000_DBG("%s: Receive packet consumed multiple" 4262 " buffers\n", netdev->name); 4263 /* recycle */ 4264 buffer_info->skb = skb; 4265 goto next_desc; 4266 } 4267 4268 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) { 4269 last_byte = *(skb->data + length - 1); 4270 if (TBI_ACCEPT(&adapter->hw, status, 4271 rx_desc->errors, length, last_byte)) { 4272 spin_lock_irqsave(&adapter->stats_lock, flags); 4273 e1000_tbi_adjust_stats(&adapter->hw, 4274 &adapter->stats, 4275 length, skb->data); 4276 spin_unlock_irqrestore(&adapter->stats_lock, 4277 flags); 4278 length--; 4279 } else { 4280 /* recycle */ 4281 buffer_info->skb = skb; 4282 goto next_desc; 4283 } 4284 } 4285 4286 /* adjust length to remove Ethernet CRC, this must be 4287 * done after the TBI_ACCEPT workaround above */ 4288 length -= 4; 4289 4290 /* probably a little skewed due to removing CRC */ 4291 total_rx_bytes += length; 4292 total_rx_packets++; 4293 4294 /* code added for copybreak, this should improve 4295 * performance for small packets with large amounts 4296 * of reassembly being done in the stack */ 4297 if (length < copybreak) { 4298 struct sk_buff *new_skb = 4299 netdev_alloc_skb(netdev, length + NET_IP_ALIGN); 4300 if (new_skb) { 4301 skb_reserve(new_skb, NET_IP_ALIGN); 4302 skb_copy_to_linear_data_offset(new_skb, 4303 -NET_IP_ALIGN, 4304 (skb->data - 4305 NET_IP_ALIGN), 4306 (length + 4307 NET_IP_ALIGN)); 4308 /* save the skb in buffer_info as good */ 4309 buffer_info->skb = skb; 4310 skb = new_skb; 4311 } 4312 /* else just continue with the old one */ 4313 } 4314 /* end copybreak code */ 4315 skb_put(skb, length); 4316 4317 /* Receive Checksum Offload */ 4318 e1000_rx_checksum(adapter, 4319 (uint32_t)(status) | 4320 ((uint32_t)(rx_desc->errors) << 24), 4321 le16_to_cpu(rx_desc->csum), skb); 4322 4323 skb->protocol = eth_type_trans(skb, netdev); 4324#ifdef CONFIG_E1000_NAPI 4325 if (unlikely(adapter->vlgrp && 4326 (status & E1000_RXD_STAT_VP))) { 4327 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, 4328 le16_to_cpu(rx_desc->special) & 4329 E1000_RXD_SPC_VLAN_MASK); 4330 } else { 4331 netif_receive_skb(skb); 4332 } 4333#else /* CONFIG_E1000_NAPI */ 4334 if (unlikely(adapter->vlgrp && 4335 (status & E1000_RXD_STAT_VP))) { 4336 vlan_hwaccel_rx(skb, adapter->vlgrp, 4337 le16_to_cpu(rx_desc->special) & 4338 E1000_RXD_SPC_VLAN_MASK); 4339 } else { 4340 netif_rx(skb); 4341 } 4342#endif /* CONFIG_E1000_NAPI */ 4343 netdev->last_rx = jiffies; 4344 4345next_desc: 4346 rx_desc->status = 0; 4347 4348 /* return some buffers to hardware, one at a time is too slow */ 4349 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 4350 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); 4351 cleaned_count = 0; 4352 } 4353 4354 /* use prefetched values */ 4355 rx_desc = next_rxd; 4356 buffer_info = next_buffer; 4357 } 4358 rx_ring->next_to_clean = i; 4359 4360 cleaned_count = E1000_DESC_UNUSED(rx_ring); 4361 if (cleaned_count) 4362 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); 4363 4364 adapter->total_rx_packets += total_rx_packets; 4365 adapter->total_rx_bytes += total_rx_bytes; 4366 adapter->net_stats.rx_bytes += total_rx_bytes; 4367 adapter->net_stats.rx_packets += total_rx_packets; 4368 return cleaned; 4369} 4370 4371/** 4372 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split 4373 * @adapter: board private structure 4374 **/ 4375 4376static boolean_t 4377#ifdef CONFIG_E1000_NAPI 4378e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 4379 struct e1000_rx_ring *rx_ring, 4380 int *work_done, int work_to_do) 4381#else 4382e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, 4383 struct e1000_rx_ring *rx_ring) 4384#endif 4385{ 4386 union e1000_rx_desc_packet_split *rx_desc, *next_rxd; 4387 struct net_device *netdev = adapter->netdev; 4388 struct pci_dev *pdev = adapter->pdev; 4389 struct e1000_buffer *buffer_info, *next_buffer; 4390 struct e1000_ps_page *ps_page; 4391 struct e1000_ps_page_dma *ps_page_dma; 4392 struct sk_buff *skb; 4393 unsigned int i, j; 4394 uint32_t length, staterr; 4395 int cleaned_count = 0; 4396 boolean_t cleaned = FALSE; 4397 unsigned int total_rx_bytes=0, total_rx_packets=0; 4398 4399 i = rx_ring->next_to_clean; 4400 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 4401 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 4402 buffer_info = &rx_ring->buffer_info[i]; 4403 4404 while (staterr & E1000_RXD_STAT_DD) { 4405 ps_page = &rx_ring->ps_page[i]; 4406 ps_page_dma = &rx_ring->ps_page_dma[i]; 4407#ifdef CONFIG_E1000_NAPI 4408 if (unlikely(*work_done >= work_to_do)) 4409 break; 4410 (*work_done)++; 4411#endif 4412 skb = buffer_info->skb; 4413 4414 /* in the packet split case this is header only */ 4415 prefetch(skb->data - NET_IP_ALIGN); 4416 4417 if (++i == rx_ring->count) i = 0; 4418 next_rxd = E1000_RX_DESC_PS(*rx_ring, i); 4419 prefetch(next_rxd); 4420 4421 next_buffer = &rx_ring->buffer_info[i]; 4422 4423 cleaned = TRUE; 4424 cleaned_count++; 4425 pci_unmap_single(pdev, buffer_info->dma, 4426 buffer_info->length, 4427 PCI_DMA_FROMDEVICE); 4428 4429 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) { 4430 E1000_DBG("%s: Packet Split buffers didn't pick up" 4431 " the full packet\n", netdev->name); 4432 dev_kfree_skb_irq(skb); 4433 goto next_desc; 4434 } 4435 4436 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) { 4437 dev_kfree_skb_irq(skb); 4438 goto next_desc; 4439 } 4440 4441 length = le16_to_cpu(rx_desc->wb.middle.length0); 4442 4443 if (unlikely(!length)) { 4444 E1000_DBG("%s: Last part of the packet spanning" 4445 " multiple descriptors\n", netdev->name); 4446 dev_kfree_skb_irq(skb); 4447 goto next_desc; 4448 } 4449 4450 /* Good Receive */ 4451 skb_put(skb, length); 4452 4453 { 4454 /* this looks ugly, but it seems compiler issues make it 4455 more efficient than reusing j */ 4456 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); 4457 4458 /* page alloc/put takes too long and effects small packet 4459 * throughput, so unsplit small packets and save the alloc/put*/ 4460 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) { 4461 u8 *vaddr; 4462 /* there is no documentation about how to call 4463 * kmap_atomic, so we can't hold the mapping 4464 * very long */ 4465 pci_dma_sync_single_for_cpu(pdev, 4466 ps_page_dma->ps_page_dma[0], 4467 PAGE_SIZE, 4468 PCI_DMA_FROMDEVICE); 4469 vaddr = kmap_atomic(ps_page->ps_page[0], 4470 KM_SKB_DATA_SOFTIRQ); 4471 memcpy(skb_tail_pointer(skb), vaddr, l1); 4472 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ); 4473 pci_dma_sync_single_for_device(pdev, 4474 ps_page_dma->ps_page_dma[0], 4475 PAGE_SIZE, PCI_DMA_FROMDEVICE); 4476 /* remove the CRC */ 4477 l1 -= 4; 4478 skb_put(skb, l1); 4479 goto copydone; 4480 } /* if */ 4481 } 4482 4483 for (j = 0; j < adapter->rx_ps_pages; j++) { 4484 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j]))) 4485 break; 4486 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j], 4487 PAGE_SIZE, PCI_DMA_FROMDEVICE); 4488 ps_page_dma->ps_page_dma[j] = 0; 4489 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0, 4490 length); 4491 ps_page->ps_page[j] = NULL; 4492 skb->len += length; 4493 skb->data_len += length; 4494 skb->truesize += length; 4495 } 4496 4497 /* strip the ethernet crc, problem is we're using pages now so 4498 * this whole operation can get a little cpu intensive */ 4499 pskb_trim(skb, skb->len - 4); 4500 4501copydone: 4502 total_rx_bytes += skb->len; 4503 total_rx_packets++; 4504 4505 e1000_rx_checksum(adapter, staterr, 4506 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); 4507 skb->protocol = eth_type_trans(skb, netdev); 4508 4509 if (likely(rx_desc->wb.upper.header_status & 4510 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) 4511 adapter->rx_hdr_split++; 4512#ifdef CONFIG_E1000_NAPI 4513 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { 4514 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, 4515 le16_to_cpu(rx_desc->wb.middle.vlan) & 4516 E1000_RXD_SPC_VLAN_MASK); 4517 } else { 4518 netif_receive_skb(skb); 4519 } 4520#else /* CONFIG_E1000_NAPI */ 4521 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { 4522 vlan_hwaccel_rx(skb, adapter->vlgrp, 4523 le16_to_cpu(rx_desc->wb.middle.vlan) & 4524 E1000_RXD_SPC_VLAN_MASK); 4525 } else { 4526 netif_rx(skb); 4527 } 4528#endif /* CONFIG_E1000_NAPI */ 4529 netdev->last_rx = jiffies; 4530 4531next_desc: 4532 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); 4533 buffer_info->skb = NULL; 4534 4535 /* return some buffers to hardware, one at a time is too slow */ 4536 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) { 4537 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); 4538 cleaned_count = 0; 4539 } 4540 4541 /* use prefetched values */ 4542 rx_desc = next_rxd; 4543 buffer_info = next_buffer; 4544 4545 staterr = le32_to_cpu(rx_desc->wb.middle.status_error); 4546 } 4547 rx_ring->next_to_clean = i; 4548 4549 cleaned_count = E1000_DESC_UNUSED(rx_ring); 4550 if (cleaned_count) 4551 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count); 4552 4553 adapter->total_rx_packets += total_rx_packets; 4554 adapter->total_rx_bytes += total_rx_bytes; 4555 adapter->net_stats.rx_bytes += total_rx_bytes; 4556 adapter->net_stats.rx_packets += total_rx_packets; 4557 return cleaned; 4558} 4559 4560/** 4561 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended 4562 * @adapter: address of board private structure 4563 **/ 4564 4565static void 4566e1000_alloc_rx_buffers(struct e1000_adapter *adapter, 4567 struct e1000_rx_ring *rx_ring, 4568 int cleaned_count) 4569{ 4570 struct net_device *netdev = adapter->netdev; 4571 struct pci_dev *pdev = adapter->pdev; 4572 struct e1000_rx_desc *rx_desc; 4573 struct e1000_buffer *buffer_info; 4574 struct sk_buff *skb; 4575 unsigned int i; 4576 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN; 4577 4578 i = rx_ring->next_to_use; 4579 buffer_info = &rx_ring->buffer_info[i]; 4580 4581 while (cleaned_count--) { 4582 skb = buffer_info->skb; 4583 if (skb) { 4584 skb_trim(skb, 0); 4585 goto map_skb; 4586 } 4587 4588 skb = netdev_alloc_skb(netdev, bufsz); 4589 if (unlikely(!skb)) { 4590 /* Better luck next round */ 4591 adapter->alloc_rx_buff_failed++; 4592 break; 4593 } 4594 4595 /* Fix for errata 23, can't cross 64kB boundary */ 4596 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { 4597 struct sk_buff *oldskb = skb; 4598 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes " 4599 "at %p\n", bufsz, skb->data); 4600 /* Try again, without freeing the previous */ 4601 skb = netdev_alloc_skb(netdev, bufsz); 4602 /* Failed allocation, critical failure */ 4603 if (!skb) { 4604 dev_kfree_skb(oldskb); 4605 break; 4606 } 4607 4608 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) { 4609 /* give up */ 4610 dev_kfree_skb(skb); 4611 dev_kfree_skb(oldskb); 4612 break; /* while !buffer_info->skb */ 4613 } 4614 4615 /* Use new allocation */ 4616 dev_kfree_skb(oldskb); 4617 } 4618 /* Make buffer alignment 2 beyond a 16 byte boundary 4619 * this will result in a 16 byte aligned IP header after 4620 * the 14 byte MAC header is removed 4621 */ 4622 skb_reserve(skb, NET_IP_ALIGN); 4623 4624 buffer_info->skb = skb; 4625 buffer_info->length = adapter->rx_buffer_len; 4626map_skb: 4627 buffer_info->dma = pci_map_single(pdev, 4628 skb->data, 4629 adapter->rx_buffer_len, 4630 PCI_DMA_FROMDEVICE); 4631 4632 /* Fix for errata 23, can't cross 64kB boundary */ 4633 if (!e1000_check_64k_bound(adapter, 4634 (void *)(unsigned long)buffer_info->dma, 4635 adapter->rx_buffer_len)) { 4636 DPRINTK(RX_ERR, ERR, 4637 "dma align check failed: %u bytes at %p\n", 4638 adapter->rx_buffer_len, 4639 (void *)(unsigned long)buffer_info->dma); 4640 dev_kfree_skb(skb); 4641 buffer_info->skb = NULL; 4642 4643 pci_unmap_single(pdev, buffer_info->dma, 4644 adapter->rx_buffer_len, 4645 PCI_DMA_FROMDEVICE); 4646 4647 break; /* while !buffer_info->skb */ 4648 } 4649 rx_desc = E1000_RX_DESC(*rx_ring, i); 4650 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma); 4651 4652 if (unlikely(++i == rx_ring->count)) 4653 i = 0; 4654 buffer_info = &rx_ring->buffer_info[i]; 4655 } 4656 4657 if (likely(rx_ring->next_to_use != i)) { 4658 rx_ring->next_to_use = i; 4659 if (unlikely(i-- == 0)) 4660 i = (rx_ring->count - 1); 4661 4662 /* Force memory writes to complete before letting h/w 4663 * know there are new descriptors to fetch. (Only 4664 * applicable for weak-ordered memory model archs, 4665 * such as IA-64). */ 4666 wmb(); 4667 writel(i, adapter->hw.hw_addr + rx_ring->rdt); 4668 } 4669} 4670 4671/** 4672 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split 4673 * @adapter: address of board private structure 4674 **/ 4675 4676static void 4677e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter, 4678 struct e1000_rx_ring *rx_ring, 4679 int cleaned_count) 4680{ 4681 struct net_device *netdev = adapter->netdev; 4682 struct pci_dev *pdev = adapter->pdev; 4683 union e1000_rx_desc_packet_split *rx_desc; 4684 struct e1000_buffer *buffer_info; 4685 struct e1000_ps_page *ps_page; 4686 struct e1000_ps_page_dma *ps_page_dma; 4687 struct sk_buff *skb; 4688 unsigned int i, j; 4689 4690 i = rx_ring->next_to_use; 4691 buffer_info = &rx_ring->buffer_info[i]; 4692 ps_page = &rx_ring->ps_page[i]; 4693 ps_page_dma = &rx_ring->ps_page_dma[i]; 4694 4695 while (cleaned_count--) { 4696 rx_desc = E1000_RX_DESC_PS(*rx_ring, i); 4697 4698 for (j = 0; j < PS_PAGE_BUFFERS; j++) { 4699 if (j < adapter->rx_ps_pages) { 4700 if (likely(!ps_page->ps_page[j])) { 4701 ps_page->ps_page[j] = 4702 alloc_page(GFP_ATOMIC); 4703 if (unlikely(!ps_page->ps_page[j])) { 4704 adapter->alloc_rx_buff_failed++; 4705 goto no_buffers; 4706 } 4707 ps_page_dma->ps_page_dma[j] = 4708 pci_map_page(pdev, 4709 ps_page->ps_page[j], 4710 0, PAGE_SIZE, 4711 PCI_DMA_FROMDEVICE); 4712 } 4713 /* Refresh the desc even if buffer_addrs didn't 4714 * change because each write-back erases 4715 * this info. 4716 */ 4717 rx_desc->read.buffer_addr[j+1] = 4718 cpu_to_le64(ps_page_dma->ps_page_dma[j]); 4719 } else 4720 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0); 4721 } 4722 4723 skb = netdev_alloc_skb(netdev, 4724 adapter->rx_ps_bsize0 + NET_IP_ALIGN); 4725 4726 if (unlikely(!skb)) { 4727 adapter->alloc_rx_buff_failed++; 4728 break; 4729 } 4730 4731 /* Make buffer alignment 2 beyond a 16 byte boundary 4732 * this will result in a 16 byte aligned IP header after 4733 * the 14 byte MAC header is removed 4734 */ 4735 skb_reserve(skb, NET_IP_ALIGN); 4736 4737 buffer_info->skb = skb; 4738 buffer_info->length = adapter->rx_ps_bsize0; 4739 buffer_info->dma = pci_map_single(pdev, skb->data, 4740 adapter->rx_ps_bsize0, 4741 PCI_DMA_FROMDEVICE); 4742 4743 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma); 4744 4745 if (unlikely(++i == rx_ring->count)) i = 0; 4746 buffer_info = &rx_ring->buffer_info[i]; 4747 ps_page = &rx_ring->ps_page[i]; 4748 ps_page_dma = &rx_ring->ps_page_dma[i]; 4749 } 4750 4751no_buffers: 4752 if (likely(rx_ring->next_to_use != i)) { 4753 rx_ring->next_to_use = i; 4754 if (unlikely(i-- == 0)) i = (rx_ring->count - 1); 4755 4756 /* Force memory writes to complete before letting h/w 4757 * know there are new descriptors to fetch. (Only 4758 * applicable for weak-ordered memory model archs, 4759 * such as IA-64). */ 4760 wmb(); 4761 /* Hardware increments by 16 bytes, but packet split 4762 * descriptors are 32 bytes...so we increment tail 4763 * twice as much. 4764 */ 4765 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt); 4766 } 4767} 4768 4769/** 4770 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers. 4771 * @adapter: 4772 **/ 4773 4774static void 4775e1000_smartspeed(struct e1000_adapter *adapter) 4776{ 4777 uint16_t phy_status; 4778 uint16_t phy_ctrl; 4779 4780 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg || 4781 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL)) 4782 return; 4783 4784 if (adapter->smartspeed == 0) { 4785 /* If Master/Slave config fault is asserted twice, 4786 * we assume back-to-back */ 4787 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); 4788 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; 4789 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status); 4790 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return; 4791 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); 4792 if (phy_ctrl & CR_1000T_MS_ENABLE) { 4793 phy_ctrl &= ~CR_1000T_MS_ENABLE; 4794 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, 4795 phy_ctrl); 4796 adapter->smartspeed++; 4797 if (!e1000_phy_setup_autoneg(&adapter->hw) && 4798 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, 4799 &phy_ctrl)) { 4800 phy_ctrl |= (MII_CR_AUTO_NEG_EN | 4801 MII_CR_RESTART_AUTO_NEG); 4802 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 4803 phy_ctrl); 4804 } 4805 } 4806 return; 4807 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) { 4808 /* If still no link, perhaps using 2/3 pair cable */ 4809 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl); 4810 phy_ctrl |= CR_1000T_MS_ENABLE; 4811 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl); 4812 if (!e1000_phy_setup_autoneg(&adapter->hw) && 4813 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) { 4814 phy_ctrl |= (MII_CR_AUTO_NEG_EN | 4815 MII_CR_RESTART_AUTO_NEG); 4816 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl); 4817 } 4818 } 4819 /* Restart process after E1000_SMARTSPEED_MAX iterations */ 4820 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX) 4821 adapter->smartspeed = 0; 4822} 4823 4824/** 4825 * e1000_ioctl - 4826 * @netdev: 4827 * @ifreq: 4828 * @cmd: 4829 **/ 4830 4831static int 4832e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 4833{ 4834 switch (cmd) { 4835 case SIOCGMIIPHY: 4836 case SIOCGMIIREG: 4837 case SIOCSMIIREG: 4838 return e1000_mii_ioctl(netdev, ifr, cmd); 4839 default: 4840 return -EOPNOTSUPP; 4841 } 4842} 4843 4844/** 4845 * e1000_mii_ioctl - 4846 * @netdev: 4847 * @ifreq: 4848 * @cmd: 4849 **/ 4850 4851static int 4852e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) 4853{ 4854 struct e1000_adapter *adapter = netdev_priv(netdev); 4855 struct mii_ioctl_data *data = if_mii(ifr); 4856 int retval; 4857 uint16_t mii_reg; 4858 uint16_t spddplx; 4859 unsigned long flags; 4860 4861 if (adapter->hw.media_type != e1000_media_type_copper) 4862 return -EOPNOTSUPP; 4863 4864 switch (cmd) { 4865 case SIOCGMIIPHY: 4866 data->phy_id = adapter->hw.phy_addr; 4867 break; 4868 case SIOCGMIIREG: 4869 if (!capable(CAP_NET_ADMIN)) 4870 return -EPERM; 4871 spin_lock_irqsave(&adapter->stats_lock, flags); 4872 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, 4873 &data->val_out)) { 4874 spin_unlock_irqrestore(&adapter->stats_lock, flags); 4875 return -EIO; 4876 } 4877 spin_unlock_irqrestore(&adapter->stats_lock, flags); 4878 break; 4879 case SIOCSMIIREG: 4880 if (!capable(CAP_NET_ADMIN)) 4881 return -EPERM; 4882 if (data->reg_num & ~(0x1F)) 4883 return -EFAULT; 4884 mii_reg = data->val_in; 4885 spin_lock_irqsave(&adapter->stats_lock, flags); 4886 if (e1000_write_phy_reg(&adapter->hw, data->reg_num, 4887 mii_reg)) { 4888 spin_unlock_irqrestore(&adapter->stats_lock, flags); 4889 return -EIO; 4890 } 4891 spin_unlock_irqrestore(&adapter->stats_lock, flags); 4892 if (adapter->hw.media_type == e1000_media_type_copper) { 4893 switch (data->reg_num) { 4894 case PHY_CTRL: 4895 if (mii_reg & MII_CR_POWER_DOWN) 4896 break; 4897 if (mii_reg & MII_CR_AUTO_NEG_EN) { 4898 adapter->hw.autoneg = 1; 4899 adapter->hw.autoneg_advertised = 0x2F; 4900 } else { 4901 if (mii_reg & 0x40) 4902 spddplx = SPEED_1000; 4903 else if (mii_reg & 0x2000) 4904 spddplx = SPEED_100; 4905 else 4906 spddplx = SPEED_10; 4907 spddplx += (mii_reg & 0x100) 4908 ? DUPLEX_FULL : 4909 DUPLEX_HALF; 4910 retval = e1000_set_spd_dplx(adapter, 4911 spddplx); 4912 if (retval) 4913 return retval; 4914 } 4915 if (netif_running(adapter->netdev)) 4916 e1000_reinit_locked(adapter); 4917 else 4918 e1000_reset(adapter); 4919 break; 4920 case M88E1000_PHY_SPEC_CTRL: 4921 case M88E1000_EXT_PHY_SPEC_CTRL: 4922 if (e1000_phy_reset(&adapter->hw)) 4923 return -EIO; 4924 break; 4925 } 4926 } else { 4927 switch (data->reg_num) { 4928 case PHY_CTRL: 4929 if (mii_reg & MII_CR_POWER_DOWN) 4930 break; 4931 if (netif_running(adapter->netdev)) 4932 e1000_reinit_locked(adapter); 4933 else 4934 e1000_reset(adapter); 4935 break; 4936 } 4937 } 4938 break; 4939 default: 4940 return -EOPNOTSUPP; 4941 } 4942 return E1000_SUCCESS; 4943} 4944 4945void 4946e1000_pci_set_mwi(struct e1000_hw *hw) 4947{ 4948 struct e1000_adapter *adapter = hw->back; 4949 int ret_val = pci_set_mwi(adapter->pdev); 4950 4951 if (ret_val) 4952 DPRINTK(PROBE, ERR, "Error in setting MWI\n"); 4953} 4954 4955void 4956e1000_pci_clear_mwi(struct e1000_hw *hw) 4957{ 4958 struct e1000_adapter *adapter = hw->back; 4959 4960 pci_clear_mwi(adapter->pdev); 4961} 4962 4963int 4964e1000_pcix_get_mmrbc(struct e1000_hw *hw) 4965{ 4966 struct e1000_adapter *adapter = hw->back; 4967 return pcix_get_mmrbc(adapter->pdev); 4968} 4969 4970void 4971e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc) 4972{ 4973 struct e1000_adapter *adapter = hw->back; 4974 pcix_set_mmrbc(adapter->pdev, mmrbc); 4975} 4976 4977int32_t 4978e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value) 4979{ 4980 struct e1000_adapter *adapter = hw->back; 4981 uint16_t cap_offset; 4982 4983 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP); 4984 if (!cap_offset) 4985 return -E1000_ERR_CONFIG; 4986 4987 pci_read_config_word(adapter->pdev, cap_offset + reg, value); 4988 4989 return E1000_SUCCESS; 4990} 4991 4992void 4993e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) 4994{ 4995 outl(value, port); 4996} 4997 4998static void 4999e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 5000{ 5001 struct e1000_adapter *adapter = netdev_priv(netdev); 5002 uint32_t ctrl, rctl; 5003 5004 e1000_irq_disable(adapter); 5005 adapter->vlgrp = grp; 5006 5007 if (grp) { 5008 /* enable VLAN tag insert/strip */ 5009 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 5010 ctrl |= E1000_CTRL_VME; 5011 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 5012 5013 if (adapter->hw.mac_type != e1000_ich8lan) { 5014 /* enable VLAN receive filtering */ 5015 rctl = E1000_READ_REG(&adapter->hw, RCTL); 5016 rctl |= E1000_RCTL_VFE; 5017 rctl &= ~E1000_RCTL_CFIEN; 5018 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 5019 e1000_update_mng_vlan(adapter); 5020 } 5021 } else { 5022 /* disable VLAN tag insert/strip */ 5023 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 5024 ctrl &= ~E1000_CTRL_VME; 5025 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 5026 5027 if (adapter->hw.mac_type != e1000_ich8lan) { 5028 /* disable VLAN filtering */ 5029 rctl = E1000_READ_REG(&adapter->hw, RCTL); 5030 rctl &= ~E1000_RCTL_VFE; 5031 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 5032 if (adapter->mng_vlan_id != 5033 (uint16_t)E1000_MNG_VLAN_NONE) { 5034 e1000_vlan_rx_kill_vid(netdev, 5035 adapter->mng_vlan_id); 5036 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE; 5037 } 5038 } 5039 } 5040 5041 e1000_irq_enable(adapter); 5042} 5043 5044static void 5045e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) 5046{ 5047 struct e1000_adapter *adapter = netdev_priv(netdev); 5048 uint32_t vfta, index; 5049 5050 if ((adapter->hw.mng_cookie.status & 5051 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && 5052 (vid == adapter->mng_vlan_id)) 5053 return; 5054 /* add VID to filter table */ 5055 index = (vid >> 5) & 0x7F; 5056 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); 5057 vfta |= (1 << (vid & 0x1F)); 5058 e1000_write_vfta(&adapter->hw, index, vfta); 5059} 5060 5061static void 5062e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) 5063{ 5064 struct e1000_adapter *adapter = netdev_priv(netdev); 5065 uint32_t vfta, index; 5066 5067 e1000_irq_disable(adapter); 5068 vlan_group_set_device(adapter->vlgrp, vid, NULL); 5069 e1000_irq_enable(adapter); 5070 5071 if ((adapter->hw.mng_cookie.status & 5072 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && 5073 (vid == adapter->mng_vlan_id)) { 5074 /* release control to f/w */ 5075 e1000_release_hw_control(adapter); 5076 return; 5077 } 5078 5079 /* remove VID from filter table */ 5080 index = (vid >> 5) & 0x7F; 5081 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index); 5082 vfta &= ~(1 << (vid & 0x1F)); 5083 e1000_write_vfta(&adapter->hw, index, vfta); 5084} 5085 5086static void 5087e1000_restore_vlan(struct e1000_adapter *adapter) 5088{ 5089 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp); 5090 5091 if (adapter->vlgrp) { 5092 uint16_t vid; 5093 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 5094 if (!vlan_group_get_device(adapter->vlgrp, vid)) 5095 continue; 5096 e1000_vlan_rx_add_vid(adapter->netdev, vid); 5097 } 5098 } 5099} 5100 5101int 5102e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) 5103{ 5104 adapter->hw.autoneg = 0; 5105 5106 /* Fiber NICs only allow 1000 gbps Full duplex */ 5107 if ((adapter->hw.media_type == e1000_media_type_fiber) && 5108 spddplx != (SPEED_1000 + DUPLEX_FULL)) { 5109 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); 5110 return -EINVAL; 5111 } 5112 5113 switch (spddplx) { 5114 case SPEED_10 + DUPLEX_HALF: 5115 adapter->hw.forced_speed_duplex = e1000_10_half; 5116 break; 5117 case SPEED_10 + DUPLEX_FULL: 5118 adapter->hw.forced_speed_duplex = e1000_10_full; 5119 break; 5120 case SPEED_100 + DUPLEX_HALF: 5121 adapter->hw.forced_speed_duplex = e1000_100_half; 5122 break; 5123 case SPEED_100 + DUPLEX_FULL: 5124 adapter->hw.forced_speed_duplex = e1000_100_full; 5125 break; 5126 case SPEED_1000 + DUPLEX_FULL: 5127 adapter->hw.autoneg = 1; 5128 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL; 5129 break; 5130 case SPEED_1000 + DUPLEX_HALF: /* not supported */ 5131 default: 5132 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); 5133 return -EINVAL; 5134 } 5135 return 0; 5136} 5137 5138static int 5139e1000_suspend(struct pci_dev *pdev, pm_message_t state) 5140{ 5141 struct net_device *netdev = pci_get_drvdata(pdev); 5142 struct e1000_adapter *adapter = netdev_priv(netdev); 5143 uint32_t ctrl, ctrl_ext, rctl, status; 5144 uint32_t wufc = adapter->wol; 5145#ifdef CONFIG_PM 5146 int retval = 0; 5147#endif 5148 5149 netif_device_detach(netdev); 5150 5151 if (netif_running(netdev)) { 5152 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags)); 5153 e1000_down(adapter); 5154 } 5155 5156#ifdef CONFIG_PM 5157 retval = pci_save_state(pdev); 5158 if (retval) 5159 return retval; 5160#endif 5161 5162 status = E1000_READ_REG(&adapter->hw, STATUS); 5163 if (status & E1000_STATUS_LU) 5164 wufc &= ~E1000_WUFC_LNKC; 5165 5166 if (wufc) { 5167 e1000_setup_rctl(adapter); 5168 e1000_set_rx_mode(netdev); 5169 5170 /* turn on all-multi mode if wake on multicast is enabled */ 5171 if (wufc & E1000_WUFC_MC) { 5172 rctl = E1000_READ_REG(&adapter->hw, RCTL); 5173 rctl |= E1000_RCTL_MPE; 5174 E1000_WRITE_REG(&adapter->hw, RCTL, rctl); 5175 } 5176 5177 if (adapter->hw.mac_type >= e1000_82540) { 5178 ctrl = E1000_READ_REG(&adapter->hw, CTRL); 5179 /* advertise wake from D3Cold */ 5180 #define E1000_CTRL_ADVD3WUC 0x00100000 5181 /* phy power management enable */ 5182 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 5183 ctrl |= E1000_CTRL_ADVD3WUC | 5184 E1000_CTRL_EN_PHY_PWR_MGMT; 5185 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl); 5186 } 5187 5188 if (adapter->hw.media_type == e1000_media_type_fiber || 5189 adapter->hw.media_type == e1000_media_type_internal_serdes) { 5190 /* keep the laser running in D3 */ 5191 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT); 5192 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; 5193 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext); 5194 } 5195 5196 /* Allow time for pending master requests to run */ 5197 e1000_disable_pciex_master(&adapter->hw); 5198 5199 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN); 5200 E1000_WRITE_REG(&adapter->hw, WUFC, wufc); 5201 pci_enable_wake(pdev, PCI_D3hot, 1); 5202 pci_enable_wake(pdev, PCI_D3cold, 1); 5203 } else { 5204 E1000_WRITE_REG(&adapter->hw, WUC, 0); 5205 E1000_WRITE_REG(&adapter->hw, WUFC, 0); 5206 pci_enable_wake(pdev, PCI_D3hot, 0); 5207 pci_enable_wake(pdev, PCI_D3cold, 0); 5208 } 5209 5210 e1000_release_manageability(adapter); 5211 5212 /* make sure adapter isn't asleep if manageability is enabled */ 5213 if (adapter->en_mng_pt) { 5214 pci_enable_wake(pdev, PCI_D3hot, 1); 5215 pci_enable_wake(pdev, PCI_D3cold, 1); 5216 } 5217 5218 if (adapter->hw.phy_type == e1000_phy_igp_3) 5219 e1000_phy_powerdown_workaround(&adapter->hw); 5220 5221 if (netif_running(netdev)) 5222 e1000_free_irq(adapter); 5223 5224 /* Release control of h/w to f/w. If f/w is AMT enabled, this 5225 * would have already happened in close and is redundant. */ 5226 e1000_release_hw_control(adapter); 5227 5228 pci_disable_device(pdev); 5229 5230 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 5231 5232 return 0; 5233} 5234 5235#ifdef CONFIG_PM 5236static int 5237e1000_resume(struct pci_dev *pdev) 5238{ 5239 struct net_device *netdev = pci_get_drvdata(pdev); 5240 struct e1000_adapter *adapter = netdev_priv(netdev); 5241 uint32_t err; 5242 5243 pci_set_power_state(pdev, PCI_D0); 5244 pci_restore_state(pdev); 5245 if ((err = pci_enable_device(pdev))) { 5246 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n"); 5247 return err; 5248 } 5249 pci_set_master(pdev); 5250 5251 pci_enable_wake(pdev, PCI_D3hot, 0); 5252 pci_enable_wake(pdev, PCI_D3cold, 0); 5253 5254 if (netif_running(netdev) && (err = e1000_request_irq(adapter))) 5255 return err; 5256 5257 e1000_power_up_phy(adapter); 5258 e1000_reset(adapter); 5259 E1000_WRITE_REG(&adapter->hw, WUS, ~0); 5260 5261 e1000_init_manageability(adapter); 5262 5263 if (netif_running(netdev)) 5264 e1000_up(adapter); 5265 5266 netif_device_attach(netdev); 5267 5268 /* If the controller is 82573 and f/w is AMT, do not set 5269 * DRV_LOAD until the interface is up. For all other cases, 5270 * let the f/w know that the h/w is now under the control 5271 * of the driver. */ 5272 if (adapter->hw.mac_type != e1000_82573 || 5273 !e1000_check_mng_mode(&adapter->hw)) 5274 e1000_get_hw_control(adapter); 5275 5276 return 0; 5277} 5278#endif 5279 5280static void e1000_shutdown(struct pci_dev *pdev) 5281{ 5282 e1000_suspend(pdev, PMSG_SUSPEND); 5283} 5284 5285#ifdef CONFIG_NET_POLL_CONTROLLER 5286/* 5287 * Polling 'interrupt' - used by things like netconsole to send skbs 5288 * without having to re-enable interrupts. It's not called while 5289 * the interrupt routine is executing. 5290 */ 5291static void 5292e1000_netpoll(struct net_device *netdev) 5293{ 5294 struct e1000_adapter *adapter = netdev_priv(netdev); 5295 5296 disable_irq(adapter->pdev->irq); 5297 e1000_intr(adapter->pdev->irq, netdev); 5298 e1000_clean_tx_irq(adapter, adapter->tx_ring); 5299#ifndef CONFIG_E1000_NAPI 5300 adapter->clean_rx(adapter, adapter->rx_ring); 5301#endif 5302 enable_irq(adapter->pdev->irq); 5303} 5304#endif 5305 5306/** 5307 * e1000_io_error_detected - called when PCI error is detected 5308 * @pdev: Pointer to PCI device 5309 * @state: The current pci conneection state 5310 * 5311 * This function is called after a PCI bus error affecting 5312 * this device has been detected. 5313 */ 5314static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 5315{ 5316 struct net_device *netdev = pci_get_drvdata(pdev); 5317 struct e1000_adapter *adapter = netdev->priv; 5318 5319 netif_device_detach(netdev); 5320 5321 if (netif_running(netdev)) 5322 e1000_down(adapter); 5323 pci_disable_device(pdev); 5324 5325 /* Request a slot slot reset. */ 5326 return PCI_ERS_RESULT_NEED_RESET; 5327} 5328 5329/** 5330 * e1000_io_slot_reset - called after the pci bus has been reset. 5331 * @pdev: Pointer to PCI device 5332 * 5333 * Restart the card from scratch, as if from a cold-boot. Implementation 5334 * resembles the first-half of the e1000_resume routine. 5335 */ 5336static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev) 5337{ 5338 struct net_device *netdev = pci_get_drvdata(pdev); 5339 struct e1000_adapter *adapter = netdev->priv; 5340 5341 if (pci_enable_device(pdev)) { 5342 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n"); 5343 return PCI_ERS_RESULT_DISCONNECT; 5344 } 5345 pci_set_master(pdev); 5346 5347 pci_enable_wake(pdev, PCI_D3hot, 0); 5348 pci_enable_wake(pdev, PCI_D3cold, 0); 5349 5350 e1000_reset(adapter); 5351 E1000_WRITE_REG(&adapter->hw, WUS, ~0); 5352 5353 return PCI_ERS_RESULT_RECOVERED; 5354} 5355 5356/** 5357 * e1000_io_resume - called when traffic can start flowing again. 5358 * @pdev: Pointer to PCI device 5359 * 5360 * This callback is called when the error recovery driver tells us that 5361 * its OK to resume normal operation. Implementation resembles the 5362 * second-half of the e1000_resume routine. 5363 */ 5364static void e1000_io_resume(struct pci_dev *pdev) 5365{ 5366 struct net_device *netdev = pci_get_drvdata(pdev); 5367 struct e1000_adapter *adapter = netdev->priv; 5368 5369 e1000_init_manageability(adapter); 5370 5371 if (netif_running(netdev)) { 5372 if (e1000_up(adapter)) { 5373 printk("e1000: can't bring device back up after reset\n"); 5374 return; 5375 } 5376 } 5377 5378 netif_device_attach(netdev); 5379 5380 /* If the controller is 82573 and f/w is AMT, do not set 5381 * DRV_LOAD until the interface is up. For all other cases, 5382 * let the f/w know that the h/w is now under the control 5383 * of the driver. */ 5384 if (adapter->hw.mac_type != e1000_82573 || 5385 !e1000_check_mng_mode(&adapter->hw)) 5386 e1000_get_hw_control(adapter); 5387 5388} 5389 5390/* e1000_main.c */