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1/****************************************************************************/
2
3/*
4 * mcfne.h -- NE2000 in ColdFire eval boards.
5 *
6 * (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
7 * (C) Copyright 2000, Lineo (www.lineo.com)
8 * (C) Copyright 2001, SnapGear (www.snapgear.com)
9 *
10 * 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
11 *
12 * Hacked support for m5206e Cadre III evaluation board
13 * Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
14 */
15
16/****************************************************************************/
17#ifndef mcfne_h
18#define mcfne_h
19/****************************************************************************/
20
21#include <linux/config.h>
22
23/*
24 * Support for NE2000 clones devices in ColdFire based boards.
25 * Not all boards address these parts the same way, some use a
26 * direct addressing method, others use a side-band address space
27 * to access odd address registers, some require byte swapping
28 * others do not.
29 */
30#define BSWAP(w) (((w) << 8) | ((w) >> 8))
31#define RSWAP(w) (w)
32
33
34/*
35 * Define the basic hardware resources of NE2000 boards.
36 */
37
38#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
39#define NE2000_ADDR 0x40000300
40#define NE2000_ODDOFFSET 0x00010000
41#define NE2000_IRQ_VECTOR 0xf0
42#define NE2000_IRQ_PRIORITY 2
43#define NE2000_IRQ_LEVEL 4
44#define NE2000_BYTE volatile unsigned short
45#endif
46
47#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
48#define NE2000_ADDR 0x40000300
49#define NE2000_ODDOFFSET 0x00010000
50#define NE2000_IRQ_VECTOR 0x1c
51#define NE2000_IRQ_PRIORITY 2
52#define NE2000_IRQ_LEVEL 4
53#define NE2000_BYTE volatile unsigned short
54#endif
55
56#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
57#define NE2000_ADDR 0x30000300
58#define NE2000_IRQ_VECTOR 25
59#define NE2000_IRQ_PRIORITY 1
60#define NE2000_IRQ_LEVEL 3
61#define NE2000_BYTE volatile unsigned char
62#endif
63
64#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
65#define NE2000_ADDR 0x40010000
66#define NE2000_ADDR1 0x40010001
67#define NE2000_ODDOFFSET 0x00000000
68#define NE2000_IRQ 1
69#define NE2000_IRQ_VECTOR 0x19
70#define NE2000_IRQ_PRIORITY 2
71#define NE2000_IRQ_LEVEL 1
72#define NE2000_BYTE volatile unsigned char
73#endif
74
75#if defined(CONFIG_M5307) && defined(CONFIG_MOTOROLA)
76#define NE2000_ADDR 0x40000300
77#define NE2000_ODDOFFSET 0x00010000
78#define NE2000_IRQ_VECTOR 0x1b
79#define NE2000_BYTE volatile unsigned short
80#endif
81
82#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
83#define NE2000_ADDR 0x30600300
84#define NE2000_ODDOFFSET 0x00008000
85#define NE2000_IRQ_VECTOR 67
86#undef BSWAP
87#define BSWAP(w) (w)
88#define NE2000_BYTE volatile unsigned short
89#undef RSWAP
90#define RSWAP(w) (((w) << 8) | ((w) >> 8))
91#endif
92
93#if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
94#define NE2000_ADDR0 0x30600300
95#define NE2000_ADDR1 0x30800300
96#define NE2000_ODDOFFSET 0x00008000
97#define NE2000_IRQ_VECTOR0 27
98#define NE2000_IRQ_VECTOR1 29
99#undef BSWAP
100#define BSWAP(w) (w)
101#define NE2000_BYTE volatile unsigned short
102#undef RSWAP
103#define RSWAP(w) (((w) << 8) | ((w) >> 8))
104#endif
105
106#if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
107#define NE2000_ADDR 0x30600300
108#define NE2000_ODDOFFSET 0x00008000
109#define NE2000_IRQ_VECTOR 27
110#undef BSWAP
111#define BSWAP(w) (w)
112#define NE2000_BYTE volatile unsigned short
113#undef RSWAP
114#define RSWAP(w) (((w) << 8) | ((w) >> 8))
115#endif
116
117#if defined(CONFIG_M5307) && defined(CONFIG_ARNEWSH)
118#define NE2000_ADDR 0xfe600300
119#define NE2000_ODDOFFSET 0x00010000
120#define NE2000_IRQ_VECTOR 0x1b
121#define NE2000_IRQ_PRIORITY 2
122#define NE2000_IRQ_LEVEL 3
123#define NE2000_BYTE volatile unsigned short
124#endif
125
126#if defined(CONFIG_M5407)
127#define NE2000_ADDR 0x40000300
128#define NE2000_ODDOFFSET 0x00010000
129#define NE2000_IRQ_VECTOR 0x1b
130#define NE2000_BYTE volatile unsigned short
131#endif
132
133/****************************************************************************/
134
135/*
136 * Side-band address space for odd address requires re-mapping
137 * many of the standard ISA access functions.
138 */
139#ifdef NE2000_ODDOFFSET
140
141#undef outb
142#undef outb_p
143#undef inb
144#undef inb_p
145#undef outsb
146#undef outsw
147#undef insb
148#undef insw
149
150#define outb ne2000_outb
151#define inb ne2000_inb
152#define outb_p ne2000_outb
153#define inb_p ne2000_inb
154#define outsb ne2000_outsb
155#define outsw ne2000_outsw
156#define insb ne2000_insb
157#define insw ne2000_insw
158
159
160#ifndef COLDFIRE_NE2000_FUNCS
161
162void ne2000_outb(unsigned int val, unsigned int addr);
163int ne2000_inb(unsigned int addr);
164void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len);
165void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len);
166void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len);
167void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len);
168
169#else
170
171/*
172 * This macro converts a conventional register address into the
173 * real memory pointer of the mapped NE2000 device.
174 * On most NE2000 implementations on ColdFire boards the chip is
175 * mapped in kinda funny, due to its ISA heritage.
176 */
177#ifdef CONFIG_CFV240
178#define NE2000_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1) + 1)
179#define NE2000_DATA_PTR(addr) (NE2000_ADDR + ((addr & 0x3f) << 1))
180#else
181#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr))
182#define NE2000_DATA_PTR(addr) (addr)
183#endif
184
185
186void ne2000_outb(unsigned int val, unsigned int addr)
187{
188 NE2000_BYTE *rp;
189
190 rp = (NE2000_BYTE *) NE2000_PTR(addr);
191 *rp = RSWAP(val);
192}
193
194int ne2000_inb(unsigned int addr)
195{
196 NE2000_BYTE *rp, val;
197
198 rp = (NE2000_BYTE *) NE2000_PTR(addr);
199 val = *rp;
200 return((int) ((NE2000_BYTE) RSWAP(val)));
201}
202
203void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len)
204{
205 NE2000_BYTE *rp, val;
206 unsigned char *buf;
207
208 buf = (unsigned char *) vbuf;
209 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
210 for (; (len > 0); len--) {
211 val = *rp;
212 *buf++ = RSWAP(val);
213 }
214}
215
216void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len)
217{
218 volatile unsigned short *rp;
219 unsigned short w, *buf;
220
221 buf = (unsigned short *) vbuf;
222 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
223 for (; (len > 0); len--) {
224 w = *rp;
225 *buf++ = BSWAP(w);
226 }
227}
228
229void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len)
230{
231 NE2000_BYTE *rp, val;
232 unsigned char *buf;
233
234 buf = (unsigned char *) vbuf;
235 rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr);
236 for (; (len > 0); len--) {
237 val = *buf++;
238 *rp = RSWAP(val);
239 }
240}
241
242void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len)
243{
244 volatile unsigned short *rp;
245 unsigned short w, *buf;
246
247 buf = (unsigned short *) vbuf;
248 rp = (volatile unsigned short *) NE2000_DATA_PTR(addr);
249 for (; (len > 0); len--) {
250 w = *buf++;
251 *rp = BSWAP(w);
252 }
253}
254
255#endif /* COLDFIRE_NE2000_FUNCS */
256#endif /* NE2000_OFFOFFSET */
257
258/****************************************************************************/
259
260#ifdef COLDFIRE_NE2000_FUNCS
261
262/*
263 * Lastly the interrupt set up code...
264 * Minor differences between the different board types.
265 */
266
267#if defined(CONFIG_M5206) && defined(CONFIG_ARNEWSH)
268void ne2000_irqsetup(int irq)
269{
270 volatile unsigned char *icrp;
271
272 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
273 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2;
274 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
275}
276#endif
277
278#if defined(CONFIG_M5206e) && defined(CONFIG_MOTOROLA)
279void ne2000_irqsetup(int irq)
280{
281 volatile unsigned char *icrp;
282
283 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4);
284 *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
285 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4);
286}
287#endif
288
289#if defined(CONFIG_M5206e) && defined(CONFIG_CFV240)
290void ne2000_irqsetup(int irq)
291{
292 volatile unsigned char *icrp;
293
294 icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR1);
295 *icrp = MCFSIM_ICR_LEVEL1 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC;
296 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT1);
297}
298#endif
299
300#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
301void ne2000_irqsetup(int irq)
302{
303 mcf_autovector(irq);
304}
305#endif
306
307#if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
308void ne2000_irqsetup(int irq)
309{
310 volatile unsigned long *icrp;
311 volatile unsigned long *pitr;
312
313 /* The NE2000 device uses external IRQ3 */
314 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
315 *icrp = (*icrp & 0x77077777) | 0x00d00000;
316
317 pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR);
318 *pitr = *pitr | 0x20000000;
319}
320
321void ne2000_irqack(int irq)
322{
323 volatile unsigned long *icrp;
324
325 /* The NE2000 device uses external IRQ3 */
326 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
327 *icrp = (*icrp & 0x77777777) | 0x00800000;
328}
329#endif
330
331#if defined(CONFIG_M5307) || defined(CONFIG_M5407)
332#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3)
333
334void ne2000_irqsetup(int irq)
335{
336 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
337 mcf_autovector(irq);
338}
339
340#else
341
342void ne2000_irqsetup(int irq)
343{
344 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3);
345}
346
347#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */
348#endif /* CONFIG_M5307 || CONFIG_M5407 */
349
350#endif /* COLDFIRE_NE2000_FUNCS */
351
352/****************************************************************************/
353#endif /* mcfne_h */