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Linux kernel mirror (for testing)
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linux
1/****************************************************************************/
2
3/*
4 * mcfmbus.h -- Coldfire MBUS support defines.
5 *
6 * (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de)
7 */
8
9/****************************************************************************/
10
11
12#ifndef mcfmbus_h
13#define mcfmbus_h
14#include <linux/config.h>
15
16
17#define MCFMBUS_BASE 0x280
18#define MCFMBUS_IRQ_VECTOR 0x19
19#define MCFMBUS_IRQ 0x1
20#define MCFMBUS_CLK 0x3f
21#define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/
22#define MCFMBUS_ADDRESS 0x01
23
24
25/*
26* Define the 5307 MBUS register set addresses
27*/
28
29#define MCFMBUS_MADR 0x00
30#define MCFMBUS_MFDR 0x04
31#define MCFMBUS_MBCR 0x08
32#define MCFMBUS_MBSR 0x0C
33#define MCFMBUS_MBDR 0x10
34
35
36#define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/
37
38#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
39
40/*
41* Define bit flags in Controll Register
42*/
43
44#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
45#define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */
46#define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */
47#define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */
48#define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */
49#define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */
50
51/*
52* Define bit flags in Status Register
53*/
54
55#define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */
56#define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */
57#define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */
58#define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */
59#define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */
60#define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */
61#define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */
62
63/*
64* Define bit flags in DATA I/O Register
65*/
66
67#define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */
68
69#define MBUSIOCSCLOCK 1
70#define MBUSIOCGCLOCK 2
71#define MBUSIOCSADDR 3
72#define MBUSIOCGADDR 4
73#define MBUSIOCSSLADDR 5
74#define MBUSIOCGSLADDR 6
75#define MBUSIOCSSUBADDR 7
76#define MBUSIOCGSUBADDR 8
77
78#endif