tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

kernel / arch / arm / Kconfig
at 55fa6091d83160ca772fc37cebae45d42695a708 2028 lines 58 kB view raw
1config ARM 2 bool 3 default y 4 select HAVE_AOUT 5 select HAVE_DMA_API_DEBUG 6 select HAVE_IDE 7 select HAVE_MEMBLOCK 8 select RTC_LIB 9 select SYS_SUPPORTS_APM_EMULATION 10 select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS) 12 select HAVE_ARCH_KGDB 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) 14 select HAVE_KRETPROBES if (HAVE_KPROBES) 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) 16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) 17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) 19 select HAVE_GENERIC_DMA_COHERENT 20 select HAVE_KERNEL_GZIP 21 select HAVE_KERNEL_LZO 22 select HAVE_KERNEL_LZMA 23 select HAVE_IRQ_WORK 24 select HAVE_PERF_EVENTS 25 select PERF_USE_VMALLOC 26 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) 28 select HAVE_C_RECORDMCOUNT 29 select HAVE_GENERIC_HARDIRQS 30 select HAVE_SPARSE_IRQ 31 help 32 The ARM series is a line of low-power-consumption RISC chip designs 33 licensed by ARM Ltd and targeted at embedded applications and 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer 35 manufactured, but legacy ARM-based PC hardware remains popular in 36 Europe. There is an ARM Linux project with a web page at 37 <http://www.arm.linux.org.uk/>. 38 39config HAVE_PWM 40 bool 41 42config MIGHT_HAVE_PCI 43 bool 44 45config SYS_SUPPORTS_APM_EMULATION 46 bool 47 48config HAVE_SCHED_CLOCK 49 bool 50 51config GENERIC_GPIO 52 bool 53 54config ARCH_USES_GETTIMEOFFSET 55 bool 56 default n 57 58config GENERIC_CLOCKEVENTS 59 bool 60 61config GENERIC_CLOCKEVENTS_BROADCAST 62 bool 63 depends on GENERIC_CLOCKEVENTS 64 default y if SMP 65 66config KTIME_SCALAR 67 bool 68 default y 69 70config HAVE_TCM 71 bool 72 select GENERIC_ALLOCATOR 73 74config HAVE_PROC_CPU 75 bool 76 77config NO_IOPORT 78 bool 79 80config EISA 81 bool 82 ---help--- 83 The Extended Industry Standard Architecture (EISA) bus was 84 developed as an open alternative to the IBM MicroChannel bus. 85 86 The EISA bus provided some of the features of the IBM MicroChannel 87 bus while maintaining backward compatibility with cards made for 88 the older ISA bus. The EISA bus saw limited use between 1988 and 89 1995 when it was made obsolete by the PCI bus. 90 91 Say Y here if you are building a kernel for an EISA-based machine. 92 93 Otherwise, say N. 94 95config SBUS 96 bool 97 98config MCA 99 bool 100 help 101 MicroChannel Architecture is found in some IBM PS/2 machines and 102 laptops. It is a bus system similar to PCI or ISA. See 103 <file:Documentation/mca.txt> (and especially the web page given 104 there) before attempting to build an MCA bus kernel. 105 106config STACKTRACE_SUPPORT 107 bool 108 default y 109 110config HAVE_LATENCYTOP_SUPPORT 111 bool 112 depends on !SMP 113 default y 114 115config LOCKDEP_SUPPORT 116 bool 117 default y 118 119config TRACE_IRQFLAGS_SUPPORT 120 bool 121 default y 122 123config HARDIRQS_SW_RESEND 124 bool 125 default y 126 127config GENERIC_IRQ_PROBE 128 bool 129 default y 130 131config GENERIC_LOCKBREAK 132 bool 133 default y 134 depends on SMP && PREEMPT 135 136config RWSEM_GENERIC_SPINLOCK 137 bool 138 default y 139 140config RWSEM_XCHGADD_ALGORITHM 141 bool 142 143config ARCH_HAS_ILOG2_U32 144 bool 145 146config ARCH_HAS_ILOG2_U64 147 bool 148 149config ARCH_HAS_CPUFREQ 150 bool 151 help 152 Internal node to signify that the ARCH has CPUFREQ support 153 and that the relevant menu configurations are displayed for 154 it. 155 156config ARCH_HAS_CPU_IDLE_WAIT 157 def_bool y 158 159config GENERIC_HWEIGHT 160 bool 161 default y 162 163config GENERIC_CALIBRATE_DELAY 164 bool 165 default y 166 167config ARCH_MAY_HAVE_PC_FDC 168 bool 169 170config ZONE_DMA 171 bool 172 173config NEED_DMA_MAP_STATE 174 def_bool y 175 176config GENERIC_ISA_DMA 177 bool 178 179config FIQ 180 bool 181 182config ARCH_MTD_XIP 183 bool 184 185config VECTORS_BASE 186 hex 187 default 0xffff0000 if MMU || CPU_HIGH_VECTOR 188 default DRAM_BASE if REMAP_VECTORS_TO_RAM 189 default 0x00000000 190 help 191 The base address of exception vectors. 192 193config ARM_PATCH_PHYS_VIRT 194 bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" 195 depends on EXPERIMENTAL 196 depends on !XIP_KERNEL && MMU 197 depends on !ARCH_REALVIEW || !SPARSEMEM 198 help 199 Patch phys-to-virt translation functions at runtime according to 200 the position of the kernel in system memory. 201 202 This can only be used with non-XIP with MMU kernels where 203 the base of physical memory is at a 16MB boundary. 204 205config ARM_PATCH_PHYS_VIRT_16BIT 206 def_bool y 207 depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM 208 209source "init/Kconfig" 210 211source "kernel/Kconfig.freezer" 212 213menu "System Type" 214 215config MMU 216 bool "MMU-based Paged Memory Management Support" 217 default y 218 help 219 Select if you want MMU-based virtualised addressing space 220 support by paged memory management. If unsure, say 'Y'. 221 222# 223# The "ARM system type" choice list is ordered alphabetically by option 224# text. Please add new entries in the option alphabetic order. 225# 226choice 227 prompt "ARM system type" 228 default ARCH_VERSATILE 229 230config ARCH_INTEGRATOR 231 bool "ARM Ltd. Integrator family" 232 select ARM_AMBA 233 select ARCH_HAS_CPUFREQ 234 select CLKDEV_LOOKUP 235 select ICST 236 select GENERIC_CLOCKEVENTS 237 select PLAT_VERSATILE 238 select PLAT_VERSATILE_FPGA_IRQ 239 help 240 Support for ARM's Integrator platform. 241 242config ARCH_REALVIEW 243 bool "ARM Ltd. RealView family" 244 select ARM_AMBA 245 select CLKDEV_LOOKUP 246 select ICST 247 select GENERIC_CLOCKEVENTS 248 select ARCH_WANT_OPTIONAL_GPIOLIB 249 select PLAT_VERSATILE 250 select PLAT_VERSATILE_CLCD 251 select ARM_TIMER_SP804 252 select GPIO_PL061 if GPIOLIB 253 help 254 This enables support for ARM Ltd RealView boards. 255 256config ARCH_VERSATILE 257 bool "ARM Ltd. Versatile family" 258 select ARM_AMBA 259 select ARM_VIC 260 select CLKDEV_LOOKUP 261 select ICST 262 select GENERIC_CLOCKEVENTS 263 select ARCH_WANT_OPTIONAL_GPIOLIB 264 select PLAT_VERSATILE 265 select PLAT_VERSATILE_CLCD 266 select PLAT_VERSATILE_FPGA_IRQ 267 select ARM_TIMER_SP804 268 help 269 This enables support for ARM Ltd Versatile board. 270 271config ARCH_VEXPRESS 272 bool "ARM Ltd. Versatile Express family" 273 select ARCH_WANT_OPTIONAL_GPIOLIB 274 select ARM_AMBA 275 select ARM_TIMER_SP804 276 select CLKDEV_LOOKUP 277 select GENERIC_CLOCKEVENTS 278 select HAVE_CLK 279 select HAVE_PATA_PLATFORM 280 select ICST 281 select PLAT_VERSATILE 282 select PLAT_VERSATILE_CLCD 283 help 284 This enables support for the ARM Ltd Versatile Express boards. 285 286config ARCH_AT91 287 bool "Atmel AT91" 288 select ARCH_REQUIRE_GPIOLIB 289 select HAVE_CLK 290 help 291 This enables support for systems based on the Atmel AT91RM9200, 292 AT91SAM9 and AT91CAP9 processors. 293 294config ARCH_BCMRING 295 bool "Broadcom BCMRING" 296 depends on MMU 297 select CPU_V6 298 select ARM_AMBA 299 select CLKDEV_LOOKUP 300 select GENERIC_CLOCKEVENTS 301 select ARCH_WANT_OPTIONAL_GPIOLIB 302 help 303 Support for Broadcom's BCMRing platform. 304 305config ARCH_CLPS711X 306 bool "Cirrus Logic CLPS711x/EP721x-based" 307 select CPU_ARM720T 308 select ARCH_USES_GETTIMEOFFSET 309 help 310 Support for Cirrus Logic 711x/721x based boards. 311 312config ARCH_CNS3XXX 313 bool "Cavium Networks CNS3XXX family" 314 select CPU_V6 315 select GENERIC_CLOCKEVENTS 316 select ARM_GIC 317 select MIGHT_HAVE_PCI 318 select PCI_DOMAINS if PCI 319 help 320 Support for Cavium Networks CNS3XXX platform. 321 322config ARCH_GEMINI 323 bool "Cortina Systems Gemini" 324 select CPU_FA526 325 select ARCH_REQUIRE_GPIOLIB 326 select ARCH_USES_GETTIMEOFFSET 327 help 328 Support for the Cortina Systems Gemini family SoCs 329 330config ARCH_EBSA110 331 bool "EBSA-110" 332 select CPU_SA110 333 select ISA 334 select NO_IOPORT 335 select ARCH_USES_GETTIMEOFFSET 336 help 337 This is an evaluation board for the StrongARM processor available 338 from Digital. It has limited hardware on-board, including an 339 Ethernet interface, two PCMCIA sockets, two serial ports and a 340 parallel port. 341 342config ARCH_EP93XX 343 bool "EP93xx-based" 344 select CPU_ARM920T 345 select ARM_AMBA 346 select ARM_VIC 347 select CLKDEV_LOOKUP 348 select ARCH_REQUIRE_GPIOLIB 349 select ARCH_HAS_HOLES_MEMORYMODEL 350 select ARCH_USES_GETTIMEOFFSET 351 help 352 This enables support for the Cirrus EP93xx series of CPUs. 353 354config ARCH_FOOTBRIDGE 355 bool "FootBridge" 356 select CPU_SA110 357 select FOOTBRIDGE 358 select GENERIC_CLOCKEVENTS 359 help 360 Support for systems based on the DC21285 companion chip 361 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. 362 363config ARCH_MXC 364 bool "Freescale MXC/iMX-based" 365 select GENERIC_CLOCKEVENTS 366 select ARCH_REQUIRE_GPIOLIB 367 select CLKDEV_LOOKUP 368 help 369 Support for Freescale MXC/iMX-based family of processors 370 371config ARCH_MXS 372 bool "Freescale MXS-based" 373 select GENERIC_CLOCKEVENTS 374 select ARCH_REQUIRE_GPIOLIB 375 select CLKDEV_LOOKUP 376 help 377 Support for Freescale MXS-based family of processors 378 379config ARCH_STMP3XXX 380 bool "Freescale STMP3xxx" 381 select CPU_ARM926T 382 select CLKDEV_LOOKUP 383 select ARCH_REQUIRE_GPIOLIB 384 select GENERIC_CLOCKEVENTS 385 select USB_ARCH_HAS_EHCI 386 help 387 Support for systems based on the Freescale 3xxx CPUs. 388 389config ARCH_NETX 390 bool "Hilscher NetX based" 391 select CPU_ARM926T 392 select ARM_VIC 393 select GENERIC_CLOCKEVENTS 394 help 395 This enables support for systems based on the Hilscher NetX Soc 396 397config ARCH_H720X 398 bool "Hynix HMS720x-based" 399 select CPU_ARM720T 400 select ISA_DMA_API 401 select ARCH_USES_GETTIMEOFFSET 402 help 403 This enables support for systems based on the Hynix HMS720x 404 405config ARCH_IOP13XX 406 bool "IOP13xx-based" 407 depends on MMU 408 select CPU_XSC3 409 select PLAT_IOP 410 select PCI 411 select ARCH_SUPPORTS_MSI 412 select VMSPLIT_1G 413 help 414 Support for Intel's IOP13XX (XScale) family of processors. 415 416config ARCH_IOP32X 417 bool "IOP32x-based" 418 depends on MMU 419 select CPU_XSCALE 420 select PLAT_IOP 421 select PCI 422 select ARCH_REQUIRE_GPIOLIB 423 help 424 Support for Intel's 80219 and IOP32X (XScale) family of 425 processors. 426 427config ARCH_IOP33X 428 bool "IOP33x-based" 429 depends on MMU 430 select CPU_XSCALE 431 select PLAT_IOP 432 select PCI 433 select ARCH_REQUIRE_GPIOLIB 434 help 435 Support for Intel's IOP33X (XScale) family of processors. 436 437config ARCH_IXP23XX 438 bool "IXP23XX-based" 439 depends on MMU 440 select CPU_XSC3 441 select PCI 442 select ARCH_USES_GETTIMEOFFSET 443 help 444 Support for Intel's IXP23xx (XScale) family of processors. 445 446config ARCH_IXP2000 447 bool "IXP2400/2800-based" 448 depends on MMU 449 select CPU_XSCALE 450 select PCI 451 select ARCH_USES_GETTIMEOFFSET 452 help 453 Support for Intel's IXP2400/2800 (XScale) family of processors. 454 455config ARCH_IXP4XX 456 bool "IXP4xx-based" 457 depends on MMU 458 select CPU_XSCALE 459 select GENERIC_GPIO 460 select GENERIC_CLOCKEVENTS 461 select HAVE_SCHED_CLOCK 462 select MIGHT_HAVE_PCI 463 select DMABOUNCE if PCI 464 help 465 Support for Intel's IXP4XX (XScale) family of processors. 466 467config ARCH_DOVE 468 bool "Marvell Dove" 469 select CPU_V6K 470 select PCI 471 select ARCH_REQUIRE_GPIOLIB 472 select GENERIC_CLOCKEVENTS 473 select PLAT_ORION 474 help 475 Support for the Marvell Dove SoC 88AP510 476 477config ARCH_KIRKWOOD 478 bool "Marvell Kirkwood" 479 select CPU_FEROCEON 480 select PCI 481 select ARCH_REQUIRE_GPIOLIB 482 select GENERIC_CLOCKEVENTS 483 select PLAT_ORION 484 help 485 Support for the following Marvell Kirkwood series SoCs: 486 88F6180, 88F6192 and 88F6281. 487 488config ARCH_LOKI 489 bool "Marvell Loki (88RC8480)" 490 select CPU_FEROCEON 491 select GENERIC_CLOCKEVENTS 492 select PLAT_ORION 493 help 494 Support for the Marvell Loki (88RC8480) SoC. 495 496config ARCH_LPC32XX 497 bool "NXP LPC32XX" 498 select CPU_ARM926T 499 select ARCH_REQUIRE_GPIOLIB 500 select HAVE_IDE 501 select ARM_AMBA 502 select USB_ARCH_HAS_OHCI 503 select CLKDEV_LOOKUP 504 select GENERIC_TIME 505 select GENERIC_CLOCKEVENTS 506 help 507 Support for the NXP LPC32XX family of processors 508 509config ARCH_MV78XX0 510 bool "Marvell MV78xx0" 511 select CPU_FEROCEON 512 select PCI 513 select ARCH_REQUIRE_GPIOLIB 514 select GENERIC_CLOCKEVENTS 515 select PLAT_ORION 516 help 517 Support for the following Marvell MV78xx0 series SoCs: 518 MV781x0, MV782x0. 519 520config ARCH_ORION5X 521 bool "Marvell Orion" 522 depends on MMU 523 select CPU_FEROCEON 524 select PCI 525 select ARCH_REQUIRE_GPIOLIB 526 select GENERIC_CLOCKEVENTS 527 select PLAT_ORION 528 help 529 Support for the following Marvell Orion 5x series SoCs: 530 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 531 Orion-2 (5281), Orion-1-90 (6183). 532 533config ARCH_MMP 534 bool "Marvell PXA168/910/MMP2" 535 depends on MMU 536 select ARCH_REQUIRE_GPIOLIB 537 select CLKDEV_LOOKUP 538 select GENERIC_CLOCKEVENTS 539 select HAVE_SCHED_CLOCK 540 select TICK_ONESHOT 541 select PLAT_PXA 542 select SPARSE_IRQ 543 help 544 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 545 546config ARCH_KS8695 547 bool "Micrel/Kendin KS8695" 548 select CPU_ARM922T 549 select ARCH_REQUIRE_GPIOLIB 550 select ARCH_USES_GETTIMEOFFSET 551 help 552 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based 553 System-on-Chip devices. 554 555config ARCH_NS9XXX 556 bool "NetSilicon NS9xxx" 557 select CPU_ARM926T 558 select GENERIC_GPIO 559 select GENERIC_CLOCKEVENTS 560 select HAVE_CLK 561 help 562 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx 563 System. 564 565 <http://www.digi.com/products/microprocessors/index.jsp> 566 567config ARCH_W90X900 568 bool "Nuvoton W90X900 CPU" 569 select CPU_ARM926T 570 select ARCH_REQUIRE_GPIOLIB 571 select CLKDEV_LOOKUP 572 select GENERIC_CLOCKEVENTS 573 help 574 Support for Nuvoton (Winbond logic dept.) ARM9 processor, 575 At present, the w90x900 has been renamed nuc900, regarding 576 the ARM series product line, you can login the following 577 link address to know more. 578 579 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ 580 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> 581 582config ARCH_NUC93X 583 bool "Nuvoton NUC93X CPU" 584 select CPU_ARM926T 585 select CLKDEV_LOOKUP 586 help 587 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a 588 low-power and high performance MPEG-4/JPEG multimedia controller chip. 589 590config ARCH_TEGRA 591 bool "NVIDIA Tegra" 592 select CLKDEV_LOOKUP 593 select GENERIC_TIME 594 select GENERIC_CLOCKEVENTS 595 select GENERIC_GPIO 596 select HAVE_CLK 597 select HAVE_SCHED_CLOCK 598 select ARCH_HAS_BARRIERS if CACHE_L2X0 599 select ARCH_HAS_CPUFREQ 600 help 601 This enables support for NVIDIA Tegra based systems (Tegra APX, 602 Tegra 6xx and Tegra 2 series). 603 604config ARCH_PNX4008 605 bool "Philips Nexperia PNX4008 Mobile" 606 select CPU_ARM926T 607 select CLKDEV_LOOKUP 608 select ARCH_USES_GETTIMEOFFSET 609 help 610 This enables support for Philips PNX4008 mobile platform. 611 612config ARCH_PXA 613 bool "PXA2xx/PXA3xx-based" 614 depends on MMU 615 select ARCH_MTD_XIP 616 select ARCH_HAS_CPUFREQ 617 select CLKDEV_LOOKUP 618 select ARCH_REQUIRE_GPIOLIB 619 select GENERIC_CLOCKEVENTS 620 select HAVE_SCHED_CLOCK 621 select TICK_ONESHOT 622 select PLAT_PXA 623 select SPARSE_IRQ 624 help 625 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 626 627config ARCH_MSM 628 bool "Qualcomm MSM" 629 select HAVE_CLK 630 select GENERIC_CLOCKEVENTS 631 select ARCH_REQUIRE_GPIOLIB 632 select CLKDEV_LOOKUP 633 help 634 Support for Qualcomm MSM/QSD based systems. This runs on the 635 apps processor of the MSM/QSD and depends on a shared memory 636 interface to the modem processor which runs the baseband 637 stack and controls some vital subsystems 638 (clock and power control, etc). 639 640config ARCH_SHMOBILE 641 bool "Renesas SH-Mobile / R-Mobile" 642 select HAVE_CLK 643 select CLKDEV_LOOKUP 644 select GENERIC_CLOCKEVENTS 645 select NO_IOPORT 646 select SPARSE_IRQ 647 select MULTI_IRQ_HANDLER 648 help 649 Support for Renesas's SH-Mobile and R-Mobile ARM platforms. 650 651config ARCH_RPC 652 bool "RiscPC" 653 select ARCH_ACORN 654 select FIQ 655 select TIMER_ACORN 656 select ARCH_MAY_HAVE_PC_FDC 657 select HAVE_PATA_PLATFORM 658 select ISA_DMA_API 659 select NO_IOPORT 660 select ARCH_SPARSEMEM_ENABLE 661 select ARCH_USES_GETTIMEOFFSET 662 help 663 On the Acorn Risc-PC, Linux can support the internal IDE disk and 664 CD-ROM interface, serial and parallel port, and the floppy drive. 665 666config ARCH_SA1100 667 bool "SA1100-based" 668 select CPU_SA1100 669 select ISA 670 select ARCH_SPARSEMEM_ENABLE 671 select ARCH_MTD_XIP 672 select ARCH_HAS_CPUFREQ 673 select CPU_FREQ 674 select GENERIC_CLOCKEVENTS 675 select HAVE_CLK 676 select HAVE_SCHED_CLOCK 677 select TICK_ONESHOT 678 select ARCH_REQUIRE_GPIOLIB 679 help 680 Support for StrongARM 11x0 based boards. 681 682config ARCH_S3C2410 683 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" 684 select GENERIC_GPIO 685 select ARCH_HAS_CPUFREQ 686 select HAVE_CLK 687 select ARCH_USES_GETTIMEOFFSET 688 select HAVE_S3C2410_I2C if I2C 689 help 690 Samsung S3C2410X CPU based systems, such as the Simtec Electronics 691 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or 692 the Samsung SMDK2410 development board (and derivatives). 693 694 Note, the S3C2416 and the S3C2450 are so close that they even share 695 the same SoC ID code. This means that there is no seperate machine 696 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. 697 698config ARCH_S3C64XX 699 bool "Samsung S3C64XX" 700 select PLAT_SAMSUNG 701 select CPU_V6 702 select ARM_VIC 703 select HAVE_CLK 704 select NO_IOPORT 705 select ARCH_USES_GETTIMEOFFSET 706 select ARCH_HAS_CPUFREQ 707 select ARCH_REQUIRE_GPIOLIB 708 select SAMSUNG_CLKSRC 709 select SAMSUNG_IRQ_VIC_TIMER 710 select SAMSUNG_IRQ_UART 711 select S3C_GPIO_TRACK 712 select S3C_GPIO_PULL_UPDOWN 713 select S3C_GPIO_CFG_S3C24XX 714 select S3C_GPIO_CFG_S3C64XX 715 select S3C_DEV_NAND 716 select USB_ARCH_HAS_OHCI 717 select SAMSUNG_GPIOLIB_4BIT 718 select HAVE_S3C2410_I2C if I2C 719 select HAVE_S3C2410_WATCHDOG if WATCHDOG 720 help 721 Samsung S3C64XX series based systems 722 723config ARCH_S5P64X0 724 bool "Samsung S5P6440 S5P6450" 725 select CPU_V6 726 select GENERIC_GPIO 727 select HAVE_CLK 728 select HAVE_S3C2410_WATCHDOG if WATCHDOG 729 select GENERIC_CLOCKEVENTS 730 select HAVE_SCHED_CLOCK 731 select HAVE_S3C2410_I2C if I2C 732 select HAVE_S3C_RTC if RTC_CLASS 733 help 734 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 735 SMDK6450. 736 737config ARCH_S5P6442 738 bool "Samsung S5P6442" 739 select CPU_V6 740 select GENERIC_GPIO 741 select HAVE_CLK 742 select ARCH_USES_GETTIMEOFFSET 743 select HAVE_S3C2410_WATCHDOG if WATCHDOG 744 help 745 Samsung S5P6442 CPU based systems 746 747config ARCH_S5PC100 748 bool "Samsung S5PC100" 749 select GENERIC_GPIO 750 select HAVE_CLK 751 select CPU_V7 752 select ARM_L1_CACHE_SHIFT_6 753 select ARCH_USES_GETTIMEOFFSET 754 select HAVE_S3C2410_I2C if I2C 755 select HAVE_S3C_RTC if RTC_CLASS 756 select HAVE_S3C2410_WATCHDOG if WATCHDOG 757 help 758 Samsung S5PC100 series based systems 759 760config ARCH_S5PV210 761 bool "Samsung S5PV210/S5PC110" 762 select CPU_V7 763 select ARCH_SPARSEMEM_ENABLE 764 select GENERIC_GPIO 765 select HAVE_CLK 766 select ARM_L1_CACHE_SHIFT_6 767 select ARCH_HAS_CPUFREQ 768 select GENERIC_CLOCKEVENTS 769 select HAVE_SCHED_CLOCK 770 select HAVE_S3C2410_I2C if I2C 771 select HAVE_S3C_RTC if RTC_CLASS 772 select HAVE_S3C2410_WATCHDOG if WATCHDOG 773 help 774 Samsung S5PV210/S5PC110 series based systems 775 776config ARCH_EXYNOS4 777 bool "Samsung EXYNOS4" 778 select CPU_V7 779 select ARCH_SPARSEMEM_ENABLE 780 select GENERIC_GPIO 781 select HAVE_CLK 782 select ARCH_HAS_CPUFREQ 783 select GENERIC_CLOCKEVENTS 784 select HAVE_S3C_RTC if RTC_CLASS 785 select HAVE_S3C2410_I2C if I2C 786 select HAVE_S3C2410_WATCHDOG if WATCHDOG 787 help 788 Samsung EXYNOS4 series based systems 789 790config ARCH_SHARK 791 bool "Shark" 792 select CPU_SA110 793 select ISA 794 select ISA_DMA 795 select ZONE_DMA 796 select PCI 797 select ARCH_USES_GETTIMEOFFSET 798 help 799 Support for the StrongARM based Digital DNARD machine, also known 800 as "Shark" (<http://www.shark-linux.de/shark.html>). 801 802config ARCH_TCC_926 803 bool "Telechips TCC ARM926-based systems" 804 select CPU_ARM926T 805 select HAVE_CLK 806 select CLKDEV_LOOKUP 807 select GENERIC_CLOCKEVENTS 808 help 809 Support for Telechips TCC ARM926-based systems. 810 811config ARCH_U300 812 bool "ST-Ericsson U300 Series" 813 depends on MMU 814 select CPU_ARM926T 815 select HAVE_SCHED_CLOCK 816 select HAVE_TCM 817 select ARM_AMBA 818 select ARM_VIC 819 select GENERIC_CLOCKEVENTS 820 select CLKDEV_LOOKUP 821 select GENERIC_GPIO 822 help 823 Support for ST-Ericsson U300 series mobile platforms. 824 825config ARCH_U8500 826 bool "ST-Ericsson U8500 Series" 827 select CPU_V7 828 select ARM_AMBA 829 select GENERIC_CLOCKEVENTS 830 select CLKDEV_LOOKUP 831 select ARCH_REQUIRE_GPIOLIB 832 select ARCH_HAS_CPUFREQ 833 help 834 Support for ST-Ericsson's Ux500 architecture 835 836config ARCH_NOMADIK 837 bool "STMicroelectronics Nomadik" 838 select ARM_AMBA 839 select ARM_VIC 840 select CPU_ARM926T 841 select CLKDEV_LOOKUP 842 select GENERIC_CLOCKEVENTS 843 select ARCH_REQUIRE_GPIOLIB 844 help 845 Support for the Nomadik platform by ST-Ericsson 846 847config ARCH_DAVINCI 848 bool "TI DaVinci" 849 select GENERIC_CLOCKEVENTS 850 select ARCH_REQUIRE_GPIOLIB 851 select ZONE_DMA 852 select HAVE_IDE 853 select CLKDEV_LOOKUP 854 select GENERIC_ALLOCATOR 855 select ARCH_HAS_HOLES_MEMORYMODEL 856 help 857 Support for TI's DaVinci platform. 858 859config ARCH_OMAP 860 bool "TI OMAP" 861 select HAVE_CLK 862 select ARCH_REQUIRE_GPIOLIB 863 select ARCH_HAS_CPUFREQ 864 select GENERIC_CLOCKEVENTS 865 select HAVE_SCHED_CLOCK 866 select ARCH_HAS_HOLES_MEMORYMODEL 867 help 868 Support for TI's OMAP platform (OMAP1/2/3/4). 869 870config PLAT_SPEAR 871 bool "ST SPEAr" 872 select ARM_AMBA 873 select ARCH_REQUIRE_GPIOLIB 874 select CLKDEV_LOOKUP 875 select GENERIC_CLOCKEVENTS 876 select HAVE_CLK 877 help 878 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). 879 880config ARCH_VT8500 881 bool "VIA/WonderMedia 85xx" 882 select CPU_ARM926T 883 select GENERIC_GPIO 884 select ARCH_HAS_CPUFREQ 885 select GENERIC_CLOCKEVENTS 886 select ARCH_REQUIRE_GPIOLIB 887 select HAVE_PWM 888 help 889 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. 890endchoice 891 892# 893# This is sorted alphabetically by mach-* pathname. However, plat-* 894# Kconfigs may be included either alphabetically (according to the 895# plat- suffix) or along side the corresponding mach-* source. 896# 897source "arch/arm/mach-at91/Kconfig" 898 899source "arch/arm/mach-bcmring/Kconfig" 900 901source "arch/arm/mach-clps711x/Kconfig" 902 903source "arch/arm/mach-cns3xxx/Kconfig" 904 905source "arch/arm/mach-davinci/Kconfig" 906 907source "arch/arm/mach-dove/Kconfig" 908 909source "arch/arm/mach-ep93xx/Kconfig" 910 911source "arch/arm/mach-footbridge/Kconfig" 912 913source "arch/arm/mach-gemini/Kconfig" 914 915source "arch/arm/mach-h720x/Kconfig" 916 917source "arch/arm/mach-integrator/Kconfig" 918 919source "arch/arm/mach-iop32x/Kconfig" 920 921source "arch/arm/mach-iop33x/Kconfig" 922 923source "arch/arm/mach-iop13xx/Kconfig" 924 925source "arch/arm/mach-ixp4xx/Kconfig" 926 927source "arch/arm/mach-ixp2000/Kconfig" 928 929source "arch/arm/mach-ixp23xx/Kconfig" 930 931source "arch/arm/mach-kirkwood/Kconfig" 932 933source "arch/arm/mach-ks8695/Kconfig" 934 935source "arch/arm/mach-loki/Kconfig" 936 937source "arch/arm/mach-lpc32xx/Kconfig" 938 939source "arch/arm/mach-msm/Kconfig" 940 941source "arch/arm/mach-mv78xx0/Kconfig" 942 943source "arch/arm/plat-mxc/Kconfig" 944 945source "arch/arm/mach-mxs/Kconfig" 946 947source "arch/arm/mach-netx/Kconfig" 948 949source "arch/arm/mach-nomadik/Kconfig" 950source "arch/arm/plat-nomadik/Kconfig" 951 952source "arch/arm/mach-ns9xxx/Kconfig" 953 954source "arch/arm/mach-nuc93x/Kconfig" 955 956source "arch/arm/plat-omap/Kconfig" 957 958source "arch/arm/mach-omap1/Kconfig" 959 960source "arch/arm/mach-omap2/Kconfig" 961 962source "arch/arm/mach-orion5x/Kconfig" 963 964source "arch/arm/mach-pxa/Kconfig" 965source "arch/arm/plat-pxa/Kconfig" 966 967source "arch/arm/mach-mmp/Kconfig" 968 969source "arch/arm/mach-realview/Kconfig" 970 971source "arch/arm/mach-sa1100/Kconfig" 972 973source "arch/arm/plat-samsung/Kconfig" 974source "arch/arm/plat-s3c24xx/Kconfig" 975source "arch/arm/plat-s5p/Kconfig" 976 977source "arch/arm/plat-spear/Kconfig" 978 979source "arch/arm/plat-tcc/Kconfig" 980 981if ARCH_S3C2410 982source "arch/arm/mach-s3c2400/Kconfig" 983source "arch/arm/mach-s3c2410/Kconfig" 984source "arch/arm/mach-s3c2412/Kconfig" 985source "arch/arm/mach-s3c2416/Kconfig" 986source "arch/arm/mach-s3c2440/Kconfig" 987source "arch/arm/mach-s3c2443/Kconfig" 988endif 989 990if ARCH_S3C64XX 991source "arch/arm/mach-s3c64xx/Kconfig" 992endif 993 994source "arch/arm/mach-s5p64x0/Kconfig" 995 996source "arch/arm/mach-s5p6442/Kconfig" 997 998source "arch/arm/mach-s5pc100/Kconfig" 999 1000source "arch/arm/mach-s5pv210/Kconfig" 1001 1002source "arch/arm/mach-exynos4/Kconfig" 1003 1004source "arch/arm/mach-shmobile/Kconfig" 1005 1006source "arch/arm/plat-stmp3xxx/Kconfig" 1007 1008source "arch/arm/mach-tegra/Kconfig" 1009 1010source "arch/arm/mach-u300/Kconfig" 1011 1012source "arch/arm/mach-ux500/Kconfig" 1013 1014source "arch/arm/mach-versatile/Kconfig" 1015 1016source "arch/arm/mach-vexpress/Kconfig" 1017source "arch/arm/plat-versatile/Kconfig" 1018 1019source "arch/arm/mach-vt8500/Kconfig" 1020 1021source "arch/arm/mach-w90x900/Kconfig" 1022 1023# Definitions to make life easier 1024config ARCH_ACORN 1025 bool 1026 1027config PLAT_IOP 1028 bool 1029 select GENERIC_CLOCKEVENTS 1030 select HAVE_SCHED_CLOCK 1031 1032config PLAT_ORION 1033 bool 1034 select HAVE_SCHED_CLOCK 1035 1036config PLAT_PXA 1037 bool 1038 1039config PLAT_VERSATILE 1040 bool 1041 1042config ARM_TIMER_SP804 1043 bool 1044 1045source arch/arm/mm/Kconfig 1046 1047config IWMMXT 1048 bool "Enable iWMMXt support" 1049 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 1050 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP 1051 help 1052 Enable support for iWMMXt context switching at run time if 1053 running on a CPU that supports it. 1054 1055# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER 1056config XSCALE_PMU 1057 bool 1058 depends on CPU_XSCALE && !XSCALE_PMU_TIMER 1059 default y 1060 1061config CPU_HAS_PMU 1062 depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ 1063 (!ARCH_OMAP3 || OMAP3_EMU) 1064 default y 1065 bool 1066 1067config MULTI_IRQ_HANDLER 1068 bool 1069 help 1070 Allow each machine to specify it's own IRQ handler at run time. 1071 1072if !MMU 1073source "arch/arm/Kconfig-nommu" 1074endif 1075 1076config ARM_ERRATA_411920 1077 bool "ARM errata: Invalidation of the Instruction Cache operation can fail" 1078 depends on CPU_V6 || CPU_V6K 1079 help 1080 Invalidation of the Instruction Cache operation can 1081 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. 1082 It does not affect the MPCore. This option enables the ARM Ltd. 1083 recommended workaround. 1084 1085config ARM_ERRATA_430973 1086 bool "ARM errata: Stale prediction on replaced interworking branch" 1087 depends on CPU_V7 1088 help 1089 This option enables the workaround for the 430973 Cortex-A8 1090 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb 1091 interworking branch is replaced with another code sequence at the 1092 same virtual address, whether due to self-modifying code or virtual 1093 to physical address re-mapping, Cortex-A8 does not recover from the 1094 stale interworking branch prediction. This results in Cortex-A8 1095 executing the new code sequence in the incorrect ARM or Thumb state. 1096 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE 1097 and also flushes the branch target cache at every context switch. 1098 Note that setting specific bits in the ACTLR register may not be 1099 available in non-secure mode. 1100 1101config ARM_ERRATA_458693 1102 bool "ARM errata: Processor deadlock when a false hazard is created" 1103 depends on CPU_V7 1104 help 1105 This option enables the workaround for the 458693 Cortex-A8 (r2p0) 1106 erratum. For very specific sequences of memory operations, it is 1107 possible for a hazard condition intended for a cache line to instead 1108 be incorrectly associated with a different cache line. This false 1109 hazard might then cause a processor deadlock. The workaround enables 1110 the L1 caching of the NEON accesses and disables the PLD instruction 1111 in the ACTLR register. Note that setting specific bits in the ACTLR 1112 register may not be available in non-secure mode. 1113 1114config ARM_ERRATA_460075 1115 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" 1116 depends on CPU_V7 1117 help 1118 This option enables the workaround for the 460075 Cortex-A8 (r2p0) 1119 erratum. Any asynchronous access to the L2 cache may encounter a 1120 situation in which recent store transactions to the L2 cache are lost 1121 and overwritten with stale memory contents from external memory. The 1122 workaround disables the write-allocate mode for the L2 cache via the 1123 ACTLR register. Note that setting specific bits in the ACTLR register 1124 may not be available in non-secure mode. 1125 1126config ARM_ERRATA_742230 1127 bool "ARM errata: DMB operation may be faulty" 1128 depends on CPU_V7 && SMP 1129 help 1130 This option enables the workaround for the 742230 Cortex-A9 1131 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction 1132 between two write operations may not ensure the correct visibility 1133 ordering of the two writes. This workaround sets a specific bit in 1134 the diagnostic register of the Cortex-A9 which causes the DMB 1135 instruction to behave as a DSB, ensuring the correct behaviour of 1136 the two writes. 1137 1138config ARM_ERRATA_742231 1139 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" 1140 depends on CPU_V7 && SMP 1141 help 1142 This option enables the workaround for the 742231 Cortex-A9 1143 (r2p0..r2p2) erratum. Under certain conditions, specific to the 1144 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, 1145 accessing some data located in the same cache line, may get corrupted 1146 data due to bad handling of the address hazard when the line gets 1147 replaced from one of the CPUs at the same time as another CPU is 1148 accessing it. This workaround sets specific bits in the diagnostic 1149 register of the Cortex-A9 which reduces the linefill issuing 1150 capabilities of the processor. 1151 1152config PL310_ERRATA_588369 1153 bool "Clean & Invalidate maintenance operations do not invalidate clean lines" 1154 depends on CACHE_L2X0 1155 help 1156 The PL310 L2 cache controller implements three types of Clean & 1157 Invalidate maintenance operations: by Physical Address 1158 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). 1159 They are architecturally defined to behave as the execution of a 1160 clean operation followed immediately by an invalidate operation, 1161 both performing to the same memory location. This functionality 1162 is not correctly implemented in PL310 as clean lines are not 1163 invalidated as a result of these operations. 1164 1165config ARM_ERRATA_720789 1166 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" 1167 depends on CPU_V7 && SMP 1168 help 1169 This option enables the workaround for the 720789 Cortex-A9 (prior to 1170 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the 1171 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. 1172 As a consequence of this erratum, some TLB entries which should be 1173 invalidated are not, resulting in an incoherency in the system page 1174 tables. The workaround changes the TLB flushing routines to invalidate 1175 entries regardless of the ASID. 1176 1177config PL310_ERRATA_727915 1178 bool "Background Clean & Invalidate by Way operation can cause data corruption" 1179 depends on CACHE_L2X0 1180 help 1181 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 1182 operation (offset 0x7FC). This operation runs in background so that 1183 PL310 can handle normal accesses while it is in progress. Under very 1184 rare circumstances, due to this erratum, write data can be lost when 1185 PL310 treats a cacheable write transaction during a Clean & 1186 Invalidate by Way operation. 1187 1188config ARM_ERRATA_743622 1189 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" 1190 depends on CPU_V7 1191 help 1192 This option enables the workaround for the 743622 Cortex-A9 1193 (r2p0..r2p2) erratum. Under very rare conditions, a faulty 1194 optimisation in the Cortex-A9 Store Buffer may lead to data 1195 corruption. This workaround sets a specific bit in the diagnostic 1196 register of the Cortex-A9 which disables the Store Buffer 1197 optimisation, preventing the defect from occurring. This has no 1198 visible impact on the overall performance or power consumption of the 1199 processor. 1200 1201config ARM_ERRATA_751472 1202 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" 1203 depends on CPU_V7 && SMP 1204 help 1205 This option enables the workaround for the 751472 Cortex-A9 (prior 1206 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the 1207 completion of a following broadcasted operation if the second 1208 operation is received by a CPU before the ICIALLUIS has completed, 1209 potentially leading to corrupted entries in the cache or TLB. 1210 1211config ARM_ERRATA_753970 1212 bool "ARM errata: cache sync operation may be faulty" 1213 depends on CACHE_PL310 1214 help 1215 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 1216 1217 Under some condition the effect of cache sync operation on 1218 the store buffer still remains when the operation completes. 1219 This means that the store buffer is always asked to drain and 1220 this prevents it from merging any further writes. The workaround 1221 is to replace the normal offset of cache sync operation (0x730) 1222 by another offset targeting an unmapped PL310 register 0x740. 1223 This has the same effect as the cache sync operation: store buffer 1224 drain and waiting for all buffers empty. 1225 1226config ARM_ERRATA_754322 1227 bool "ARM errata: possible faulty MMU translations following an ASID switch" 1228 depends on CPU_V7 1229 help 1230 This option enables the workaround for the 754322 Cortex-A9 (r2p*, 1231 r3p*) erratum. A speculative memory access may cause a page table walk 1232 which starts prior to an ASID switch but completes afterwards. This 1233 can populate the micro-TLB with a stale entry which may be hit with 1234 the new ASID. This workaround places two dsb instructions in the mm 1235 switching code so that no page table walks can cross the ASID switch. 1236 1237config ARM_ERRATA_754327 1238 bool "ARM errata: no automatic Store Buffer drain" 1239 depends on CPU_V7 && SMP 1240 help 1241 This option enables the workaround for the 754327 Cortex-A9 (prior to 1242 r2p0) erratum. The Store Buffer does not have any automatic draining 1243 mechanism and therefore a livelock may occur if an external agent 1244 continuously polls a memory location waiting to observe an update. 1245 This workaround defines cpu_relax() as smp_mb(), preventing correctly 1246 written polling loops from denying visibility of updates to memory. 1247 1248endmenu 1249 1250source "arch/arm/common/Kconfig" 1251 1252menu "Bus support" 1253 1254config ARM_AMBA 1255 bool 1256 1257config ISA 1258 bool 1259 help 1260 Find out whether you have ISA slots on your motherboard. ISA is the 1261 name of a bus system, i.e. the way the CPU talks to the other stuff 1262 inside your box. Other bus systems are PCI, EISA, MicroChannel 1263 (MCA) or VESA. ISA is an older system, now being displaced by PCI; 1264 newer boards don't support it. If you have ISA, say Y, otherwise N. 1265 1266# Select ISA DMA controller support 1267config ISA_DMA 1268 bool 1269 select ISA_DMA_API 1270 1271# Select ISA DMA interface 1272config ISA_DMA_API 1273 bool 1274 1275config PCI 1276 bool "PCI support" if MIGHT_HAVE_PCI 1277 help 1278 Find out whether you have a PCI motherboard. PCI is the name of a 1279 bus system, i.e. the way the CPU talks to the other stuff inside 1280 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or 1281 VESA. If you have PCI, say Y, otherwise N. 1282 1283config PCI_DOMAINS 1284 bool 1285 depends on PCI 1286 1287config PCI_NANOENGINE 1288 bool "BSE nanoEngine PCI support" 1289 depends on SA1100_NANOENGINE 1290 help 1291 Enable PCI on the BSE nanoEngine board. 1292 1293config PCI_SYSCALL 1294 def_bool PCI 1295 1296# Select the host bridge type 1297config PCI_HOST_VIA82C505 1298 bool 1299 depends on PCI && ARCH_SHARK 1300 default y 1301 1302config PCI_HOST_ITE8152 1303 bool 1304 depends on PCI && MACH_ARMCORE 1305 default y 1306 select DMABOUNCE 1307 1308source "drivers/pci/Kconfig" 1309 1310source "drivers/pcmcia/Kconfig" 1311 1312endmenu 1313 1314menu "Kernel Features" 1315 1316source "kernel/time/Kconfig" 1317 1318config SMP 1319 bool "Symmetric Multi-Processing (EXPERIMENTAL)" 1320 depends on EXPERIMENTAL 1321 depends on CPU_V6K || CPU_V7 1322 depends on GENERIC_CLOCKEVENTS 1323 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ 1324 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ 1325 ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ 1326 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE 1327 select USE_GENERIC_SMP_HELPERS 1328 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP 1329 help 1330 This enables support for systems with more than one CPU. If you have 1331 a system with only one CPU, like most personal computers, say N. If 1332 you have a system with more than one CPU, say Y. 1333 1334 If you say N here, the kernel will run on single and multiprocessor 1335 machines, but will use only one CPU of a multiprocessor machine. If 1336 you say Y here, the kernel will run on many, but not all, single 1337 processor machines. On a single processor machine, the kernel will 1338 run faster if you say N here. 1339 1340 See also <file:Documentation/i386/IO-APIC.txt>, 1341 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at 1342 <http://tldp.org/HOWTO/SMP-HOWTO.html>. 1343 1344 If you don't know what to do here, say N. 1345 1346config SMP_ON_UP 1347 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" 1348 depends on EXPERIMENTAL 1349 depends on SMP && !XIP_KERNEL 1350 default y 1351 help 1352 SMP kernels contain instructions which fail on non-SMP processors. 1353 Enabling this option allows the kernel to modify itself to make 1354 these instructions safe. Disabling it allows about 1K of space 1355 savings. 1356 1357 If you don't know what to do here, say Y. 1358 1359config HAVE_ARM_SCU 1360 bool 1361 depends on SMP 1362 help 1363 This option enables support for the ARM system coherency unit 1364 1365config HAVE_ARM_TWD 1366 bool 1367 depends on SMP 1368 select TICK_ONESHOT 1369 help 1370 This options enables support for the ARM timer and watchdog unit 1371 1372choice 1373 prompt "Memory split" 1374 default VMSPLIT_3G 1375 help 1376 Select the desired split between kernel and user memory. 1377 1378 If you are not absolutely sure what you are doing, leave this 1379 option alone! 1380 1381 config VMSPLIT_3G 1382 bool "3G/1G user/kernel split" 1383 config VMSPLIT_2G 1384 bool "2G/2G user/kernel split" 1385 config VMSPLIT_1G 1386 bool "1G/3G user/kernel split" 1387endchoice 1388 1389config PAGE_OFFSET 1390 hex 1391 default 0x40000000 if VMSPLIT_1G 1392 default 0x80000000 if VMSPLIT_2G 1393 default 0xC0000000 1394 1395config NR_CPUS 1396 int "Maximum number of CPUs (2-32)" 1397 range 2 32 1398 depends on SMP 1399 default "4" 1400 1401config HOTPLUG_CPU 1402 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 1403 depends on SMP && HOTPLUG && EXPERIMENTAL 1404 depends on !ARCH_MSM 1405 help 1406 Say Y here to experiment with turning CPUs off and on. CPUs 1407 can be controlled through /sys/devices/system/cpu. 1408 1409config LOCAL_TIMERS 1410 bool "Use local timer interrupts" 1411 depends on SMP 1412 default y 1413 select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) 1414 help 1415 Enable support for local timers on SMP platforms, rather then the 1416 legacy IPI broadcast method. Local timers allows the system 1417 accounting to be spread across the timer interval, preventing a 1418 "thundering herd" at every timer tick. 1419 1420source kernel/Kconfig.preempt 1421 1422config HZ 1423 int 1424 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ 1425 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_EXYNOS4 1426 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER 1427 default AT91_TIMER_HZ if ARCH_AT91 1428 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE 1429 default 100 1430 1431config THUMB2_KERNEL 1432 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" 1433 depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL 1434 select AEABI 1435 select ARM_ASM_UNIFIED 1436 help 1437 By enabling this option, the kernel will be compiled in 1438 Thumb-2 mode. A compiler/assembler that understand the unified 1439 ARM-Thumb syntax is needed. 1440 1441 If unsure, say N. 1442 1443config THUMB2_AVOID_R_ARM_THM_JUMP11 1444 bool "Work around buggy Thumb-2 short branch relocations in gas" 1445 depends on THUMB2_KERNEL && MODULES 1446 default y 1447 help 1448 Various binutils versions can resolve Thumb-2 branches to 1449 locally-defined, preemptible global symbols as short-range "b.n" 1450 branch instructions. 1451 1452 This is a problem, because there's no guarantee the final 1453 destination of the symbol, or any candidate locations for a 1454 trampoline, are within range of the branch. For this reason, the 1455 kernel does not support fixing up the R_ARM_THM_JUMP11 (102) 1456 relocation in modules at all, and it makes little sense to add 1457 support. 1458 1459 The symptom is that the kernel fails with an "unsupported 1460 relocation" error when loading some modules. 1461 1462 Until fixed tools are available, passing 1463 -fno-optimize-sibling-calls to gcc should prevent gcc generating 1464 code which hits this problem, at the cost of a bit of extra runtime 1465 stack usage in some cases. 1466 1467 The problem is described in more detail at: 1468 https://bugs.launchpad.net/binutils-linaro/+bug/725126 1469 1470 Only Thumb-2 kernels are affected. 1471 1472 Unless you are sure your tools don't have this problem, say Y. 1473 1474config ARM_ASM_UNIFIED 1475 bool 1476 1477config AEABI 1478 bool "Use the ARM EABI to compile the kernel" 1479 help 1480 This option allows for the kernel to be compiled using the latest 1481 ARM ABI (aka EABI). This is only useful if you are using a user 1482 space environment that is also compiled with EABI. 1483 1484 Since there are major incompatibilities between the legacy ABI and 1485 EABI, especially with regard to structure member alignment, this 1486 option also changes the kernel syscall calling convention to 1487 disambiguate both ABIs and allow for backward compatibility support 1488 (selected with CONFIG_OABI_COMPAT). 1489 1490 To use this you need GCC version 4.0.0 or later. 1491 1492config OABI_COMPAT 1493 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" 1494 depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL 1495 default y 1496 help 1497 This option preserves the old syscall interface along with the 1498 new (ARM EABI) one. It also provides a compatibility layer to 1499 intercept syscalls that have structure arguments which layout 1500 in memory differs between the legacy ABI and the new ARM EABI 1501 (only for non "thumb" binaries). This option adds a tiny 1502 overhead to all syscalls and produces a slightly larger kernel. 1503 If you know you'll be using only pure EABI user space then you 1504 can say N here. If this option is not selected and you attempt 1505 to execute a legacy ABI binary then the result will be 1506 UNPREDICTABLE (in fact it can be predicted that it won't work 1507 at all). If in doubt say Y. 1508 1509config ARCH_HAS_HOLES_MEMORYMODEL 1510 bool 1511 1512config ARCH_SPARSEMEM_ENABLE 1513 bool 1514 1515config ARCH_SPARSEMEM_DEFAULT 1516 def_bool ARCH_SPARSEMEM_ENABLE 1517 1518config ARCH_SELECT_MEMORY_MODEL 1519 def_bool ARCH_SPARSEMEM_ENABLE 1520 1521config HIGHMEM 1522 bool "High Memory Support (EXPERIMENTAL)" 1523 depends on MMU && EXPERIMENTAL 1524 help 1525 The address space of ARM processors is only 4 Gigabytes large 1526 and it has to accommodate user address space, kernel address 1527 space as well as some memory mapped IO. That means that, if you 1528 have a large amount of physical memory and/or IO, not all of the 1529 memory can be "permanently mapped" by the kernel. The physical 1530 memory that is not permanently mapped is called "high memory". 1531 1532 Depending on the selected kernel/user memory split, minimum 1533 vmalloc space and actual amount of RAM, you may not need this 1534 option which should result in a slightly faster kernel. 1535 1536 If unsure, say n. 1537 1538config HIGHPTE 1539 bool "Allocate 2nd-level pagetables from highmem" 1540 depends on HIGHMEM 1541 depends on !OUTER_CACHE 1542 1543config HW_PERF_EVENTS 1544 bool "Enable hardware performance counter support for perf events" 1545 depends on PERF_EVENTS && CPU_HAS_PMU 1546 default y 1547 help 1548 Enable hardware performance counter support for perf events. If 1549 disabled, perf events will use software events only. 1550 1551source "mm/Kconfig" 1552 1553config FORCE_MAX_ZONEORDER 1554 int "Maximum zone order" if ARCH_SHMOBILE 1555 range 11 64 if ARCH_SHMOBILE 1556 default "9" if SA1111 1557 default "11" 1558 help 1559 The kernel memory allocator divides physically contiguous memory 1560 blocks into "zones", where each zone is a power of two number of 1561 pages. This option selects the largest power of two that the kernel 1562 keeps in the memory allocator. If you need to allocate very large 1563 blocks of physically contiguous memory, then you may need to 1564 increase this value. 1565 1566 This config option is actually maximum order plus one. For example, 1567 a value of 11 means that the largest free memory block is 2^10 pages. 1568 1569config LEDS 1570 bool "Timer and CPU usage LEDs" 1571 depends on ARCH_CDB89712 || ARCH_EBSA110 || \ 1572 ARCH_EBSA285 || ARCH_INTEGRATOR || \ 1573 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ 1574 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ 1575 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ 1576 ARCH_AT91 || ARCH_DAVINCI || \ 1577 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW 1578 help 1579 If you say Y here, the LEDs on your machine will be used 1580 to provide useful information about your current system status. 1581 1582 If you are compiling a kernel for a NetWinder or EBSA-285, you will 1583 be able to select which LEDs are active using the options below. If 1584 you are compiling a kernel for the EBSA-110 or the LART however, the 1585 red LED will simply flash regularly to indicate that the system is 1586 still functional. It is safe to say Y here if you have a CATS 1587 system, but the driver will do nothing. 1588 1589config LEDS_TIMER 1590 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ 1591 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1592 || MACH_OMAP_PERSEUS2 1593 depends on LEDS 1594 depends on !GENERIC_CLOCKEVENTS 1595 default y if ARCH_EBSA110 1596 help 1597 If you say Y here, one of the system LEDs (the green one on the 1598 NetWinder, the amber one on the EBSA285, or the red one on the LART) 1599 will flash regularly to indicate that the system is still 1600 operational. This is mainly useful to kernel hackers who are 1601 debugging unstable kernels. 1602 1603 The LART uses the same LED for both Timer LED and CPU usage LED 1604 functions. You may choose to use both, but the Timer LED function 1605 will overrule the CPU usage LED. 1606 1607config LEDS_CPU 1608 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ 1609 !ARCH_OMAP) \ 1610 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ 1611 || MACH_OMAP_PERSEUS2 1612 depends on LEDS 1613 help 1614 If you say Y here, the red LED will be used to give a good real 1615 time indication of CPU usage, by lighting whenever the idle task 1616 is not currently executing. 1617 1618 The LART uses the same LED for both Timer LED and CPU usage LED 1619 functions. You may choose to use both, but the Timer LED function 1620 will overrule the CPU usage LED. 1621 1622config ALIGNMENT_TRAP 1623 bool 1624 depends on CPU_CP15_MMU 1625 default y if !ARCH_EBSA110 1626 select HAVE_PROC_CPU if PROC_FS 1627 help 1628 ARM processors cannot fetch/store information which is not 1629 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 1630 address divisible by 4. On 32-bit ARM processors, these non-aligned 1631 fetch/store instructions will be emulated in software if you say 1632 here, which has a severe performance impact. This is necessary for 1633 correct operation of some network protocols. With an IP-only 1634 configuration it is safe to say N, otherwise say Y. 1635 1636config UACCESS_WITH_MEMCPY 1637 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" 1638 depends on MMU && EXPERIMENTAL 1639 default y if CPU_FEROCEON 1640 help 1641 Implement faster copy_to_user and clear_user methods for CPU 1642 cores where a 8-word STM instruction give significantly higher 1643 memory write throughput than a sequence of individual 32bit stores. 1644 1645 A possible side effect is a slight increase in scheduling latency 1646 between threads sharing the same address space if they invoke 1647 such copy operations with large buffers. 1648 1649 However, if the CPU data cache is using a write-allocate mode, 1650 this option is unlikely to provide any performance gain. 1651 1652config SECCOMP 1653 bool 1654 prompt "Enable seccomp to safely compute untrusted bytecode" 1655 ---help--- 1656 This kernel feature is useful for number crunching applications 1657 that may need to compute untrusted bytecode during their 1658 execution. By using pipes or other transports made available to 1659 the process as file descriptors supporting the read/write 1660 syscalls, it's possible to isolate those applications in 1661 their own address space using seccomp. Once seccomp is 1662 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled 1663 and the task is only allowed to execute a few safe syscalls 1664 defined by each seccomp mode. 1665 1666config CC_STACKPROTECTOR 1667 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1668 depends on EXPERIMENTAL 1669 help 1670 This option turns on the -fstack-protector GCC feature. This 1671 feature puts, at the beginning of functions, a canary value on 1672 the stack just before the return address, and validates 1673 the value just before actually returning. Stack based buffer 1674 overflows (that need to overwrite this return address) now also 1675 overwrite the canary, which gets detected and the attack is then 1676 neutralized via a kernel panic. 1677 This feature requires gcc version 4.2 or above. 1678 1679config DEPRECATED_PARAM_STRUCT 1680 bool "Provide old way to pass kernel parameters" 1681 help 1682 This was deprecated in 2001 and announced to live on for 5 years. 1683 Some old boot loaders still use this way. 1684 1685endmenu 1686 1687menu "Boot options" 1688 1689# Compressed boot loader in ROM. Yes, we really want to ask about 1690# TEXT and BSS so we preserve their values in the config files. 1691config ZBOOT_ROM_TEXT 1692 hex "Compressed ROM boot loader base address" 1693 default "0" 1694 help 1695 The physical address at which the ROM-able zImage is to be 1696 placed in the target. Platforms which normally make use of 1697 ROM-able zImage formats normally set this to a suitable 1698 value in their defconfig file. 1699 1700 If ZBOOT_ROM is not enabled, this has no effect. 1701 1702config ZBOOT_ROM_BSS 1703 hex "Compressed ROM boot loader BSS address" 1704 default "0" 1705 help 1706 The base address of an area of read/write memory in the target 1707 for the ROM-able zImage which must be available while the 1708 decompressor is running. It must be large enough to hold the 1709 entire decompressed kernel plus an additional 128 KiB. 1710 Platforms which normally make use of ROM-able zImage formats 1711 normally set this to a suitable value in their defconfig file. 1712 1713 If ZBOOT_ROM is not enabled, this has no effect. 1714 1715config ZBOOT_ROM 1716 bool "Compressed boot loader in ROM/flash" 1717 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS 1718 help 1719 Say Y here if you intend to execute your compressed kernel image 1720 (zImage) directly from ROM or flash. If unsure, say N. 1721 1722config ZBOOT_ROM_MMCIF 1723 bool "Include MMCIF loader in zImage (EXPERIMENTAL)" 1724 depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL 1725 help 1726 Say Y here to include experimental MMCIF loading code in the 1727 ROM-able zImage. With this enabled it is possible to write the 1728 the ROM-able zImage kernel image to an MMC card and boot the 1729 kernel straight from the reset vector. At reset the processor 1730 Mask ROM will load the first part of the the ROM-able zImage 1731 which in turn loads the rest the kernel image to RAM using the 1732 MMCIF hardware block. 1733 1734config CMDLINE 1735 string "Default kernel command string" 1736 default "" 1737 help 1738 On some architectures (EBSA110 and CATS), there is currently no way 1739 for the boot loader to pass arguments to the kernel. For these 1740 architectures, you should supply some command-line options at build 1741 time by entering them here. As a minimum, you should specify the 1742 memory size and the root device (e.g., mem=64M root=/dev/nfs). 1743 1744config CMDLINE_FORCE 1745 bool "Always use the default kernel command string" 1746 depends on CMDLINE != "" 1747 help 1748 Always use the default kernel command string, even if the boot 1749 loader passes other arguments to the kernel. 1750 This is useful if you cannot or don't want to change the 1751 command-line options your boot loader passes to the kernel. 1752 1753 If unsure, say N. 1754 1755config XIP_KERNEL 1756 bool "Kernel Execute-In-Place from ROM" 1757 depends on !ZBOOT_ROM 1758 help 1759 Execute-In-Place allows the kernel to run from non-volatile storage 1760 directly addressable by the CPU, such as NOR flash. This saves RAM 1761 space since the text section of the kernel is not loaded from flash 1762 to RAM. Read-write sections, such as the data section and stack, 1763 are still copied to RAM. The XIP kernel is not compressed since 1764 it has to run directly from flash, so it will take more space to 1765 store it. The flash address used to link the kernel object files, 1766 and for storing it, is configuration dependent. Therefore, if you 1767 say Y here, you must know the proper physical address where to 1768 store the kernel image depending on your own flash memory usage. 1769 1770 Also note that the make target becomes "make xipImage" rather than 1771 "make zImage" or "make Image". The final kernel binary to put in 1772 ROM memory will be arch/arm/boot/xipImage. 1773 1774 If unsure, say N. 1775 1776config XIP_PHYS_ADDR 1777 hex "XIP Kernel Physical Location" 1778 depends on XIP_KERNEL 1779 default "0x00080000" 1780 help 1781 This is the physical address in your flash memory the kernel will 1782 be linked for and stored to. This address is dependent on your 1783 own flash usage. 1784 1785config KEXEC 1786 bool "Kexec system call (EXPERIMENTAL)" 1787 depends on EXPERIMENTAL 1788 help 1789 kexec is a system call that implements the ability to shutdown your 1790 current kernel, and to start another kernel. It is like a reboot 1791 but it is independent of the system firmware. And like a reboot 1792 you can start any kernel with it, not just Linux. 1793 1794 It is an ongoing process to be certain the hardware in a machine 1795 is properly shutdown, so do not be surprised if this code does not 1796 initially work for you. It may help to enable device hotplugging 1797 support. 1798 1799config ATAGS_PROC 1800 bool "Export atags in procfs" 1801 depends on KEXEC 1802 default y 1803 help 1804 Should the atags used to boot the kernel be exported in an "atags" 1805 file in procfs. Useful with kexec. 1806 1807config CRASH_DUMP 1808 bool "Build kdump crash kernel (EXPERIMENTAL)" 1809 depends on EXPERIMENTAL 1810 help 1811 Generate crash dump after being started by kexec. This should 1812 be normally only set in special crash dump kernels which are 1813 loaded in the main kernel with kexec-tools into a specially 1814 reserved region and then later executed after a crash by 1815 kdump/kexec. The crash dump kernel must be compiled to a 1816 memory address not used by the main kernel 1817 1818 For more details see Documentation/kdump/kdump.txt 1819 1820config AUTO_ZRELADDR 1821 bool "Auto calculation of the decompressed kernel image address" 1822 depends on !ZBOOT_ROM && !ARCH_U300 1823 help 1824 ZRELADDR is the physical address where the decompressed kernel 1825 image will be placed. If AUTO_ZRELADDR is selected, the address 1826 will be determined at run-time by masking the current IP with 1827 0xf8000000. This assumes the zImage being placed in the first 128MB 1828 from start of memory. 1829 1830endmenu 1831 1832menu "CPU Power Management" 1833 1834if ARCH_HAS_CPUFREQ 1835 1836source "drivers/cpufreq/Kconfig" 1837 1838config CPU_FREQ_IMX 1839 tristate "CPUfreq driver for i.MX CPUs" 1840 depends on ARCH_MXC && CPU_FREQ 1841 help 1842 This enables the CPUfreq driver for i.MX CPUs. 1843 1844config CPU_FREQ_SA1100 1845 bool 1846 1847config CPU_FREQ_SA1110 1848 bool 1849 1850config CPU_FREQ_INTEGRATOR 1851 tristate "CPUfreq driver for ARM Integrator CPUs" 1852 depends on ARCH_INTEGRATOR && CPU_FREQ 1853 default y 1854 help 1855 This enables the CPUfreq driver for ARM Integrator CPUs. 1856 1857 For details, take a look at <file:Documentation/cpu-freq>. 1858 1859 If in doubt, say Y. 1860 1861config CPU_FREQ_PXA 1862 bool 1863 depends on CPU_FREQ && ARCH_PXA && PXA25x 1864 default y 1865 select CPU_FREQ_DEFAULT_GOV_USERSPACE 1866 1867config CPU_FREQ_S3C64XX 1868 bool "CPUfreq support for Samsung S3C64XX CPUs" 1869 depends on CPU_FREQ && CPU_S3C6410 1870 1871config CPU_FREQ_S3C 1872 bool 1873 help 1874 Internal configuration node for common cpufreq on Samsung SoC 1875 1876config CPU_FREQ_S3C24XX 1877 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" 1878 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL 1879 select CPU_FREQ_S3C 1880 help 1881 This enables the CPUfreq driver for the Samsung S3C24XX family 1882 of CPUs. 1883 1884 For details, take a look at <file:Documentation/cpu-freq>. 1885 1886 If in doubt, say N. 1887 1888config CPU_FREQ_S3C24XX_PLL 1889 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" 1890 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL 1891 help 1892 Compile in support for changing the PLL frequency from the 1893 S3C24XX series CPUfreq driver. The PLL takes time to settle 1894 after a frequency change, so by default it is not enabled. 1895 1896 This also means that the PLL tables for the selected CPU(s) will 1897 be built which may increase the size of the kernel image. 1898 1899config CPU_FREQ_S3C24XX_DEBUG 1900 bool "Debug CPUfreq Samsung driver core" 1901 depends on CPU_FREQ_S3C24XX 1902 help 1903 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core 1904 1905config CPU_FREQ_S3C24XX_IODEBUG 1906 bool "Debug CPUfreq Samsung driver IO timing" 1907 depends on CPU_FREQ_S3C24XX 1908 help 1909 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core 1910 1911config CPU_FREQ_S3C24XX_DEBUGFS 1912 bool "Export debugfs for CPUFreq" 1913 depends on CPU_FREQ_S3C24XX && DEBUG_FS 1914 help 1915 Export status information via debugfs. 1916 1917endif 1918 1919source "drivers/cpuidle/Kconfig" 1920 1921endmenu 1922 1923menu "Floating point emulation" 1924 1925comment "At least one emulation must be selected" 1926 1927config FPE_NWFPE 1928 bool "NWFPE math emulation" 1929 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL 1930 ---help--- 1931 Say Y to include the NWFPE floating point emulator in the kernel. 1932 This is necessary to run most binaries. Linux does not currently 1933 support floating point hardware so you need to say Y here even if 1934 your machine has an FPA or floating point co-processor podule. 1935 1936 You may say N here if you are going to load the Acorn FPEmulator 1937 early in the bootup. 1938 1939config FPE_NWFPE_XP 1940 bool "Support extended precision" 1941 depends on FPE_NWFPE 1942 help 1943 Say Y to include 80-bit support in the kernel floating-point 1944 emulator. Otherwise, only 32 and 64-bit support is compiled in. 1945 Note that gcc does not generate 80-bit operations by default, 1946 so in most cases this option only enlarges the size of the 1947 floating point emulator without any good reason. 1948 1949 You almost surely want to say N here. 1950 1951config FPE_FASTFPE 1952 bool "FastFPE math emulation (EXPERIMENTAL)" 1953 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL 1954 ---help--- 1955 Say Y here to include the FAST floating point emulator in the kernel. 1956 This is an experimental much faster emulator which now also has full 1957 precision for the mantissa. It does not support any exceptions. 1958 It is very simple, and approximately 3-6 times faster than NWFPE. 1959 1960 It should be sufficient for most programs. It may be not suitable 1961 for scientific calculations, but you have to check this for yourself. 1962 If you do not feel you need a faster FP emulation you should better 1963 choose NWFPE. 1964 1965config VFP 1966 bool "VFP-format floating point maths" 1967 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON 1968 help 1969 Say Y to include VFP support code in the kernel. This is needed 1970 if your hardware includes a VFP unit. 1971 1972 Please see <file:Documentation/arm/VFP/release-notes.txt> for 1973 release notes and additional status information. 1974 1975 Say N if your target does not have VFP hardware. 1976 1977config VFPv3 1978 bool 1979 depends on VFP 1980 default y if CPU_V7 1981 1982config NEON 1983 bool "Advanced SIMD (NEON) Extension support" 1984 depends on VFPv3 && CPU_V7 1985 help 1986 Say Y to include support code for NEON, the ARMv7 Advanced SIMD 1987 Extension. 1988 1989endmenu 1990 1991menu "Userspace binary formats" 1992 1993source "fs/Kconfig.binfmt" 1994 1995config ARTHUR 1996 tristate "RISC OS personality" 1997 depends on !AEABI 1998 help 1999 Say Y here to include the kernel code necessary if you want to run 2000 Acorn RISC OS/Arthur binaries under Linux. This code is still very 2001 experimental; if this sounds frightening, say N and sleep in peace. 2002 You can also say M here to compile this support as a module (which 2003 will be called arthur). 2004 2005endmenu 2006 2007menu "Power management options" 2008 2009source "kernel/power/Kconfig" 2010 2011config ARCH_SUSPEND_POSSIBLE 2012 def_bool y 2013 2014endmenu 2015 2016source "net/Kconfig" 2017 2018source "drivers/Kconfig" 2019 2020source "fs/Kconfig" 2021 2022source "arch/arm/Kconfig.debug" 2023 2024source "security/Kconfig" 2025 2026source "crypto/Kconfig" 2027 2028source "lib/Kconfig"