1#ifndef _ASM_POWERPC_CACHE_H 2#define _ASM_POWERPC_CACHE_H 3 4#ifdef __KERNEL__ 5 6#include <linux/config.h> 7 8/* bytes per L1 cache line */ 9#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) 10#define L1_CACHE_SHIFT 4 11#define MAX_COPY_PREFETCH 1 12#elif defined(CONFIG_PPC32) 13#define L1_CACHE_SHIFT 5 14#define MAX_COPY_PREFETCH 4 15#else /* CONFIG_PPC64 */ 16#define L1_CACHE_SHIFT 7 17#endif 18 19#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 20 21#define SMP_CACHE_BYTES L1_CACHE_BYTES 22#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */ 23 24#if defined(__powerpc64__) && !defined(__ASSEMBLY__) 25struct ppc64_caches { 26 u32 dsize; /* L1 d-cache size */ 27 u32 dline_size; /* L1 d-cache line size */ 28 u32 log_dline_size; 29 u32 dlines_per_page; 30 u32 isize; /* L1 i-cache size */ 31 u32 iline_size; /* L1 i-cache line size */ 32 u32 log_iline_size; 33 u32 ilines_per_page; 34}; 35 36extern struct ppc64_caches ppc64_caches; 37#endif /* __powerpc64__ && ! __ASSEMBLY__ */ 38 39#endif /* __KERNEL__ */ 40#endif /* _ASM_POWERPC_CACHE_H */