tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Register definitions for TI BQ257XX
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
5 */
6
7#define BQ25703_CHARGE_OPTION_0 0x00
8#define BQ25703_CHARGE_CURRENT 0x02
9#define BQ25703_MAX_CHARGE_VOLT 0x04
10#define BQ25703_OTG_VOLT 0x06
11#define BQ25703_OTG_CURRENT 0x08
12#define BQ25703_INPUT_VOLTAGE 0x0a
13#define BQ25703_MIN_VSYS 0x0c
14#define BQ25703_IIN_HOST 0x0e
15#define BQ25703_CHARGER_STATUS 0x20
16#define BQ25703_PROCHOT_STATUS 0x22
17#define BQ25703_IIN_DPM 0x24
18#define BQ25703_ADCIBAT_CHG 0x28
19#define BQ25703_ADCIINCMPIN 0x2a
20#define BQ25703_ADCVSYSVBAT 0x2c
21#define BQ25703_MANUFACT_DEV_ID 0x2e
22#define BQ25703_CHARGE_OPTION_1 0x30
23#define BQ25703_CHARGE_OPTION_2 0x32
24#define BQ25703_CHARGE_OPTION_3 0x34
25#define BQ25703_ADC_OPTION 0x3a
26
27#define BQ25703_EN_LWPWR BIT(15)
28#define BQ25703_WDTMR_ADJ_MASK GENMASK(14, 13)
29#define BQ25703_WDTMR_DISABLE 0
30#define BQ25703_WDTMR_5_SEC 1
31#define BQ25703_WDTMR_88_SEC 2
32#define BQ25703_WDTMR_175_SEC 3
33
34#define BQ25703_ICHG_MASK GENMASK(12, 6)
35#define BQ25703_ICHG_STEP_UA 64000
36#define BQ25703_ICHG_MIN_UA 64000
37#define BQ25703_ICHG_MAX_UA 8128000
38
39#define BQ25703_MAX_CHARGE_VOLT_MASK GENMASK(15, 4)
40#define BQ25703_VBATREG_STEP_UV 16000
41#define BQ25703_VBATREG_MIN_UV 1024000
42#define BQ25703_VBATREG_MAX_UV 19200000
43
44#define BQ25703_OTG_VOLT_MASK GENMASK(13, 6)
45#define BQ25703_OTG_VOLT_STEP_UV 64000
46#define BQ25703_OTG_VOLT_MIN_UV 4480000
47#define BQ25703_OTG_VOLT_MAX_UV 20800000
48#define BQ25703_OTG_VOLT_NUM_VOLT 256
49
50#define BQ25703_OTG_CUR_MASK GENMASK(14, 8)
51#define BQ25703_OTG_CUR_STEP_UA 50000
52#define BQ25703_OTG_CUR_MAX_UA 6350000
53
54#define BQ25703_MINVSYS_MASK GENMASK(13, 8)
55#define BQ25703_MINVSYS_STEP_UV 256000
56#define BQ25703_MINVSYS_MIN_UV 1024000
57#define BQ25703_MINVSYS_MAX_UV 16128000
58
59#define BQ25703_STS_AC_STAT BIT(15)
60#define BQ25703_STS_IN_FCHRG BIT(10)
61#define BQ25703_STS_IN_PCHRG BIT(9)
62#define BQ25703_STS_FAULT_ACOV BIT(7)
63#define BQ25703_STS_FAULT_BATOC BIT(6)
64#define BQ25703_STS_FAULT_ACOC BIT(5)
65
66#define BQ25703_IINDPM_MASK GENMASK(14, 8)
67#define BQ25703_IINDPM_STEP_UA 50000
68#define BQ25703_IINDPM_MIN_UA 50000
69#define BQ25703_IINDPM_MAX_UA 6400000
70#define BQ25703_IINDPM_DEFAULT_UA 3300000
71#define BQ25703_IINDPM_OFFSET_UA 50000
72
73#define BQ25703_ADCIBAT_DISCHG_MASK GENMASK(6, 0)
74#define BQ25703_ADCIBAT_CHG_MASK GENMASK(14, 8)
75#define BQ25703_ADCIBAT_CHG_STEP_UA 64000
76#define BQ25703_ADCIBAT_DIS_STEP_UA 256000
77
78#define BQ25703_ADCIIN GENMASK(15, 8)
79#define BQ25703_ADCIINCMPIN_STEP 50000
80
81#define BQ25703_ADCVSYS_MASK GENMASK(15, 8)
82#define BQ25703_ADCVBAT_MASK GENMASK(7, 0)
83#define BQ25703_ADCVSYSVBAT_OFFSET_UV 2880000
84#define BQ25703_ADCVSYSVBAT_STEP 64000
85
86#define BQ25703_ADC_CH_MASK GENMASK(7, 0)
87#define BQ25703_ADC_CONV_EN BIT(15)
88#define BQ25703_ADC_START BIT(14)
89#define BQ25703_ADC_FULL_SCALE BIT(13)
90#define BQ25703_ADC_CMPIN_EN BIT(7)
91#define BQ25703_ADC_VBUS_EN BIT(6)
92#define BQ25703_ADC_PSYS_EN BIT(5)
93#define BQ25703_ADC_IIN_EN BIT(4)
94#define BQ25703_ADC_IDCHG_EN BIT(3)
95#define BQ25703_ADC_ICHG_EN BIT(2)
96#define BQ25703_ADC_VSYS_EN BIT(1)
97#define BQ25703_ADC_VBAT_EN BIT(0)
98
99#define BQ25703_EN_OTG_MASK BIT(12)
100
101struct bq257xx_device {
102 struct i2c_client *client;
103 struct regmap *regmap;
104};