tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * linux/include/mfd/ucb1x00.h
3 *
4 * Copyright (C) 2001 Russell King, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
9 */
10#ifndef UCB1200_H
11#define UCB1200_H
12
13#include <linux/mfd/mcp.h>
14#include <linux/gpio.h>
15
16#define UCB_IO_DATA 0x00
17#define UCB_IO_DIR 0x01
18
19#define UCB_IO_0 (1 << 0)
20#define UCB_IO_1 (1 << 1)
21#define UCB_IO_2 (1 << 2)
22#define UCB_IO_3 (1 << 3)
23#define UCB_IO_4 (1 << 4)
24#define UCB_IO_5 (1 << 5)
25#define UCB_IO_6 (1 << 6)
26#define UCB_IO_7 (1 << 7)
27#define UCB_IO_8 (1 << 8)
28#define UCB_IO_9 (1 << 9)
29
30#define UCB_IE_RIS 0x02
31#define UCB_IE_FAL 0x03
32#define UCB_IE_STATUS 0x04
33#define UCB_IE_CLEAR 0x04
34#define UCB_IE_ADC (1 << 11)
35#define UCB_IE_TSPX (1 << 12)
36#define UCB_IE_TSMX (1 << 13)
37#define UCB_IE_TCLIP (1 << 14)
38#define UCB_IE_ACLIP (1 << 15)
39
40#define UCB_IRQ_TSPX 12
41
42#define UCB_TC_A 0x05
43#define UCB_TC_A_LOOP (1 << 7) /* UCB1200 */
44#define UCB_TC_A_AMPL (1 << 7) /* UCB1300 */
45
46#define UCB_TC_B 0x06
47#define UCB_TC_B_VOICE_ENA (1 << 3)
48#define UCB_TC_B_CLIP (1 << 4)
49#define UCB_TC_B_ATT (1 << 6)
50#define UCB_TC_B_SIDE_ENA (1 << 11)
51#define UCB_TC_B_MUTE (1 << 13)
52#define UCB_TC_B_IN_ENA (1 << 14)
53#define UCB_TC_B_OUT_ENA (1 << 15)
54
55#define UCB_AC_A 0x07
56#define UCB_AC_B 0x08
57#define UCB_AC_B_LOOP (1 << 8)
58#define UCB_AC_B_MUTE (1 << 13)
59#define UCB_AC_B_IN_ENA (1 << 14)
60#define UCB_AC_B_OUT_ENA (1 << 15)
61
62#define UCB_TS_CR 0x09
63#define UCB_TS_CR_TSMX_POW (1 << 0)
64#define UCB_TS_CR_TSPX_POW (1 << 1)
65#define UCB_TS_CR_TSMY_POW (1 << 2)
66#define UCB_TS_CR_TSPY_POW (1 << 3)
67#define UCB_TS_CR_TSMX_GND (1 << 4)
68#define UCB_TS_CR_TSPX_GND (1 << 5)
69#define UCB_TS_CR_TSMY_GND (1 << 6)
70#define UCB_TS_CR_TSPY_GND (1 << 7)
71#define UCB_TS_CR_MODE_INT (0 << 8)
72#define UCB_TS_CR_MODE_PRES (1 << 8)
73#define UCB_TS_CR_MODE_POS (2 << 8)
74#define UCB_TS_CR_BIAS_ENA (1 << 11)
75#define UCB_TS_CR_TSPX_LOW (1 << 12)
76#define UCB_TS_CR_TSMX_LOW (1 << 13)
77
78#define UCB_ADC_CR 0x0a
79#define UCB_ADC_SYNC_ENA (1 << 0)
80#define UCB_ADC_VREFBYP_CON (1 << 1)
81#define UCB_ADC_INP_TSPX (0 << 2)
82#define UCB_ADC_INP_TSMX (1 << 2)
83#define UCB_ADC_INP_TSPY (2 << 2)
84#define UCB_ADC_INP_TSMY (3 << 2)
85#define UCB_ADC_INP_AD0 (4 << 2)
86#define UCB_ADC_INP_AD1 (5 << 2)
87#define UCB_ADC_INP_AD2 (6 << 2)
88#define UCB_ADC_INP_AD3 (7 << 2)
89#define UCB_ADC_EXT_REF (1 << 5)
90#define UCB_ADC_START (1 << 7)
91#define UCB_ADC_ENA (1 << 15)
92
93#define UCB_ADC_DATA 0x0b
94#define UCB_ADC_DAT_VAL (1 << 15)
95#define UCB_ADC_DAT(x) (((x) & 0x7fe0) >> 5)
96
97#define UCB_ID 0x0c
98#define UCB_ID_1200 0x1004
99#define UCB_ID_1300 0x1005
100#define UCB_ID_TC35143 0x9712
101
102#define UCB_MODE 0x0d
103#define UCB_MODE_DYN_VFLAG_ENA (1 << 12)
104#define UCB_MODE_AUD_OFF_CAN (1 << 13)
105
106
107struct ucb1x00_irq {
108 void *devid;
109 void (*fn)(int, void *);
110};
111
112struct ucb1x00 {
113 spinlock_t lock;
114 struct mcp *mcp;
115 unsigned int irq;
116 struct semaphore adc_sem;
117 spinlock_t io_lock;
118 u16 id;
119 u16 io_dir;
120 u16 io_out;
121 u16 adc_cr;
122 u16 irq_fal_enbl;
123 u16 irq_ris_enbl;
124 struct ucb1x00_irq irq_handler[16];
125 struct device dev;
126 struct list_head node;
127 struct list_head devs;
128 struct gpio_chip gpio;
129};
130
131struct ucb1x00_driver;
132
133struct ucb1x00_dev {
134 struct list_head dev_node;
135 struct list_head drv_node;
136 struct ucb1x00 *ucb;
137 struct ucb1x00_driver *drv;
138 void *priv;
139};
140
141struct ucb1x00_driver {
142 struct list_head node;
143 struct list_head devs;
144 int (*add)(struct ucb1x00_dev *dev);
145 void (*remove)(struct ucb1x00_dev *dev);
146 int (*suspend)(struct ucb1x00_dev *dev, pm_message_t state);
147 int (*resume)(struct ucb1x00_dev *dev);
148};
149
150#define classdev_to_ucb1x00(cd) container_of(cd, struct ucb1x00, dev)
151
152int ucb1x00_register_driver(struct ucb1x00_driver *);
153void ucb1x00_unregister_driver(struct ucb1x00_driver *);
154
155/**
156 * ucb1x00_clkrate - return the UCB1x00 SIB clock rate
157 * @ucb: UCB1x00 structure describing chip
158 *
159 * Return the SIB clock rate in Hz.
160 */
161static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb)
162{
163 return mcp_get_sclk_rate(ucb->mcp);
164}
165
166/**
167 * ucb1x00_enable - enable the UCB1x00 SIB clock
168 * @ucb: UCB1x00 structure describing chip
169 *
170 * Enable the SIB clock. This can be called multiple times.
171 */
172static inline void ucb1x00_enable(struct ucb1x00 *ucb)
173{
174 mcp_enable(ucb->mcp);
175}
176
177/**
178 * ucb1x00_disable - disable the UCB1x00 SIB clock
179 * @ucb: UCB1x00 structure describing chip
180 *
181 * Disable the SIB clock. The SIB clock will only be disabled
182 * when the number of ucb1x00_enable calls match the number of
183 * ucb1x00_disable calls.
184 */
185static inline void ucb1x00_disable(struct ucb1x00 *ucb)
186{
187 mcp_disable(ucb->mcp);
188}
189
190/**
191 * ucb1x00_reg_write - write a UCB1x00 register
192 * @ucb: UCB1x00 structure describing chip
193 * @reg: UCB1x00 4-bit register index to write
194 * @val: UCB1x00 16-bit value to write
195 *
196 * Write the UCB1x00 register @reg with value @val. The SIB
197 * clock must be running for this function to return.
198 */
199static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val)
200{
201 mcp_reg_write(ucb->mcp, reg, val);
202}
203
204/**
205 * ucb1x00_reg_read - read a UCB1x00 register
206 * @ucb: UCB1x00 structure describing chip
207 * @reg: UCB1x00 4-bit register index to write
208 *
209 * Read the UCB1x00 register @reg and return its value. The SIB
210 * clock must be running for this function to return.
211 */
212static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg)
213{
214 return mcp_reg_read(ucb->mcp, reg);
215}
216/**
217 * ucb1x00_set_audio_divisor -
218 * @ucb: UCB1x00 structure describing chip
219 * @div: SIB clock divisor
220 */
221static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div)
222{
223 mcp_set_audio_divisor(ucb->mcp, div);
224}
225
226/**
227 * ucb1x00_set_telecom_divisor -
228 * @ucb: UCB1x00 structure describing chip
229 * @div: SIB clock divisor
230 */
231static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div)
232{
233 mcp_set_telecom_divisor(ucb->mcp, div);
234}
235
236void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int);
237void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int);
238unsigned int ucb1x00_io_read(struct ucb1x00 *ucb);
239
240#define UCB_NOSYNC (0)
241#define UCB_SYNC (1)
242
243unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync);
244void ucb1x00_adc_enable(struct ucb1x00 *ucb);
245void ucb1x00_adc_disable(struct ucb1x00 *ucb);
246
247/*
248 * Which edges of the IRQ do you want to control today?
249 */
250#define UCB_RISING (1 << 0)
251#define UCB_FALLING (1 << 1)
252
253int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid);
254void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
255void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
256int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid);
257
258#endif