tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
6 Copyright (C) 2009 Axel Kollhofer <rain_maker@root-forum.org>
7 <http://rt2x00.serialmonkey.com>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the
21 Free Software Foundation, Inc.,
22 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 */
24
25/*
26 Module: rt2800usb
27 Abstract: Data structures and registers for the rt2800usb module.
28 Supported chipsets: RT2800U.
29 */
30
31#ifndef RT2800USB_H
32#define RT2800USB_H
33
34/*
35 * USB registers.
36 */
37
38/*
39 * USB_DMA_CFG
40 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
41 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
42 * PHY_CLEAR: phy watch dog enable.
43 * TX_CLEAR: Clear USB DMA TX path.
44 * TXOP_HALT: Halt TXOP count down when TX buffer is full.
45 * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
46 * RX_BULK_EN: Enable USB DMA Rx.
47 * TX_BULK_EN: Enable USB DMA Tx.
48 * EP_OUT_VALID: OUT endpoint data valid.
49 * RX_BUSY: USB DMA RX FSM busy.
50 * TX_BUSY: USB DMA TX FSM busy.
51 */
52#define USB_DMA_CFG 0x02a0
53#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
54#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
55#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
56#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
57#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
58#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
59#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
60#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
61#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
62#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
63#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
64
65/*
66 * USB_CYC_CFG
67 */
68#define USB_CYC_CFG 0x02a4
69#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
70
71/*
72 * 8051 firmware image.
73 */
74#define FIRMWARE_RT2870 "rt2870.bin"
75#define FIRMWARE_IMAGE_BASE 0x3000
76
77/*
78 * DMA descriptor defines.
79 */
80#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
81#define RXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
82
83/*
84 * TX Info structure
85 */
86
87/*
88 * Word0
89 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
90 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
91 * 0:MGMT, 1:HCCA 2:EDCA
92 * USB_DMA_NEXT_VALID: Used ONLY in USB bulk Aggregation, NextValid
93 * DMA_TX_BURST: used ONLY in USB bulk Aggregation.
94 * Force USB DMA transmit frame from current selected endpoint
95 */
96#define TXINFO_W0_USB_DMA_TX_PKT_LEN FIELD32(0x0000ffff)
97#define TXINFO_W0_WIV FIELD32(0x01000000)
98#define TXINFO_W0_QSEL FIELD32(0x06000000)
99#define TXINFO_W0_SW_USE_LAST_ROUND FIELD32(0x08000000)
100#define TXINFO_W0_USB_DMA_NEXT_VALID FIELD32(0x40000000)
101#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
102
103/*
104 * RX Info structure
105 */
106
107/*
108 * Word 0
109 */
110
111#define RXINFO_W0_USB_DMA_RX_PKT_LEN FIELD32(0x0000ffff)
112
113/*
114 * RX descriptor format for RX Ring.
115 */
116
117/*
118 * Word0
119 * UNICAST_TO_ME: This RX frame is unicast to me.
120 * MULTICAST: This is a multicast frame.
121 * BROADCAST: This is a broadcast frame.
122 * MY_BSS: this frame belongs to the same BSSID.
123 * CRC_ERROR: CRC error.
124 * CIPHER_ERROR: 0: decryption okay, 1:ICV error, 2:MIC error, 3:KEY not valid.
125 * AMSDU: rx with 802.3 header, not 802.11 header.
126 */
127
128#define RXD_W0_BA FIELD32(0x00000001)
129#define RXD_W0_DATA FIELD32(0x00000002)
130#define RXD_W0_NULLDATA FIELD32(0x00000004)
131#define RXD_W0_FRAG FIELD32(0x00000008)
132#define RXD_W0_UNICAST_TO_ME FIELD32(0x00000010)
133#define RXD_W0_MULTICAST FIELD32(0x00000020)
134#define RXD_W0_BROADCAST FIELD32(0x00000040)
135#define RXD_W0_MY_BSS FIELD32(0x00000080)
136#define RXD_W0_CRC_ERROR FIELD32(0x00000100)
137#define RXD_W0_CIPHER_ERROR FIELD32(0x00000600)
138#define RXD_W0_AMSDU FIELD32(0x00000800)
139#define RXD_W0_HTC FIELD32(0x00001000)
140#define RXD_W0_RSSI FIELD32(0x00002000)
141#define RXD_W0_L2PAD FIELD32(0x00004000)
142#define RXD_W0_AMPDU FIELD32(0x00008000)
143#define RXD_W0_DECRYPTED FIELD32(0x00010000)
144#define RXD_W0_PLCP_RSSI FIELD32(0x00020000)
145#define RXD_W0_CIPHER_ALG FIELD32(0x00040000)
146#define RXD_W0_LAST_AMSDU FIELD32(0x00080000)
147#define RXD_W0_PLCP_SIGNAL FIELD32(0xfff00000)
148
149#endif /* RT2800USB_H */