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1/* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $ 2 * lance.c: Linux/Sparc/Lance driver 3 * 4 * Written 1995, 1996 by Miguel de Icaza 5 * Sources: 6 * The Linux depca driver 7 * The Linux lance driver. 8 * The Linux skeleton driver. 9 * The NetBSD Sparc/Lance driver. 10 * Theo de Raadt (deraadt@openbsd.org) 11 * NCR92C990 Lan Controller manual 12 * 13 * 1.4: 14 * Added support to run with a ledma on the Sun4m 15 * 16 * 1.5: 17 * Added multiple card detection. 18 * 19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost 20 * (ecd@skynet.be) 21 * 22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost 23 * (ecd@skynet.be) 24 * 25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller 26 * (davem@caip.rutgers.edu) 27 * 28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as 29 * this disables auto carrier detection on sun4m. Eddie C. Dost 30 * (ecd@skynet.be) 31 * 32 * 1.7: 33 * 6/26/96: Bug fix for multiple ledmas, miguel. 34 * 35 * 1.8: 36 * Stole multicast code from depca.c, fixed lance_tx. 37 * 38 * 1.9: 39 * 8/21/96: Fixed the multicast code (Pedro Roque) 40 * 41 * 8/28/96: Send fake packet in lance_open() if auto_select is true, 42 * so we can detect the carrier loss condition in time. 43 * Eddie C. Dost (ecd@skynet.be) 44 * 45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an 46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be) 47 * 48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be) 49 * 50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets. 51 * This was the sun4c killer. Shit, stupid bug. 52 * (ecd@skynet.be) 53 * 54 * 1.10: 55 * 1/26/97: Modularize driver. (ecd@skynet.be) 56 * 57 * 1.11: 58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz) 59 * 60 * 1.12: 61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem. 62 * Anton Blanchard (anton@progsoc.uts.edu.au) 63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces. 64 * David S. Miller (davem@redhat.com) 65 * 2.01: 66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com) 67 * 68 */ 69 70#undef DEBUG_DRIVER 71 72static char lancestr[] = "LANCE"; 73 74#include <linux/module.h> 75#include <linux/kernel.h> 76#include <linux/types.h> 77#include <linux/fcntl.h> 78#include <linux/interrupt.h> 79#include <linux/ioport.h> 80#include <linux/in.h> 81#include <linux/slab.h> 82#include <linux/string.h> 83#include <linux/delay.h> 84#include <linux/init.h> 85#include <linux/crc32.h> 86#include <linux/errno.h> 87#include <linux/socket.h> /* Used for the temporal inet entries and routing */ 88#include <linux/route.h> 89#include <linux/netdevice.h> 90#include <linux/etherdevice.h> 91#include <linux/skbuff.h> 92#include <linux/ethtool.h> 93#include <linux/bitops.h> 94#include <linux/dma-mapping.h> 95#include <linux/of.h> 96#include <linux/of_device.h> 97 98#include <asm/system.h> 99#include <asm/io.h> 100#include <asm/dma.h> 101#include <asm/pgtable.h> 102#include <asm/byteorder.h> /* Used by the checksum routines */ 103#include <asm/idprom.h> 104#include <asm/prom.h> 105#include <asm/auxio.h> /* For tpe-link-test? setting */ 106#include <asm/irq.h> 107 108#define DRV_NAME "sunlance" 109#define DRV_VERSION "2.02" 110#define DRV_RELDATE "8/24/03" 111#define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)" 112 113static char version[] = 114 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n"; 115 116MODULE_VERSION(DRV_VERSION); 117MODULE_AUTHOR(DRV_AUTHOR); 118MODULE_DESCRIPTION("Sun Lance ethernet driver"); 119MODULE_LICENSE("GPL"); 120 121/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 122#ifndef LANCE_LOG_TX_BUFFERS 123#define LANCE_LOG_TX_BUFFERS 4 124#define LANCE_LOG_RX_BUFFERS 4 125#endif 126 127#define LE_CSR0 0 128#define LE_CSR1 1 129#define LE_CSR2 2 130#define LE_CSR3 3 131 132#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 133 134#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 135#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 136#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 137#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 138#define LE_C0_MERR 0x0800 /* ME: Memory error */ 139#define LE_C0_RINT 0x0400 /* Received interrupt */ 140#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 141#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 142#define LE_C0_INTR 0x0080 /* Interrupt or error */ 143#define LE_C0_INEA 0x0040 /* Interrupt enable */ 144#define LE_C0_RXON 0x0020 /* Receiver on */ 145#define LE_C0_TXON 0x0010 /* Transmitter on */ 146#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 147#define LE_C0_STOP 0x0004 /* Stop the card */ 148#define LE_C0_STRT 0x0002 /* Start the card */ 149#define LE_C0_INIT 0x0001 /* Init the card */ 150 151#define LE_C3_BSWP 0x4 /* SWAP */ 152#define LE_C3_ACON 0x2 /* ALE Control */ 153#define LE_C3_BCON 0x1 /* Byte control */ 154 155/* Receive message descriptor 1 */ 156#define LE_R1_OWN 0x80 /* Who owns the entry */ 157#define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */ 158#define LE_R1_FRA 0x20 /* FRA: Frame error */ 159#define LE_R1_OFL 0x10 /* OFL: Frame overflow */ 160#define LE_R1_CRC 0x08 /* CRC error */ 161#define LE_R1_BUF 0x04 /* BUF: Buffer error */ 162#define LE_R1_SOP 0x02 /* Start of packet */ 163#define LE_R1_EOP 0x01 /* End of packet */ 164#define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */ 165 166#define LE_T1_OWN 0x80 /* Lance owns the packet */ 167#define LE_T1_ERR 0x40 /* Error summary */ 168#define LE_T1_EMORE 0x10 /* Error: more than one retry needed */ 169#define LE_T1_EONE 0x08 /* Error: one retry needed */ 170#define LE_T1_EDEF 0x04 /* Error: deferred */ 171#define LE_T1_SOP 0x02 /* Start of packet */ 172#define LE_T1_EOP 0x01 /* End of packet */ 173#define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */ 174 175#define LE_T3_BUF 0x8000 /* Buffer error */ 176#define LE_T3_UFL 0x4000 /* Error underflow */ 177#define LE_T3_LCOL 0x1000 /* Error late collision */ 178#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 179#define LE_T3_RTY 0x0400 /* Error retry */ 180#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 181 182#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 183#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 184#define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29) 185#define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK) 186 187#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 188#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 189#define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29) 190#define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK) 191 192#define PKT_BUF_SZ 1544 193#define RX_BUFF_SIZE PKT_BUF_SZ 194#define TX_BUFF_SIZE PKT_BUF_SZ 195 196struct lance_rx_desc { 197 u16 rmd0; /* low address of packet */ 198 u8 rmd1_bits; /* descriptor bits */ 199 u8 rmd1_hadr; /* high address of packet */ 200 s16 length; /* This length is 2s complement (negative)! 201 * Buffer length 202 */ 203 u16 mblength; /* This is the actual number of bytes received */ 204}; 205 206struct lance_tx_desc { 207 u16 tmd0; /* low address of packet */ 208 u8 tmd1_bits; /* descriptor bits */ 209 u8 tmd1_hadr; /* high address of packet */ 210 s16 length; /* Length is 2s complement (negative)! */ 211 u16 misc; 212}; 213 214/* The LANCE initialization block, described in databook. */ 215/* On the Sparc, this block should be on a DMA region */ 216struct lance_init_block { 217 u16 mode; /* Pre-set mode (reg. 15) */ 218 u8 phys_addr[6]; /* Physical ethernet address */ 219 u32 filter[2]; /* Multicast filter. */ 220 221 /* Receive and transmit ring base, along with extra bits. */ 222 u16 rx_ptr; /* receive descriptor addr */ 223 u16 rx_len; /* receive len and high addr */ 224 u16 tx_ptr; /* transmit descriptor addr */ 225 u16 tx_len; /* transmit len and high addr */ 226 227 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */ 228 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 229 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 230 231 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE]; 232 u8 pad[2]; /* align rx_buf for copy_and_sum(). */ 233 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE]; 234}; 235 236#define libdesc_offset(rt, elem) \ 237((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem]))))) 238 239#define libbuff_offset(rt, elem) \ 240((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0]))))) 241 242struct lance_private { 243 void __iomem *lregs; /* Lance RAP/RDP regs. */ 244 void __iomem *dregs; /* DMA controller regs. */ 245 struct lance_init_block __iomem *init_block_iomem; 246 struct lance_init_block *init_block_mem; 247 248 spinlock_t lock; 249 250 int rx_new, tx_new; 251 int rx_old, tx_old; 252 253 struct of_device *ledma; /* If set this points to ledma */ 254 char tpe; /* cable-selection is TPE */ 255 char auto_select; /* cable-selection by carrier */ 256 char burst_sizes; /* ledma SBus burst sizes */ 257 char pio_buffer; /* init block in PIO space? */ 258 259 unsigned short busmaster_regval; 260 261 void (*init_ring)(struct net_device *); 262 void (*rx)(struct net_device *); 263 void (*tx)(struct net_device *); 264 265 char *name; 266 dma_addr_t init_block_dvma; 267 struct net_device *dev; /* Backpointer */ 268 struct of_device *op; 269 struct of_device *lebuffer; 270 struct timer_list multicast_timer; 271}; 272 273#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 274 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 275 lp->tx_old - lp->tx_new-1) 276 277/* Lance registers. */ 278#define RDP 0x00UL /* register data port */ 279#define RAP 0x02UL /* register address port */ 280#define LANCE_REG_SIZE 0x04UL 281 282#define STOP_LANCE(__lp) \ 283do { void __iomem *__base = (__lp)->lregs; \ 284 sbus_writew(LE_CSR0, __base + RAP); \ 285 sbus_writew(LE_C0_STOP, __base + RDP); \ 286} while (0) 287 288int sparc_lance_debug = 2; 289 290/* The Lance uses 24 bit addresses */ 291/* On the Sun4c the DVMA will provide the remaining bytes for us */ 292/* On the Sun4m we have to instruct the ledma to provide them */ 293/* Even worse, on scsi/ether SBUS cards, the init block and the 294 * transmit/receive buffers are addresses as offsets from absolute 295 * zero on the lebuffer PIO area. -DaveM 296 */ 297 298#define LANCE_ADDR(x) ((long)(x) & ~0xff000000) 299 300/* Load the CSR registers */ 301static void load_csrs(struct lance_private *lp) 302{ 303 u32 leptr; 304 305 if (lp->pio_buffer) 306 leptr = 0; 307 else 308 leptr = LANCE_ADDR(lp->init_block_dvma); 309 310 sbus_writew(LE_CSR1, lp->lregs + RAP); 311 sbus_writew(leptr & 0xffff, lp->lregs + RDP); 312 sbus_writew(LE_CSR2, lp->lregs + RAP); 313 sbus_writew(leptr >> 16, lp->lregs + RDP); 314 sbus_writew(LE_CSR3, lp->lregs + RAP); 315 sbus_writew(lp->busmaster_regval, lp->lregs + RDP); 316 317 /* Point back to csr0 */ 318 sbus_writew(LE_CSR0, lp->lregs + RAP); 319} 320 321/* Setup the Lance Rx and Tx rings */ 322static void lance_init_ring_dvma(struct net_device *dev) 323{ 324 struct lance_private *lp = netdev_priv(dev); 325 struct lance_init_block *ib = lp->init_block_mem; 326 dma_addr_t aib = lp->init_block_dvma; 327 __u32 leptr; 328 int i; 329 330 /* Lock out other processes while setting up hardware */ 331 netif_stop_queue(dev); 332 lp->rx_new = lp->tx_new = 0; 333 lp->rx_old = lp->tx_old = 0; 334 335 /* Copy the ethernet address to the lance init block 336 * Note that on the sparc you need to swap the ethernet address. 337 */ 338 ib->phys_addr [0] = dev->dev_addr [1]; 339 ib->phys_addr [1] = dev->dev_addr [0]; 340 ib->phys_addr [2] = dev->dev_addr [3]; 341 ib->phys_addr [3] = dev->dev_addr [2]; 342 ib->phys_addr [4] = dev->dev_addr [5]; 343 ib->phys_addr [5] = dev->dev_addr [4]; 344 345 /* Setup the Tx ring entries */ 346 for (i = 0; i <= TX_RING_SIZE; i++) { 347 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i)); 348 ib->btx_ring [i].tmd0 = leptr; 349 ib->btx_ring [i].tmd1_hadr = leptr >> 16; 350 ib->btx_ring [i].tmd1_bits = 0; 351 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */ 352 ib->btx_ring [i].misc = 0; 353 } 354 355 /* Setup the Rx ring entries */ 356 for (i = 0; i < RX_RING_SIZE; i++) { 357 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i)); 358 359 ib->brx_ring [i].rmd0 = leptr; 360 ib->brx_ring [i].rmd1_hadr = leptr >> 16; 361 ib->brx_ring [i].rmd1_bits = LE_R1_OWN; 362 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000; 363 ib->brx_ring [i].mblength = 0; 364 } 365 366 /* Setup the initialization block */ 367 368 /* Setup rx descriptor pointer */ 369 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0)); 370 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16); 371 ib->rx_ptr = leptr; 372 373 /* Setup tx descriptor pointer */ 374 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0)); 375 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16); 376 ib->tx_ptr = leptr; 377} 378 379static void lance_init_ring_pio(struct net_device *dev) 380{ 381 struct lance_private *lp = netdev_priv(dev); 382 struct lance_init_block __iomem *ib = lp->init_block_iomem; 383 u32 leptr; 384 int i; 385 386 /* Lock out other processes while setting up hardware */ 387 netif_stop_queue(dev); 388 lp->rx_new = lp->tx_new = 0; 389 lp->rx_old = lp->tx_old = 0; 390 391 /* Copy the ethernet address to the lance init block 392 * Note that on the sparc you need to swap the ethernet address. 393 */ 394 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]); 395 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]); 396 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]); 397 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]); 398 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]); 399 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]); 400 401 /* Setup the Tx ring entries */ 402 for (i = 0; i <= TX_RING_SIZE; i++) { 403 leptr = libbuff_offset(tx_buf, i); 404 sbus_writew(leptr, &ib->btx_ring [i].tmd0); 405 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr); 406 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits); 407 408 /* The ones required by tmd2 */ 409 sbus_writew(0xf000, &ib->btx_ring [i].length); 410 sbus_writew(0, &ib->btx_ring [i].misc); 411 } 412 413 /* Setup the Rx ring entries */ 414 for (i = 0; i < RX_RING_SIZE; i++) { 415 leptr = libbuff_offset(rx_buf, i); 416 417 sbus_writew(leptr, &ib->brx_ring [i].rmd0); 418 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr); 419 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits); 420 sbus_writew(-RX_BUFF_SIZE|0xf000, 421 &ib->brx_ring [i].length); 422 sbus_writew(0, &ib->brx_ring [i].mblength); 423 } 424 425 /* Setup the initialization block */ 426 427 /* Setup rx descriptor pointer */ 428 leptr = libdesc_offset(brx_ring, 0); 429 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16), 430 &ib->rx_len); 431 sbus_writew(leptr, &ib->rx_ptr); 432 433 /* Setup tx descriptor pointer */ 434 leptr = libdesc_offset(btx_ring, 0); 435 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16), 436 &ib->tx_len); 437 sbus_writew(leptr, &ib->tx_ptr); 438} 439 440static void init_restart_ledma(struct lance_private *lp) 441{ 442 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 443 444 if (!(csr & DMA_HNDL_ERROR)) { 445 /* E-Cache draining */ 446 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) 447 barrier(); 448 } 449 450 csr = sbus_readl(lp->dregs + DMA_CSR); 451 csr &= ~DMA_E_BURSTS; 452 if (lp->burst_sizes & DMA_BURST32) 453 csr |= DMA_E_BURST32; 454 else 455 csr |= DMA_E_BURST16; 456 457 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV); 458 459 if (lp->tpe) 460 csr |= DMA_EN_ENETAUI; 461 else 462 csr &= ~DMA_EN_ENETAUI; 463 udelay(20); 464 sbus_writel(csr, lp->dregs + DMA_CSR); 465 udelay(200); 466} 467 468static int init_restart_lance(struct lance_private *lp) 469{ 470 u16 regval = 0; 471 int i; 472 473 if (lp->dregs) 474 init_restart_ledma(lp); 475 476 sbus_writew(LE_CSR0, lp->lregs + RAP); 477 sbus_writew(LE_C0_INIT, lp->lregs + RDP); 478 479 /* Wait for the lance to complete initialization */ 480 for (i = 0; i < 100; i++) { 481 regval = sbus_readw(lp->lregs + RDP); 482 483 if (regval & (LE_C0_ERR | LE_C0_IDON)) 484 break; 485 barrier(); 486 } 487 if (i == 100 || (regval & LE_C0_ERR)) { 488 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n", 489 i, regval); 490 if (lp->dregs) 491 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); 492 return -1; 493 } 494 495 /* Clear IDON by writing a "1", enable interrupts and start lance */ 496 sbus_writew(LE_C0_IDON, lp->lregs + RDP); 497 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP); 498 499 if (lp->dregs) { 500 u32 csr = sbus_readl(lp->dregs + DMA_CSR); 501 502 csr |= DMA_INT_ENAB; 503 sbus_writel(csr, lp->dregs + DMA_CSR); 504 } 505 506 return 0; 507} 508 509static void lance_rx_dvma(struct net_device *dev) 510{ 511 struct lance_private *lp = netdev_priv(dev); 512 struct lance_init_block *ib = lp->init_block_mem; 513 struct lance_rx_desc *rd; 514 u8 bits; 515 int len, entry = lp->rx_new; 516 struct sk_buff *skb; 517 518 for (rd = &ib->brx_ring [entry]; 519 !((bits = rd->rmd1_bits) & LE_R1_OWN); 520 rd = &ib->brx_ring [entry]) { 521 522 /* We got an incomplete frame? */ 523 if ((bits & LE_R1_POK) != LE_R1_POK) { 524 dev->stats.rx_over_errors++; 525 dev->stats.rx_errors++; 526 } else if (bits & LE_R1_ERR) { 527 /* Count only the end frame as a rx error, 528 * not the beginning 529 */ 530 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 531 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 532 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 533 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 534 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 535 } else { 536 len = (rd->mblength & 0xfff) - 4; 537 skb = dev_alloc_skb(len + 2); 538 539 if (skb == NULL) { 540 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 541 dev->name); 542 dev->stats.rx_dropped++; 543 rd->mblength = 0; 544 rd->rmd1_bits = LE_R1_OWN; 545 lp->rx_new = RX_NEXT(entry); 546 return; 547 } 548 549 dev->stats.rx_bytes += len; 550 551 skb_reserve(skb, 2); /* 16 byte align */ 552 skb_put(skb, len); /* make room */ 553 skb_copy_to_linear_data(skb, 554 (unsigned char *)&(ib->rx_buf [entry][0]), 555 len); 556 skb->protocol = eth_type_trans(skb, dev); 557 netif_rx(skb); 558 dev->last_rx = jiffies; 559 dev->stats.rx_packets++; 560 } 561 562 /* Return the packet to the pool */ 563 rd->mblength = 0; 564 rd->rmd1_bits = LE_R1_OWN; 565 entry = RX_NEXT(entry); 566 } 567 568 lp->rx_new = entry; 569} 570 571static void lance_tx_dvma(struct net_device *dev) 572{ 573 struct lance_private *lp = netdev_priv(dev); 574 struct lance_init_block *ib = lp->init_block_mem; 575 int i, j; 576 577 spin_lock(&lp->lock); 578 579 j = lp->tx_old; 580 for (i = j; i != lp->tx_new; i = j) { 581 struct lance_tx_desc *td = &ib->btx_ring [i]; 582 u8 bits = td->tmd1_bits; 583 584 /* If we hit a packet not owned by us, stop */ 585 if (bits & LE_T1_OWN) 586 break; 587 588 if (bits & LE_T1_ERR) { 589 u16 status = td->misc; 590 591 dev->stats.tx_errors++; 592 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 593 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 594 595 if (status & LE_T3_CLOS) { 596 dev->stats.tx_carrier_errors++; 597 if (lp->auto_select) { 598 lp->tpe = 1 - lp->tpe; 599 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 600 dev->name, lp->tpe?"TPE":"AUI"); 601 STOP_LANCE(lp); 602 lp->init_ring(dev); 603 load_csrs(lp); 604 init_restart_lance(lp); 605 goto out; 606 } 607 } 608 609 /* Buffer errors and underflows turn off the 610 * transmitter, restart the adapter. 611 */ 612 if (status & (LE_T3_BUF|LE_T3_UFL)) { 613 dev->stats.tx_fifo_errors++; 614 615 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 616 dev->name); 617 STOP_LANCE(lp); 618 lp->init_ring(dev); 619 load_csrs(lp); 620 init_restart_lance(lp); 621 goto out; 622 } 623 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 624 /* 625 * So we don't count the packet more than once. 626 */ 627 td->tmd1_bits = bits & ~(LE_T1_POK); 628 629 /* One collision before packet was sent. */ 630 if (bits & LE_T1_EONE) 631 dev->stats.collisions++; 632 633 /* More than one collision, be optimistic. */ 634 if (bits & LE_T1_EMORE) 635 dev->stats.collisions += 2; 636 637 dev->stats.tx_packets++; 638 } 639 640 j = TX_NEXT(j); 641 } 642 lp->tx_old = j; 643out: 644 if (netif_queue_stopped(dev) && 645 TX_BUFFS_AVAIL > 0) 646 netif_wake_queue(dev); 647 648 spin_unlock(&lp->lock); 649} 650 651static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len) 652{ 653 u16 *p16 = (u16 *) skb->data; 654 u32 *p32; 655 u8 *p8; 656 void __iomem *pbuf = piobuf; 657 658 /* We know here that both src and dest are on a 16bit boundary. */ 659 *p16++ = sbus_readw(pbuf); 660 p32 = (u32 *) p16; 661 pbuf += 2; 662 len -= 2; 663 664 while (len >= 4) { 665 *p32++ = sbus_readl(pbuf); 666 pbuf += 4; 667 len -= 4; 668 } 669 p8 = (u8 *) p32; 670 if (len >= 2) { 671 p16 = (u16 *) p32; 672 *p16++ = sbus_readw(pbuf); 673 pbuf += 2; 674 len -= 2; 675 p8 = (u8 *) p16; 676 } 677 if (len >= 1) 678 *p8 = sbus_readb(pbuf); 679} 680 681static void lance_rx_pio(struct net_device *dev) 682{ 683 struct lance_private *lp = netdev_priv(dev); 684 struct lance_init_block __iomem *ib = lp->init_block_iomem; 685 struct lance_rx_desc __iomem *rd; 686 unsigned char bits; 687 int len, entry; 688 struct sk_buff *skb; 689 690 entry = lp->rx_new; 691 for (rd = &ib->brx_ring [entry]; 692 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN); 693 rd = &ib->brx_ring [entry]) { 694 695 /* We got an incomplete frame? */ 696 if ((bits & LE_R1_POK) != LE_R1_POK) { 697 dev->stats.rx_over_errors++; 698 dev->stats.rx_errors++; 699 } else if (bits & LE_R1_ERR) { 700 /* Count only the end frame as a rx error, 701 * not the beginning 702 */ 703 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++; 704 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++; 705 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++; 706 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++; 707 if (bits & LE_R1_EOP) dev->stats.rx_errors++; 708 } else { 709 len = (sbus_readw(&rd->mblength) & 0xfff) - 4; 710 skb = dev_alloc_skb(len + 2); 711 712 if (skb == NULL) { 713 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", 714 dev->name); 715 dev->stats.rx_dropped++; 716 sbus_writew(0, &rd->mblength); 717 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 718 lp->rx_new = RX_NEXT(entry); 719 return; 720 } 721 722 dev->stats.rx_bytes += len; 723 724 skb_reserve (skb, 2); /* 16 byte align */ 725 skb_put(skb, len); /* make room */ 726 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len); 727 skb->protocol = eth_type_trans(skb, dev); 728 netif_rx(skb); 729 dev->last_rx = jiffies; 730 dev->stats.rx_packets++; 731 } 732 733 /* Return the packet to the pool */ 734 sbus_writew(0, &rd->mblength); 735 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits); 736 entry = RX_NEXT(entry); 737 } 738 739 lp->rx_new = entry; 740} 741 742static void lance_tx_pio(struct net_device *dev) 743{ 744 struct lance_private *lp = netdev_priv(dev); 745 struct lance_init_block __iomem *ib = lp->init_block_iomem; 746 int i, j; 747 748 spin_lock(&lp->lock); 749 750 j = lp->tx_old; 751 for (i = j; i != lp->tx_new; i = j) { 752 struct lance_tx_desc __iomem *td = &ib->btx_ring [i]; 753 u8 bits = sbus_readb(&td->tmd1_bits); 754 755 /* If we hit a packet not owned by us, stop */ 756 if (bits & LE_T1_OWN) 757 break; 758 759 if (bits & LE_T1_ERR) { 760 u16 status = sbus_readw(&td->misc); 761 762 dev->stats.tx_errors++; 763 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++; 764 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++; 765 766 if (status & LE_T3_CLOS) { 767 dev->stats.tx_carrier_errors++; 768 if (lp->auto_select) { 769 lp->tpe = 1 - lp->tpe; 770 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n", 771 dev->name, lp->tpe?"TPE":"AUI"); 772 STOP_LANCE(lp); 773 lp->init_ring(dev); 774 load_csrs(lp); 775 init_restart_lance(lp); 776 goto out; 777 } 778 } 779 780 /* Buffer errors and underflows turn off the 781 * transmitter, restart the adapter. 782 */ 783 if (status & (LE_T3_BUF|LE_T3_UFL)) { 784 dev->stats.tx_fifo_errors++; 785 786 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 787 dev->name); 788 STOP_LANCE(lp); 789 lp->init_ring(dev); 790 load_csrs(lp); 791 init_restart_lance(lp); 792 goto out; 793 } 794 } else if ((bits & LE_T1_POK) == LE_T1_POK) { 795 /* 796 * So we don't count the packet more than once. 797 */ 798 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits); 799 800 /* One collision before packet was sent. */ 801 if (bits & LE_T1_EONE) 802 dev->stats.collisions++; 803 804 /* More than one collision, be optimistic. */ 805 if (bits & LE_T1_EMORE) 806 dev->stats.collisions += 2; 807 808 dev->stats.tx_packets++; 809 } 810 811 j = TX_NEXT(j); 812 } 813 lp->tx_old = j; 814 815 if (netif_queue_stopped(dev) && 816 TX_BUFFS_AVAIL > 0) 817 netif_wake_queue(dev); 818out: 819 spin_unlock(&lp->lock); 820} 821 822static irqreturn_t lance_interrupt(int irq, void *dev_id) 823{ 824 struct net_device *dev = dev_id; 825 struct lance_private *lp = netdev_priv(dev); 826 int csr0; 827 828 sbus_writew(LE_CSR0, lp->lregs + RAP); 829 csr0 = sbus_readw(lp->lregs + RDP); 830 831 /* Acknowledge all the interrupt sources ASAP */ 832 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT), 833 lp->lregs + RDP); 834 835 if ((csr0 & LE_C0_ERR) != 0) { 836 /* Clear the error condition */ 837 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 838 LE_C0_CERR | LE_C0_MERR), 839 lp->lregs + RDP); 840 } 841 842 if (csr0 & LE_C0_RINT) 843 lp->rx(dev); 844 845 if (csr0 & LE_C0_TINT) 846 lp->tx(dev); 847 848 if (csr0 & LE_C0_BABL) 849 dev->stats.tx_errors++; 850 851 if (csr0 & LE_C0_MISS) 852 dev->stats.rx_errors++; 853 854 if (csr0 & LE_C0_MERR) { 855 if (lp->dregs) { 856 u32 addr = sbus_readl(lp->dregs + DMA_ADDR); 857 858 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n", 859 dev->name, csr0, addr & 0xffffff); 860 } else { 861 printk(KERN_ERR "%s: Memory error, status %04x\n", 862 dev->name, csr0); 863 } 864 865 sbus_writew(LE_C0_STOP, lp->lregs + RDP); 866 867 if (lp->dregs) { 868 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR); 869 870 dma_csr |= DMA_FIFO_INV; 871 sbus_writel(dma_csr, lp->dregs + DMA_CSR); 872 } 873 874 lp->init_ring(dev); 875 load_csrs(lp); 876 init_restart_lance(lp); 877 netif_wake_queue(dev); 878 } 879 880 sbus_writew(LE_C0_INEA, lp->lregs + RDP); 881 882 return IRQ_HANDLED; 883} 884 885/* Build a fake network packet and send it to ourselves. */ 886static void build_fake_packet(struct lance_private *lp) 887{ 888 struct net_device *dev = lp->dev; 889 int i, entry; 890 891 entry = lp->tx_new & TX_RING_MOD_MASK; 892 if (lp->pio_buffer) { 893 struct lance_init_block __iomem *ib = lp->init_block_iomem; 894 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]); 895 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet; 896 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++) 897 sbus_writew(0, &packet[i]); 898 for (i = 0; i < 6; i++) { 899 sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]); 900 sbus_writeb(dev->dev_addr[i], &eth->h_source[i]); 901 } 902 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length); 903 sbus_writew(0, &ib->btx_ring[entry].misc); 904 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 905 } else { 906 struct lance_init_block *ib = lp->init_block_mem; 907 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]); 908 struct ethhdr *eth = (struct ethhdr *) packet; 909 memset(packet, 0, ETH_ZLEN); 910 for (i = 0; i < 6; i++) { 911 eth->h_dest[i] = dev->dev_addr[i]; 912 eth->h_source[i] = dev->dev_addr[i]; 913 } 914 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000; 915 ib->btx_ring[entry].misc = 0; 916 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN); 917 } 918 lp->tx_new = TX_NEXT(entry); 919} 920 921static int lance_open(struct net_device *dev) 922{ 923 struct lance_private *lp = netdev_priv(dev); 924 int status = 0; 925 926 STOP_LANCE(lp); 927 928 if (request_irq(dev->irq, &lance_interrupt, IRQF_SHARED, 929 lancestr, (void *) dev)) { 930 printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq); 931 return -EAGAIN; 932 } 933 934 /* On the 4m, setup the ledma to provide the upper bits for buffers */ 935 if (lp->dregs) { 936 u32 regval = lp->init_block_dvma & 0xff000000; 937 938 sbus_writel(regval, lp->dregs + DMA_TEST); 939 } 940 941 /* Set mode and clear multicast filter only at device open, 942 * so that lance_init_ring() called at any error will not 943 * forget multicast filters. 944 * 945 * BTW it is common bug in all lance drivers! --ANK 946 */ 947 if (lp->pio_buffer) { 948 struct lance_init_block __iomem *ib = lp->init_block_iomem; 949 sbus_writew(0, &ib->mode); 950 sbus_writel(0, &ib->filter[0]); 951 sbus_writel(0, &ib->filter[1]); 952 } else { 953 struct lance_init_block *ib = lp->init_block_mem; 954 ib->mode = 0; 955 ib->filter [0] = 0; 956 ib->filter [1] = 0; 957 } 958 959 lp->init_ring(dev); 960 load_csrs(lp); 961 962 netif_start_queue(dev); 963 964 status = init_restart_lance(lp); 965 if (!status && lp->auto_select) { 966 build_fake_packet(lp); 967 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 968 } 969 970 return status; 971} 972 973static int lance_close(struct net_device *dev) 974{ 975 struct lance_private *lp = netdev_priv(dev); 976 977 netif_stop_queue(dev); 978 del_timer_sync(&lp->multicast_timer); 979 980 STOP_LANCE(lp); 981 982 free_irq(dev->irq, (void *) dev); 983 return 0; 984} 985 986static int lance_reset(struct net_device *dev) 987{ 988 struct lance_private *lp = netdev_priv(dev); 989 int status; 990 991 STOP_LANCE(lp); 992 993 /* On the 4m, reset the dma too */ 994 if (lp->dregs) { 995 u32 csr, addr; 996 997 printk(KERN_ERR "resetting ledma\n"); 998 csr = sbus_readl(lp->dregs + DMA_CSR); 999 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1000 udelay(200); 1001 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1002 1003 addr = lp->init_block_dvma & 0xff000000; 1004 sbus_writel(addr, lp->dregs + DMA_TEST); 1005 } 1006 lp->init_ring(dev); 1007 load_csrs(lp); 1008 dev->trans_start = jiffies; 1009 status = init_restart_lance(lp); 1010 return status; 1011} 1012 1013static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len) 1014{ 1015 void __iomem *piobuf = dest; 1016 u32 *p32; 1017 u16 *p16; 1018 u8 *p8; 1019 1020 switch ((unsigned long)src & 0x3) { 1021 case 0: 1022 p32 = (u32 *) src; 1023 while (len >= 4) { 1024 sbus_writel(*p32, piobuf); 1025 p32++; 1026 piobuf += 4; 1027 len -= 4; 1028 } 1029 src = (char *) p32; 1030 break; 1031 case 1: 1032 case 3: 1033 p8 = (u8 *) src; 1034 while (len >= 4) { 1035 u32 val; 1036 1037 val = p8[0] << 24; 1038 val |= p8[1] << 16; 1039 val |= p8[2] << 8; 1040 val |= p8[3]; 1041 sbus_writel(val, piobuf); 1042 p8 += 4; 1043 piobuf += 4; 1044 len -= 4; 1045 } 1046 src = (char *) p8; 1047 break; 1048 case 2: 1049 p16 = (u16 *) src; 1050 while (len >= 4) { 1051 u32 val = p16[0]<<16 | p16[1]; 1052 sbus_writel(val, piobuf); 1053 p16 += 2; 1054 piobuf += 4; 1055 len -= 4; 1056 } 1057 src = (char *) p16; 1058 break; 1059 }; 1060 if (len >= 2) { 1061 u16 val = src[0] << 8 | src[1]; 1062 sbus_writew(val, piobuf); 1063 src += 2; 1064 piobuf += 2; 1065 len -= 2; 1066 } 1067 if (len >= 1) 1068 sbus_writeb(src[0], piobuf); 1069} 1070 1071static void lance_piozero(void __iomem *dest, int len) 1072{ 1073 void __iomem *piobuf = dest; 1074 1075 if ((unsigned long)piobuf & 1) { 1076 sbus_writeb(0, piobuf); 1077 piobuf += 1; 1078 len -= 1; 1079 if (len == 0) 1080 return; 1081 } 1082 if (len == 1) { 1083 sbus_writeb(0, piobuf); 1084 return; 1085 } 1086 if ((unsigned long)piobuf & 2) { 1087 sbus_writew(0, piobuf); 1088 piobuf += 2; 1089 len -= 2; 1090 if (len == 0) 1091 return; 1092 } 1093 while (len >= 4) { 1094 sbus_writel(0, piobuf); 1095 piobuf += 4; 1096 len -= 4; 1097 } 1098 if (len >= 2) { 1099 sbus_writew(0, piobuf); 1100 piobuf += 2; 1101 len -= 2; 1102 } 1103 if (len >= 1) 1104 sbus_writeb(0, piobuf); 1105} 1106 1107static void lance_tx_timeout(struct net_device *dev) 1108{ 1109 struct lance_private *lp = netdev_priv(dev); 1110 1111 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 1112 dev->name, sbus_readw(lp->lregs + RDP)); 1113 lance_reset(dev); 1114 netif_wake_queue(dev); 1115} 1116 1117static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 1118{ 1119 struct lance_private *lp = netdev_priv(dev); 1120 int entry, skblen, len; 1121 1122 skblen = skb->len; 1123 1124 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen; 1125 1126 spin_lock_irq(&lp->lock); 1127 1128 dev->stats.tx_bytes += len; 1129 1130 entry = lp->tx_new & TX_RING_MOD_MASK; 1131 if (lp->pio_buffer) { 1132 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1133 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length); 1134 sbus_writew(0, &ib->btx_ring[entry].misc); 1135 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen); 1136 if (len != skblen) 1137 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen); 1138 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits); 1139 } else { 1140 struct lance_init_block *ib = lp->init_block_mem; 1141 ib->btx_ring [entry].length = (-len) | 0xf000; 1142 ib->btx_ring [entry].misc = 0; 1143 skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen); 1144 if (len != skblen) 1145 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen); 1146 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN); 1147 } 1148 1149 lp->tx_new = TX_NEXT(entry); 1150 1151 if (TX_BUFFS_AVAIL <= 0) 1152 netif_stop_queue(dev); 1153 1154 /* Kick the lance: transmit now */ 1155 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP); 1156 1157 /* Read back CSR to invalidate the E-Cache. 1158 * This is needed, because DMA_DSBL_WR_INV is set. 1159 */ 1160 if (lp->dregs) 1161 sbus_readw(lp->lregs + RDP); 1162 1163 spin_unlock_irq(&lp->lock); 1164 1165 dev->trans_start = jiffies; 1166 dev_kfree_skb(skb); 1167 1168 return 0; 1169} 1170 1171/* taken from the depca driver */ 1172static void lance_load_multicast(struct net_device *dev) 1173{ 1174 struct lance_private *lp = netdev_priv(dev); 1175 struct dev_mc_list *dmi = dev->mc_list; 1176 char *addrs; 1177 int i; 1178 u32 crc; 1179 u32 val; 1180 1181 /* set all multicast bits */ 1182 if (dev->flags & IFF_ALLMULTI) 1183 val = ~0; 1184 else 1185 val = 0; 1186 1187 if (lp->pio_buffer) { 1188 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1189 sbus_writel(val, &ib->filter[0]); 1190 sbus_writel(val, &ib->filter[1]); 1191 } else { 1192 struct lance_init_block *ib = lp->init_block_mem; 1193 ib->filter [0] = val; 1194 ib->filter [1] = val; 1195 } 1196 1197 if (dev->flags & IFF_ALLMULTI) 1198 return; 1199 1200 /* Add addresses */ 1201 for (i = 0; i < dev->mc_count; i++) { 1202 addrs = dmi->dmi_addr; 1203 dmi = dmi->next; 1204 1205 /* multicast address? */ 1206 if (!(*addrs & 1)) 1207 continue; 1208 crc = ether_crc_le(6, addrs); 1209 crc = crc >> 26; 1210 if (lp->pio_buffer) { 1211 struct lance_init_block __iomem *ib = lp->init_block_iomem; 1212 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter; 1213 u16 tmp = sbus_readw(&mcast_table[crc>>4]); 1214 tmp |= 1 << (crc & 0xf); 1215 sbus_writew(tmp, &mcast_table[crc>>4]); 1216 } else { 1217 struct lance_init_block *ib = lp->init_block_mem; 1218 u16 *mcast_table = (u16 *) &ib->filter; 1219 mcast_table [crc >> 4] |= 1 << (crc & 0xf); 1220 } 1221 } 1222} 1223 1224static void lance_set_multicast(struct net_device *dev) 1225{ 1226 struct lance_private *lp = netdev_priv(dev); 1227 struct lance_init_block *ib_mem = lp->init_block_mem; 1228 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem; 1229 u16 mode; 1230 1231 if (!netif_running(dev)) 1232 return; 1233 1234 if (lp->tx_old != lp->tx_new) { 1235 mod_timer(&lp->multicast_timer, jiffies + 4); 1236 netif_wake_queue(dev); 1237 return; 1238 } 1239 1240 netif_stop_queue(dev); 1241 1242 STOP_LANCE(lp); 1243 lp->init_ring(dev); 1244 1245 if (lp->pio_buffer) 1246 mode = sbus_readw(&ib_iomem->mode); 1247 else 1248 mode = ib_mem->mode; 1249 if (dev->flags & IFF_PROMISC) { 1250 mode |= LE_MO_PROM; 1251 if (lp->pio_buffer) 1252 sbus_writew(mode, &ib_iomem->mode); 1253 else 1254 ib_mem->mode = mode; 1255 } else { 1256 mode &= ~LE_MO_PROM; 1257 if (lp->pio_buffer) 1258 sbus_writew(mode, &ib_iomem->mode); 1259 else 1260 ib_mem->mode = mode; 1261 lance_load_multicast(dev); 1262 } 1263 load_csrs(lp); 1264 init_restart_lance(lp); 1265 netif_wake_queue(dev); 1266} 1267 1268static void lance_set_multicast_retry(unsigned long _opaque) 1269{ 1270 struct net_device *dev = (struct net_device *) _opaque; 1271 1272 lance_set_multicast(dev); 1273} 1274 1275static void lance_free_hwresources(struct lance_private *lp) 1276{ 1277 if (lp->lregs) 1278 of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE); 1279 if (lp->dregs) { 1280 struct of_device *ledma = lp->ledma; 1281 1282 of_iounmap(&ledma->resource[0], lp->dregs, 1283 resource_size(&ledma->resource[0])); 1284 } 1285 if (lp->init_block_iomem) { 1286 of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem, 1287 sizeof(struct lance_init_block)); 1288 } else if (lp->init_block_mem) { 1289 dma_free_coherent(&lp->op->dev, 1290 sizeof(struct lance_init_block), 1291 lp->init_block_mem, 1292 lp->init_block_dvma); 1293 } 1294} 1295 1296/* Ethtool support... */ 1297static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1298{ 1299 strcpy(info->driver, "sunlance"); 1300 strcpy(info->version, "2.02"); 1301} 1302 1303static u32 sparc_lance_get_link(struct net_device *dev) 1304{ 1305 /* We really do not keep track of this, but this 1306 * is better than not reporting anything at all. 1307 */ 1308 return 1; 1309} 1310 1311static const struct ethtool_ops sparc_lance_ethtool_ops = { 1312 .get_drvinfo = sparc_lance_get_drvinfo, 1313 .get_link = sparc_lance_get_link, 1314}; 1315 1316static int __devinit sparc_lance_probe_one(struct of_device *op, 1317 struct of_device *ledma, 1318 struct of_device *lebuffer) 1319{ 1320 struct device_node *dp = op->node; 1321 static unsigned version_printed; 1322 struct lance_private *lp; 1323 struct net_device *dev; 1324 DECLARE_MAC_BUF(mac); 1325 int i; 1326 1327 dev = alloc_etherdev(sizeof(struct lance_private) + 8); 1328 if (!dev) 1329 return -ENOMEM; 1330 1331 lp = netdev_priv(dev); 1332 1333 if (sparc_lance_debug && version_printed++ == 0) 1334 printk (KERN_INFO "%s", version); 1335 1336 spin_lock_init(&lp->lock); 1337 1338 /* Copy the IDPROM ethernet address to the device structure, later we 1339 * will copy the address in the device structure to the lance 1340 * initialization block. 1341 */ 1342 for (i = 0; i < 6; i++) 1343 dev->dev_addr[i] = idprom->id_ethaddr[i]; 1344 1345 /* Get the IO region */ 1346 lp->lregs = of_ioremap(&op->resource[0], 0, 1347 LANCE_REG_SIZE, lancestr); 1348 if (!lp->lregs) { 1349 printk(KERN_ERR "SunLance: Cannot map registers.\n"); 1350 goto fail; 1351 } 1352 1353 lp->ledma = ledma; 1354 if (lp->ledma) { 1355 lp->dregs = of_ioremap(&ledma->resource[0], 0, 1356 resource_size(&ledma->resource[0]), 1357 "ledma"); 1358 if (!lp->dregs) { 1359 printk(KERN_ERR "SunLance: Cannot map " 1360 "ledma registers.\n"); 1361 goto fail; 1362 } 1363 } 1364 1365 lp->op = op; 1366 lp->lebuffer = lebuffer; 1367 if (lebuffer) { 1368 /* sanity check */ 1369 if (lebuffer->resource[0].start & 7) { 1370 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n"); 1371 goto fail; 1372 } 1373 lp->init_block_iomem = 1374 of_ioremap(&lebuffer->resource[0], 0, 1375 sizeof(struct lance_init_block), "lebuffer"); 1376 if (!lp->init_block_iomem) { 1377 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n"); 1378 goto fail; 1379 } 1380 lp->init_block_dvma = 0; 1381 lp->pio_buffer = 1; 1382 lp->init_ring = lance_init_ring_pio; 1383 lp->rx = lance_rx_pio; 1384 lp->tx = lance_tx_pio; 1385 } else { 1386 lp->init_block_mem = 1387 dma_alloc_coherent(&op->dev, 1388 sizeof(struct lance_init_block), 1389 &lp->init_block_dvma, GFP_ATOMIC); 1390 if (!lp->init_block_mem) { 1391 printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n"); 1392 goto fail; 1393 } 1394 lp->pio_buffer = 0; 1395 lp->init_ring = lance_init_ring_dvma; 1396 lp->rx = lance_rx_dvma; 1397 lp->tx = lance_tx_dvma; 1398 } 1399 lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval", 1400 (LE_C3_BSWP | 1401 LE_C3_ACON | 1402 LE_C3_BCON)); 1403 1404 lp->name = lancestr; 1405 1406 lp->burst_sizes = 0; 1407 if (lp->ledma) { 1408 struct device_node *ledma_dp = ledma->node; 1409 struct device_node *sbus_dp; 1410 unsigned int sbmask; 1411 const char *prop; 1412 u32 csr; 1413 1414 /* Find burst-size property for ledma */ 1415 lp->burst_sizes = of_getintprop_default(ledma_dp, 1416 "burst-sizes", 0); 1417 1418 /* ledma may be capable of fast bursts, but sbus may not. */ 1419 sbus_dp = ledma_dp->parent; 1420 sbmask = of_getintprop_default(sbus_dp, "burst-sizes", 1421 DMA_BURSTBITS); 1422 lp->burst_sizes &= sbmask; 1423 1424 /* Get the cable-selection property */ 1425 prop = of_get_property(ledma_dp, "cable-selection", NULL); 1426 if (!prop || prop[0] == '\0') { 1427 struct device_node *nd; 1428 1429 printk(KERN_INFO "SunLance: using " 1430 "auto-carrier-detection.\n"); 1431 1432 nd = of_find_node_by_path("/options"); 1433 if (!nd) 1434 goto no_link_test; 1435 1436 prop = of_get_property(nd, "tpe-link-test?", NULL); 1437 if (!prop) 1438 goto no_link_test; 1439 1440 if (strcmp(prop, "true")) { 1441 printk(KERN_NOTICE "SunLance: warning: overriding option " 1442 "'tpe-link-test?'\n"); 1443 printk(KERN_NOTICE "SunLance: warning: mail any problems " 1444 "to ecd@skynet.be\n"); 1445 auxio_set_lte(AUXIO_LTE_ON); 1446 } 1447no_link_test: 1448 lp->auto_select = 1; 1449 lp->tpe = 0; 1450 } else if (!strcmp(prop, "aui")) { 1451 lp->auto_select = 0; 1452 lp->tpe = 0; 1453 } else { 1454 lp->auto_select = 0; 1455 lp->tpe = 1; 1456 } 1457 1458 /* Reset ledma */ 1459 csr = sbus_readl(lp->dregs + DMA_CSR); 1460 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR); 1461 udelay(200); 1462 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR); 1463 } else 1464 lp->dregs = NULL; 1465 1466 lp->dev = dev; 1467 SET_NETDEV_DEV(dev, &op->dev); 1468 dev->open = &lance_open; 1469 dev->stop = &lance_close; 1470 dev->hard_start_xmit = &lance_start_xmit; 1471 dev->tx_timeout = &lance_tx_timeout; 1472 dev->watchdog_timeo = 5*HZ; 1473 dev->set_multicast_list = &lance_set_multicast; 1474 dev->ethtool_ops = &sparc_lance_ethtool_ops; 1475 1476 dev->irq = op->irqs[0]; 1477 1478 /* We cannot sleep if the chip is busy during a 1479 * multicast list update event, because such events 1480 * can occur from interrupts (ex. IPv6). So we 1481 * use a timer to try again later when necessary. -DaveM 1482 */ 1483 init_timer(&lp->multicast_timer); 1484 lp->multicast_timer.data = (unsigned long) dev; 1485 lp->multicast_timer.function = &lance_set_multicast_retry; 1486 1487 if (register_netdev(dev)) { 1488 printk(KERN_ERR "SunLance: Cannot register device.\n"); 1489 goto fail; 1490 } 1491 1492 dev_set_drvdata(&op->dev, lp); 1493 1494 printk(KERN_INFO "%s: LANCE %s\n", 1495 dev->name, print_mac(mac, dev->dev_addr)); 1496 1497 return 0; 1498 1499fail: 1500 lance_free_hwresources(lp); 1501 free_netdev(dev); 1502 return -ENODEV; 1503} 1504 1505static int __devinit sunlance_sbus_probe(struct of_device *op, const struct of_device_id *match) 1506{ 1507 struct of_device *parent = to_of_device(op->dev.parent); 1508 struct device_node *parent_dp = parent->node; 1509 int err; 1510 1511 if (!strcmp(parent_dp->name, "ledma")) { 1512 err = sparc_lance_probe_one(op, parent, NULL); 1513 } else if (!strcmp(parent_dp->name, "lebuffer")) { 1514 err = sparc_lance_probe_one(op, NULL, parent); 1515 } else 1516 err = sparc_lance_probe_one(op, NULL, NULL); 1517 1518 return err; 1519} 1520 1521static int __devexit sunlance_sbus_remove(struct of_device *op) 1522{ 1523 struct lance_private *lp = dev_get_drvdata(&op->dev); 1524 struct net_device *net_dev = lp->dev; 1525 1526 unregister_netdev(net_dev); 1527 1528 lance_free_hwresources(lp); 1529 1530 free_netdev(net_dev); 1531 1532 dev_set_drvdata(&op->dev, NULL); 1533 1534 return 0; 1535} 1536 1537static const struct of_device_id sunlance_sbus_match[] = { 1538 { 1539 .name = "le", 1540 }, 1541 {}, 1542}; 1543 1544MODULE_DEVICE_TABLE(of, sunlance_sbus_match); 1545 1546static struct of_platform_driver sunlance_sbus_driver = { 1547 .name = "sunlance", 1548 .match_table = sunlance_sbus_match, 1549 .probe = sunlance_sbus_probe, 1550 .remove = __devexit_p(sunlance_sbus_remove), 1551}; 1552 1553 1554/* Find all the lance cards on the system and initialize them */ 1555static int __init sparc_lance_init(void) 1556{ 1557 return of_register_driver(&sunlance_sbus_driver, &of_bus_type); 1558} 1559 1560static void __exit sparc_lance_exit(void) 1561{ 1562 of_unregister_driver(&sunlance_sbus_driver); 1563} 1564 1565module_init(sparc_lance_init); 1566module_exit(sparc_lance_exit);