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"Das U-Boot" Source Tree
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
4 * Author: Eric Gao <eric.gao@rock-chips.com>
5 */
6
7#include <clk.h>
8#include <display.h>
9#include <dm.h>
10#include <log.h>
11#include <panel.h>
12#include <regmap.h>
13#include "rk_mipi.h"
14#include <syscon.h>
15#include <asm/gpio.h>
16#include <dm/uclass-internal.h>
17#include <linux/err.h>
18#include <linux/kernel.h>
19#include <asm/arch-rockchip/clock.h>
20#include <asm/arch-rockchip/cru.h>
21#include <asm/arch-rockchip/grf_rk3399.h>
22#include <asm/arch-rockchip/hardware.h>
23#include <asm/arch-rockchip/rockchip_mipi_dsi.h>
24
25/* Select mipi dsi source, big or little vop */
26static int rk_mipi_dsi_source_select(struct udevice *dev)
27{
28 struct rk_mipi_priv *priv = dev_get_priv(dev);
29 struct rk3399_grf_regs *grf = priv->grf;
30 struct display_plat *disp_uc_plat = dev_get_uclass_plat(dev);
31
32 /* Select the video source */
33 switch (disp_uc_plat->source_id) {
34 case VOP_B:
35 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
36 GRF_DSI0_VOP_SEL_B << GRF_DSI0_VOP_SEL_SHIFT);
37 break;
38 case VOP_L:
39 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK,
40 GRF_DSI0_VOP_SEL_L << GRF_DSI0_VOP_SEL_SHIFT);
41 break;
42 default:
43 debug("%s: Invalid VOP id\n", __func__);
44 return -EINVAL;
45 }
46
47 return 0;
48}
49
50/* Setup mipi dphy working mode */
51static void rk_mipi_dphy_mode_set(struct udevice *dev)
52{
53 struct rk_mipi_priv *priv = dev_get_priv(dev);
54 struct rk3399_grf_regs *grf = priv->grf;
55 int val;
56
57 /* Set Controller as TX mode */
58 val = GRF_DPHY_TX0_RXMODE_DIS << GRF_DPHY_TX0_RXMODE_SHIFT;
59 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val);
60
61 /* Exit tx stop mode */
62 val |= GRF_DPHY_TX0_TXSTOPMODE_DIS << GRF_DPHY_TX0_TXSTOPMODE_SHIFT;
63 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val);
64
65 /* Disable turnequest */
66 val |= GRF_DPHY_TX0_TURNREQUEST_DIS << GRF_DPHY_TX0_TURNREQUEST_SHIFT;
67 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val);
68}
69
70/*
71 * This function is called by rk_display_init() using rk_mipi_dsi_enable() and
72 * rk_mipi_phy_enable() to initialize mipi controller and dphy. If success,
73 * enable backlight.
74 */
75static int rk_display_enable(struct udevice *dev, int panel_bpp,
76 const struct display_timing *timing)
77{
78 int ret;
79 struct rk_mipi_priv *priv = dev_get_priv(dev);
80
81 /* Fill the mipi controller parameter */
82 priv->ref_clk = 24 * MHz;
83 priv->sys_clk = priv->ref_clk;
84 priv->pix_clk = timing->pixelclock.typ;
85 priv->phy_clk = priv->pix_clk * 6;
86 priv->txbyte_clk = priv->phy_clk / 8;
87 priv->txesc_clk = 20 * MHz;
88
89 /* Select vop port, big or little */
90 rk_mipi_dsi_source_select(dev);
91
92 /* Set mipi dphy work mode */
93 rk_mipi_dphy_mode_set(dev);
94
95 /* Config and enable mipi dsi according to timing */
96 ret = rk_mipi_dsi_enable(dev, timing);
97 if (ret) {
98 debug("%s: rk_mipi_dsi_enable() failed (err=%d)\n",
99 __func__, ret);
100 return ret;
101 }
102
103 /* Config and enable mipi phy */
104 ret = rk_mipi_phy_enable(dev);
105 if (ret) {
106 debug("%s: rk_mipi_phy_enable() failed (err=%d)\n",
107 __func__, ret);
108 return ret;
109 }
110
111 /* Enable backlight */
112 ret = panel_enable_backlight(priv->panel);
113 if (ret) {
114 debug("%s: panel_enable_backlight() failed (err=%d)\n",
115 __func__, ret);
116 return ret;
117 }
118
119 return 0;
120}
121
122static int rk_mipi_of_to_plat(struct udevice *dev)
123{
124 struct rk_mipi_priv *priv = dev_get_priv(dev);
125
126 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
127 if (IS_ERR_OR_NULL(priv->grf)) {
128 debug("%s: Get syscon grf failed (ret=%p)\n",
129 __func__, priv->grf);
130 return -ENXIO;
131 }
132 priv->regs = dev_read_addr(dev);
133 if (priv->regs == FDT_ADDR_T_NONE) {
134 debug("%s: Get MIPI dsi address failed\n", __func__);
135 return -ENXIO;
136 }
137
138 return 0;
139}
140
141/*
142 * Probe function: check panel existence and readingit's timing. Then config
143 * mipi dsi controller and enable it according to the timing parameter.
144 */
145static int rk_mipi_probe(struct udevice *dev)
146{
147 int ret;
148 struct rk_mipi_priv *priv = dev_get_priv(dev);
149
150 ret = uclass_get_device_by_phandle(UCLASS_PANEL, dev, "rockchip,panel",
151 &priv->panel);
152 if (ret) {
153 debug("%s: Can not find panel (err=%d)\n", __func__, ret);
154 return ret;
155 }
156
157 return 0;
158}
159
160static const struct dm_display_ops rk_mipi_dsi_ops = {
161 .read_timing = rk_mipi_read_timing,
162 .enable = rk_display_enable,
163};
164
165static const struct udevice_id rk_mipi_dsi_ids[] = {
166 { .compatible = "rockchip,rk3399-mipi-dsi" },
167 { .compatible = "rockchip,rk3399_mipi_dsi" },
168 { }
169};
170
171U_BOOT_DRIVER(rk_mipi_dsi) = {
172 .name = "rk_mipi_dsi",
173 .id = UCLASS_DISPLAY,
174 .of_match = rk_mipi_dsi_ids,
175 .of_to_plat = rk_mipi_of_to_plat,
176 .probe = rk_mipi_probe,
177 .ops = &rk_mipi_dsi_ops,
178 .priv_auto = sizeof(struct rk_mipi_priv),
179};