jcs.org
"Das U-Boot" Source Tree
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019, 2021 NXP
4 * Copyright 2024 Gilles Talis <gilles.talis@gmail.com>
5 */
6
7#include "imx8mp-u-boot.dtsi"
8
9/ {
10 wdt-reboot {
11 compatible = "wdt-reboot";
12 wdt = <&wdog1>;
13 bootph-pre-ram;
14 };
15
16 firmware {
17 optee {
18 compatible = "linaro,optee-tz";
19 method = "smc";
20 };
21 };
22};
23
24&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
25 bootph-all;
26};
27
28&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
29 bootph-all;
30};
31
32&gpio1 {
33 bootph-pre-ram;
34};
35
36&gpio2 {
37 bootph-pre-ram;
38};
39
40&gpio3 {
41 bootph-pre-ram;
42};
43
44&gpio4 {
45 bootph-pre-ram;
46};
47
48&gpio5 {
49 bootph-pre-ram;
50};
51
52&i2c1 {
53 bootph-all;
54};
55
56&pinctrl_i2c1 {
57 bootph-pre-ram;
58};
59
60&pinctrl_pmic {
61 bootph-pre-ram;
62};
63
64&pinctrl_uart2 {
65 bootph-pre-ram;
66};
67
68&pinctrl_usdhc2_gpio {
69 bootph-pre-ram;
70};
71
72&pinctrl_usdhc2 {
73 bootph-pre-ram;
74};
75
76&pinctrl_usdhc3 {
77 bootph-pre-ram;
78};
79
80&pinctrl_wdog {
81 bootph-pre-ram;
82};
83
84®_usdhc2_vmmc {
85 u-boot,off-on-delay-us = <20000>;
86};
87
88®_usdhc2_vmmc {
89 bootph-pre-ram;
90};
91
92&uart2 {
93 bootph-pre-ram;
94};
95
96&usdhc1 {
97 bootph-pre-ram;
98};
99
100&usdhc2 {
101 bootph-pre-ram;
102};
103
104&usdhc3 {
105 bootph-pre-ram;
106};
107
108&wdog1 {
109 bootph-pre-ram;
110};