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Serenity Operating System
1/*
2 * Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <Kernel/PCI/IOAccess.h>
28#include <LibBareMetal/IO.h>
29
30namespace Kernel {
31
32void PCI::IOAccess::initialize()
33{
34 if (!PCI::Access::is_initialized())
35 new PCI::IOAccess();
36}
37
38PCI::IOAccess::IOAccess()
39{
40 kprintf("PCI: Using IO Mechanism for PCI Configuartion Space Access\n");
41}
42
43u8 PCI::IOAccess::read8_field(Address address, u32 field)
44{
45 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
46 return IO::in8(PCI_VALUE_PORT + (field & 3));
47}
48
49u16 PCI::IOAccess::read16_field(Address address, u32 field)
50{
51 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
52 return IO::in16(PCI_VALUE_PORT + (field & 2));
53}
54
55u32 PCI::IOAccess::read32_field(Address address, u32 field)
56{
57 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
58 return IO::in32(PCI_VALUE_PORT);
59}
60
61void PCI::IOAccess::write8_field(Address address, u32 field, u8 value)
62{
63 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
64 IO::out8(PCI_VALUE_PORT + (field & 3), value);
65}
66void PCI::IOAccess::write16_field(Address address, u32 field, u16 value)
67{
68 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
69 IO::out16(PCI_VALUE_PORT + (field & 2), value);
70}
71void PCI::IOAccess::write32_field(Address address, u32 field, u32 value)
72{
73 IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
74 IO::out32(PCI_VALUE_PORT, value);
75}
76
77void PCI::IOAccess::enumerate_all(Function<void(Address, ID)>& callback)
78{
79 // Single PCI host controller.
80 if ((read8_field(Address(), PCI_HEADER_TYPE) & 0x80) == 0) {
81 enumerate_bus(-1, 0, callback);
82 return;
83 }
84
85 // Multiple PCI host controllers.
86 for (u8 function = 0; function < 8; ++function) {
87 if (read16_field(Address(0, 0, 0, function), PCI_VENDOR_ID) == PCI_NONE)
88 break;
89 enumerate_bus(-1, function, callback);
90 }
91}
92
93}