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Serenity Operating System
1/*
2 * Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <Kernel/Arch/i386/CPU.h>
28#include <Kernel/Devices/PIT.h>
29#include <Kernel/Interrupts/PIC.h>
30#include <Kernel/Scheduler.h>
31#include <Kernel/Thread.h>
32#include <LibBareMetal/IO.h>
33
34#define IRQ_TIMER 0
35namespace Kernel {
36
37//#define PIT_DEBUG
38
39static PIT* s_the;
40
41void PIT::initialize()
42{
43 if (s_the == nullptr) {
44 s_the = new PIT();
45 }
46}
47
48PIT& PIT::the()
49{
50 ASSERT(s_the != nullptr);
51 return *s_the;
52}
53
54inline static void reset_countdown(u16 timer_reload)
55{
56 IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_COUNTDOWN);
57 IO::out8(TIMER0_CTL, LSB(timer_reload));
58 IO::out8(TIMER0_CTL, MSB(timer_reload));
59}
60
61void PIT::handle_irq(RegisterState& regs)
62{
63#ifdef PIT_DEBUG
64 dbg() << "PIT: Debugging Interrupt.";
65#endif
66 if (++m_ticks_this_second >= TICKS_PER_SECOND) {
67 // FIXME: Synchronize with the RTC somehow to prevent drifting apart.
68 ++m_seconds_since_boot;
69 m_ticks_this_second = 0;
70 }
71 Scheduler::timer_tick(regs);
72}
73
74u32 PIT::ticks_this_second() const
75{
76 return m_ticks_this_second;
77}
78
79PIT::PIT()
80 : HardwareTimer(IRQ_TIMER)
81 , m_default_timer_reload(BASE_FREQUENCY / TICKS_PER_SECOND)
82 , m_ticks_this_second(0)
83{
84
85 IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_SQUARE_WAVE);
86
87 kprintf("PIT: %u Hz, square wave (%x)\n", TICKS_PER_SECOND, m_default_timer_reload);
88
89 IO::out8(TIMER0_CTL, LSB(m_default_timer_reload));
90 IO::out8(TIMER0_CTL, MSB(m_default_timer_reload));
91
92 enable_irq();
93}
94
95}