jcs.org
Serenity Operating System
1/*
2 * Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
3 *
4 * SPDX-License-Identifier: BSD-2-Clause
5 */
6
7#include <Kernel/Bus/PCI/API.h>
8#include <Kernel/Bus/PCI/Definitions.h>
9#include <Kernel/IOWindow.h>
10
11namespace Kernel {
12
13#if ARCH(X86_64)
14ErrorOr<NonnullOwnPtr<IOWindow>> IOWindow::create_for_io_space(IOAddress address, u64 space_length)
15{
16 VERIFY(!Checked<u64>::addition_would_overflow(address.get(), space_length));
17 auto io_address_range = TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOAddressData(address.get(), space_length)));
18 return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(io_address_range))));
19}
20
21IOWindow::IOWindow(NonnullOwnPtr<IOAddressData> io_range)
22 : m_space_type(SpaceType::IO)
23 , m_io_range(move(io_range))
24{
25}
26#endif
27
28ErrorOr<NonnullOwnPtr<IOWindow>> IOWindow::create_from_io_window_with_offset(u64 offset, u64 space_length)
29{
30#if ARCH(X86_64)
31 if (m_space_type == SpaceType::IO) {
32 VERIFY(m_io_range);
33 if (Checked<u64>::addition_would_overflow(m_io_range->address(), space_length))
34 return Error::from_errno(EOVERFLOW);
35 auto io_address_range = TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOAddressData(as_io_address().offset(offset).get(), space_length)));
36 return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(io_address_range))));
37 }
38#endif
39 VERIFY(space_type() == SpaceType::Memory);
40 VERIFY(m_memory_mapped_range);
41
42 if (Checked<u64>::addition_would_overflow(m_memory_mapped_range->paddr.get(), offset))
43 return Error::from_errno(EOVERFLOW);
44 if (Checked<u64>::addition_would_overflow(m_memory_mapped_range->paddr.get() + offset, space_length))
45 return Error::from_errno(EOVERFLOW);
46
47 auto memory_mapped_range = TRY(Memory::adopt_new_nonnull_own_typed_mapping<u8 volatile>(m_memory_mapped_range->paddr.offset(offset), space_length, Memory::Region::Access::ReadWrite));
48 return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(memory_mapped_range))));
49}
50
51ErrorOr<NonnullOwnPtr<IOWindow>> IOWindow::create_from_io_window_with_offset(u64 offset)
52{
53
54#if ARCH(X86_64)
55 if (m_space_type == SpaceType::IO) {
56 VERIFY(m_io_range);
57 VERIFY(m_io_range->space_length() >= offset);
58 return create_from_io_window_with_offset(offset, m_io_range->space_length() - offset);
59 }
60#endif
61 VERIFY(space_type() == SpaceType::Memory);
62 VERIFY(m_memory_mapped_range);
63 VERIFY(m_memory_mapped_range->length >= offset);
64 return create_from_io_window_with_offset(offset, m_memory_mapped_range->length - offset);
65}
66
67ErrorOr<NonnullOwnPtr<IOWindow>> IOWindow::create_for_pci_device_bar(PCI::DeviceIdentifier const& pci_device_identifier, PCI::HeaderType0BaseRegister pci_bar, u64 space_length)
68{
69 u64 pci_bar_value = PCI::get_BAR(pci_device_identifier, pci_bar);
70 auto pci_bar_space_type = PCI::get_BAR_space_type(pci_bar_value);
71 if (pci_bar_space_type == PCI::BARSpaceType::Memory64BitSpace) {
72 // FIXME: In theory, BAR5 cannot be assigned to 64 bit as it is the last one...
73 // however, there might be 64 bit BAR5 for real bare metal hardware, so remove this
74 // if it makes a problem.
75 if (pci_bar == PCI::HeaderType0BaseRegister::BAR5) {
76 return Error::from_errno(EINVAL);
77 }
78 u64 next_pci_bar_value = PCI::get_BAR(pci_device_identifier, static_cast<PCI::HeaderType0BaseRegister>(to_underlying(pci_bar) + 1));
79 pci_bar_value |= next_pci_bar_value << 32;
80 }
81
82 auto pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, pci_bar);
83 if (pci_bar_space_size < space_length)
84 return Error::from_errno(EIO);
85
86 if (pci_bar_space_type == PCI::BARSpaceType::IOSpace) {
87#if ARCH(X86_64)
88 if (Checked<u64>::addition_would_overflow(pci_bar_value, space_length))
89 return Error::from_errno(EOVERFLOW);
90 auto io_address_range = TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOAddressData((pci_bar_value & 0xfffffffc), space_length)));
91 return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(io_address_range))));
92#else
93 // Note: For non-x86 platforms, IO PCI BARs are simply not useable.
94 return Error::from_errno(ENOTSUP);
95#endif
96 }
97
98 if (pci_bar_space_type == PCI::BARSpaceType::Memory32BitSpace && Checked<u32>::addition_would_overflow(pci_bar_value, space_length))
99 return Error::from_errno(EOVERFLOW);
100 if (pci_bar_space_type == PCI::BARSpaceType::Memory16BitSpace && Checked<u16>::addition_would_overflow(pci_bar_value, space_length))
101 return Error::from_errno(EOVERFLOW);
102 if (pci_bar_space_type == PCI::BARSpaceType::Memory64BitSpace && Checked<u64>::addition_would_overflow(pci_bar_value, space_length))
103 return Error::from_errno(EOVERFLOW);
104 auto memory_mapped_range = TRY(Memory::adopt_new_nonnull_own_typed_mapping<u8 volatile>(PhysicalAddress(pci_bar_value & 0xfffffff0), space_length, Memory::Region::Access::ReadWrite));
105 return TRY(adopt_nonnull_own_or_enomem(new (nothrow) IOWindow(move(memory_mapped_range))));
106}
107
108ErrorOr<NonnullOwnPtr<IOWindow>> IOWindow::create_for_pci_device_bar(PCI::DeviceIdentifier const& pci_device_identifier, PCI::HeaderType0BaseRegister pci_bar)
109{
110 u64 pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, pci_bar);
111 return create_for_pci_device_bar(pci_device_identifier, pci_bar, pci_bar_space_size);
112}
113
114IOWindow::IOWindow(NonnullOwnPtr<Memory::TypedMapping<u8 volatile>> memory_mapped_range)
115 : m_space_type(SpaceType::Memory)
116 , m_memory_mapped_range(move(memory_mapped_range))
117{
118}
119
120IOWindow::~IOWindow() = default;
121
122bool IOWindow::is_access_aligned(u64 offset, size_t byte_size_access) const
123{
124 return (offset % byte_size_access) == 0;
125}
126
127bool IOWindow::is_access_in_range(u64 offset, size_t byte_size_access) const
128{
129 if (Checked<u64>::addition_would_overflow(offset, byte_size_access))
130 return false;
131#if ARCH(X86_64)
132 if (m_space_type == SpaceType::IO) {
133 VERIFY(m_io_range);
134 VERIFY(!Checked<u64>::addition_would_overflow(m_io_range->address(), m_io_range->space_length()));
135 // To understand how we treat IO address space with the corresponding calculation, the Intel Software Developer manual
136 // helps us to understand the layout of the IO address space -
137 //
138 // Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1: Basic Architecture, 16.3 I/O ADDRESS SPACE, page 16-1 wrote:
139 // Any two consecutive 8-bit ports can be treated as a 16-bit port, and any four consecutive ports can be a 32-bit port.
140 // In this manner, the processor can transfer 8, 16, or 32 bits to or from a device in the I/O address space.
141 // Like words in memory, 16-bit ports should be aligned to even addresses (0, 2, 4, ...) so that all 16 bits can be transferred in a single bus cycle.
142 // Likewise, 32-bit ports should be aligned to addresses that are multiples of four (0, 4, 8, ...).
143 // The processor supports data transfers to unaligned ports, but there is a performance penalty because one or more
144 // extra bus cycle must be used.
145 return (m_io_range->address() + m_io_range->space_length()) >= (offset + byte_size_access);
146 }
147#endif
148 VERIFY(space_type() == SpaceType::Memory);
149 VERIFY(m_memory_mapped_range);
150 VERIFY(!Checked<u64>::addition_would_overflow(m_memory_mapped_range->offset, m_memory_mapped_range->length));
151 return (m_memory_mapped_range->offset + m_memory_mapped_range->length) >= (offset + byte_size_access);
152}
153
154u8 IOWindow::read8(u64 offset)
155{
156 VERIFY(is_access_in_range(offset, sizeof(u8)));
157 u8 data { 0 };
158 in<u8>(offset, data);
159 return data;
160}
161u16 IOWindow::read16(u64 offset)
162{
163 // Note: Although it might be OK to allow unaligned access on regular memory,
164 // for memory mapped IO access, it should always be considered a bug.
165 // The same goes for port mapped IO access, because in x86 unaligned access to ports
166 // is possible but there's a performance penalty.
167 VERIFY(is_access_in_range(offset, sizeof(u16)));
168 VERIFY(is_access_aligned(offset, sizeof(u16)));
169 u16 data { 0 };
170 in<u16>(offset, data);
171 return data;
172}
173u32 IOWindow::read32(u64 offset)
174{
175 // Note: Although it might be OK to allow unaligned access on regular memory,
176 // for memory mapped IO access, it should always be considered a bug.
177 // The same goes for port mapped IO access, because in x86 unaligned access to ports
178 // is possible but there's a performance penalty.
179 VERIFY(is_access_in_range(offset, sizeof(u32)));
180 VERIFY(is_access_aligned(offset, sizeof(u32)));
181 u32 data { 0 };
182 in<u32>(offset, data);
183 return data;
184}
185
186void IOWindow::write8(u64 offset, u8 data)
187{
188 VERIFY(is_access_in_range(offset, sizeof(u8)));
189 out<u8>(offset, data);
190}
191void IOWindow::write16(u64 offset, u16 data)
192{
193 // Note: Although it might be OK to allow unaligned access on regular memory,
194 // for memory mapped IO access, it should always be considered a bug.
195 // The same goes for port mapped IO access, because in x86 unaligned access to ports
196 // is possible but there's a performance penalty.
197 VERIFY(is_access_in_range(offset, sizeof(u16)));
198 VERIFY(is_access_aligned(offset, sizeof(u16)));
199 out<u16>(offset, data);
200}
201void IOWindow::write32(u64 offset, u32 data)
202{
203 // Note: Although it might be OK to allow unaligned access on regular memory,
204 // for memory mapped IO access, it should always be considered a bug.
205 // The same goes for port mapped IO access, because in x86 unaligned access to ports
206 // is possible but there's a performance penalty.
207 VERIFY(is_access_in_range(offset, sizeof(u32)));
208 VERIFY(is_access_aligned(offset, sizeof(u32)));
209 out<u32>(offset, data);
210}
211
212void IOWindow::write32_unaligned(u64 offset, u32 data)
213{
214 // Note: We only verify that we access IO in the expected range.
215 // Note: for port mapped IO access, because in x86 unaligned access to ports
216 // is possible but there's a performance penalty, we can still allow that to happen.
217 // However, it should be noted that most cases should not use unaligned access
218 // to hardware IO, so this is a valid case in emulators or hypervisors only.
219 // Note: Using this for memory mapped IO will fail for unaligned access, because
220 // there's no valid use case for it (yet).
221 VERIFY(space_type() != SpaceType::Memory);
222 VERIFY(is_access_in_range(offset, sizeof(u32)));
223 out<u32>(offset, data);
224}
225
226u32 IOWindow::read32_unaligned(u64 offset)
227{
228 // Note: We only verify that we access IO in the expected range.
229 // Note: for port mapped IO access, because in x86 unaligned access to ports
230 // is possible but there's a performance penalty, we can still allow that to happen.
231 // However, it should be noted that most cases should not use unaligned access
232 // to hardware IO, so this is a valid case in emulators or hypervisors only.
233 // Note: Using this for memory mapped IO will fail for unaligned access, because
234 // there's no valid use case for it (yet).
235 VERIFY(space_type() != SpaceType::Memory);
236 VERIFY(is_access_in_range(offset, sizeof(u32)));
237 u32 data { 0 };
238 in<u32>(offset, data);
239 return data;
240}
241
242PhysicalAddress IOWindow::as_physical_memory_address() const
243{
244 VERIFY(space_type() == SpaceType::Memory);
245 VERIFY(m_memory_mapped_range);
246 return m_memory_mapped_range->paddr;
247}
248
249u8 volatile* IOWindow::as_memory_address_pointer()
250{
251 VERIFY(space_type() == SpaceType::Memory);
252 VERIFY(m_memory_mapped_range);
253 return m_memory_mapped_range->ptr();
254}
255
256#if ARCH(X86_64)
257IOAddress IOWindow::as_io_address() const
258{
259 VERIFY(space_type() == SpaceType::IO);
260 VERIFY(m_io_range);
261 return IOAddress(m_io_range->address());
262}
263#endif
264
265}