src/cpu/e8080/disasm.c at master

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fork of PCE focusing on macplus, supporting DaynaPort SCSI network emulation
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pce / src / cpu / e8080 / disasm.c
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Hampa Hug 8080: Add Intel 8080 and Zilog Z80 emulation 12y ago
0ec8d7a4
  1/*****************************************************************************
  2 * pce                                                                       *
  3 *****************************************************************************/
  4
  5/*****************************************************************************
  6 * File name:   src/cpu/e8080/disasm.c                                       *
  7 * Created:     2012-11-28 by Hampa Hug <hampa@hampa.ch>                     *
  8 * Copyright:   (C) 2012-2014 Hampa Hug <hampa@hampa.ch>                     *
  9 *****************************************************************************/
 10
 11/*****************************************************************************
 12 * This program is free software. You can redistribute it and / or modify it *
 13 * under the terms of the GNU General Public License version 2 as  published *
 14 * by the Free Software Foundation.                                          *
 15 *                                                                           *
 16 * This program is distributed in the hope  that  it  will  be  useful,  but *
 17 * WITHOUT  ANY   WARRANTY,   without   even   the   implied   warranty   of *
 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU  General *
 19 * Public License for more details.                                          *
 20 *****************************************************************************/
 21
 22
 23#include "e8080.h"
 24#include "internal.h"
 25
 26#include <string.h>
 27
 28
 29static
 30e8080_dop_t doptab[256] = {
 31	{ 0x00, "NOP",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 32	{ 0x01, "LXI",  "BC", NULL, ARG_STR,  ARG_IM16, 3, 10, 0 },
 33	{ 0x02, "STAX", "BC", NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
 34	{ 0x03, "INX",  "BC", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 35	{ 0x04, "INR",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 36	{ 0x05, "DCR",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 37	{ 0x06, "MVI",  "B",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 38	{ 0x07, "RLC",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 39	{ 0x08, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 40	{ 0x09, "DAD",  "BC", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 41	{ 0x0a, "LDAX", "BC", NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
 42	{ 0x0b, "DCX",  "BC", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 43	{ 0x0c, "INR",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 44	{ 0x0d, "DCR",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 45	{ 0x0e, "MVI",  "C",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 46	{ 0x0f, "RRC",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 47	{ 0x10, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 48	{ 0x11, "LXI",  "DE", NULL, ARG_STR,  ARG_IM16, 3, 10, 0 },
 49	{ 0x12, "STAX", "DE", NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
 50	{ 0x13, "INX",  "DE", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 51	{ 0x14, "INR",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 52	{ 0x15, "DCR",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 53	{ 0x16, "MVI",  "D",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 54	{ 0x17, "RAL",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 55	{ 0x18, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 56	{ 0x19, "DAD",  "DE", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 57	{ 0x1a, "LDAX", "DE", NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
 58	{ 0x1b, "DCX",  "DE", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 59	{ 0x1c, "INR",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 60	{ 0x1d, "DCR",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 61	{ 0x1e, "MVI",  "E",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 62	{ 0x1f, "RAR",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 63	{ 0x20, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 64	{ 0x21, "LXI",  "HL", NULL, ARG_STR,  ARG_IM16, 3, 10, 0 },
 65	{ 0x22, "SHLD", NULL, NULL, ARG_AD16, ARG_NONE, 3, 16, 0 },
 66	{ 0x23, "INX",  "HL", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 67	{ 0x24, "INR",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 68	{ 0x25, "DCR",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 69	{ 0x26, "MVI",  "H",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 70	{ 0x27, "DAA",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 71	{ 0x28, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 72	{ 0x29, "DAD",  "HL", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 73	{ 0x2a, "LHLD", NULL, NULL, ARG_AD16, ARG_NONE, 3, 16, 0 },
 74	{ 0x2b, "DCX",  "HL", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 75	{ 0x2c, "INR",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 76	{ 0x2d, "DCR",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 77	{ 0x2e, "MVI",  "L",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 78	{ 0x2f, "CMA",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 79	{ 0x30, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 80	{ 0x31, "LXI",  "SP", NULL, ARG_STR,  ARG_IM16, 3, 10, 0 },
 81	{ 0x32, "STA",  NULL, NULL, ARG_AD16, ARG_NONE, 3, 13, 0 },
 82	{ 0x33, "INX",  "SP", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 83	{ 0x34, "INR",  "M",  NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 84	{ 0x35, "DCR",  "M",  NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 85	{ 0x36, "MVI",  "M",  NULL, ARG_STR,  ARG_IMM8, 2, 10, 0 },
 86	{ 0x37, "STC",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 87	{ 0x38, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
 88	{ 0x39, "DAD",  "SP", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
 89	{ 0x3a, "LDA",  NULL, NULL, ARG_AD16, ARG_NONE, 3, 13, 0 },
 90	{ 0x3b, "DCX",  "SP", NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 91	{ 0x3c, "INR",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 92	{ 0x3d, "DCR",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  5, 0 },
 93	{ 0x3e, "MVI",  "A",  NULL, ARG_STR,  ARG_IMM8, 2,  7, 0 },
 94	{ 0x3f, "CMC",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
 95	{ 0x40, "MOV",  "B",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
 96	{ 0x41, "MOV",  "B",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
 97	{ 0x42, "MOV",  "B",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
 98	{ 0x43, "MOV",  "B",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
 99	{ 0x44, "MOV",  "B",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
100	{ 0x45, "MOV",  "B",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
101	{ 0x46, "MOV",  "B",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
102	{ 0x47, "MOV",  "B",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
103	{ 0x48, "MOV",  "C",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
104	{ 0x49, "MOV",  "C",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
105	{ 0x4a, "MOV",  "C",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
106	{ 0x4b, "MOV",  "C",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
107	{ 0x4c, "MOV",  "C",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
108	{ 0x4d, "MOV",  "C",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
109	{ 0x4e, "MOV",  "C",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
110	{ 0x4f, "MOV",  "C",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
111	{ 0x50, "MOV",  "D",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
112	{ 0x51, "MOV",  "D",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
113	{ 0x52, "MOV",  "D",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
114	{ 0x53, "MOV",  "D",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
115	{ 0x54, "MOV",  "D",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
116	{ 0x55, "MOV",  "D",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
117	{ 0x56, "MOV",  "D",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
118	{ 0x57, "MOV",  "D",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
119	{ 0x58, "MOV",  "E",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
120	{ 0x59, "MOV",  "E",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
121	{ 0x5a, "MOV",  "E",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
122	{ 0x5b, "MOV",  "E",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
123	{ 0x5c, "MOV",  "E",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
124	{ 0x5d, "MOV",  "E",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
125	{ 0x5e, "MOV",  "E",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
126	{ 0x5f, "MOV",  "E",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
127	{ 0x60, "MOV",  "H",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
128	{ 0x61, "MOV",  "H",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
129	{ 0x62, "MOV",  "H",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
130	{ 0x63, "MOV",  "H",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
131	{ 0x64, "MOV",  "H",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
132	{ 0x65, "MOV",  "H",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
133	{ 0x66, "MOV",  "H",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
134	{ 0x67, "MOV",  "H",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
135	{ 0x68, "MOV",  "L",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
136	{ 0x69, "MOV",  "L",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
137	{ 0x6a, "MOV",  "L",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
138	{ 0x6b, "MOV",  "L",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
139	{ 0x6c, "MOV",  "L",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
140	{ 0x6d, "MOV",  "L",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
141	{ 0x6e, "MOV",  "L",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
142	{ 0x6f, "MOV",  "L",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
143	{ 0x70, "MOV",  "M",  "B",  ARG_STR,  ARG_STR,  1,  7, 0 },
144	{ 0x71, "MOV",  "M",  "C",  ARG_STR,  ARG_STR,  1,  7, 0 },
145	{ 0x72, "MOV",  "M",  "D",  ARG_STR,  ARG_STR,  1,  7, 0 },
146	{ 0x73, "MOV",  "M",  "E",  ARG_STR,  ARG_STR,  1,  7, 0 },
147	{ 0x74, "MOV",  "M",  "H",  ARG_STR,  ARG_STR,  1,  7, 0 },
148	{ 0x75, "MOV",  "M",  "L",  ARG_STR,  ARG_STR,  1,  7, 0 },
149	{ 0x76, "HLT",  NULL, NULL, ARG_NONE, ARG_NONE, 1,  7, 0 },
150	{ 0x77, "MOV",  "M",  "A",  ARG_STR,  ARG_STR,  1,  7, 0 },
151	{ 0x78, "MOV",  "A",  "B",  ARG_STR,  ARG_STR,  1,  5, 0 },
152	{ 0x79, "MOV",  "A",  "C",  ARG_STR,  ARG_STR,  1,  5, 0 },
153	{ 0x7a, "MOV",  "A",  "D",  ARG_STR,  ARG_STR,  1,  5, 0 },
154	{ 0x7b, "MOV",  "A",  "E",  ARG_STR,  ARG_STR,  1,  5, 0 },
155	{ 0x7c, "MOV",  "A",  "H",  ARG_STR,  ARG_STR,  1,  5, 0 },
156	{ 0x7d, "MOV",  "A",  "L",  ARG_STR,  ARG_STR,  1,  5, 0 },
157	{ 0x7e, "MOV",  "A",  "M",  ARG_STR,  ARG_STR,  1,  7, 0 },
158	{ 0x7f, "MOV",  "A",  "A",  ARG_STR,  ARG_STR,  1,  5, 0 },
159	{ 0x80, "ADD",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
160	{ 0x81, "ADD",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
161	{ 0x82, "ADD",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
162	{ 0x83, "ADD",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
163	{ 0x84, "ADD",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
164	{ 0x85, "ADD",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
165	{ 0x86, "ADD",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
166	{ 0x87, "ADD",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
167	{ 0x88, "ADC",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
168	{ 0x89, "ADC",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
169	{ 0x8a, "ADC",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
170	{ 0x8b, "ADC",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
171	{ 0x8c, "ADC",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
172	{ 0x8d, "ADC",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
173	{ 0x8e, "ADC",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
174	{ 0x8f, "ADC",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
175	{ 0x90, "SUB",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
176	{ 0x91, "SUB",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
177	{ 0x92, "SUB",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
178	{ 0x93, "SUB",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
179	{ 0x94, "SUB",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
180	{ 0x95, "SUB",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
181	{ 0x96, "SUB",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
182	{ 0x97, "SUB",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
183	{ 0x98, "SBB",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
184	{ 0x99, "SBB",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
185	{ 0x9a, "SBB",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
186	{ 0x9b, "SBB",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
187	{ 0x9c, "SBB",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
188	{ 0x9d, "SBB",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
189	{ 0x9e, "SBB",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
190	{ 0x9f, "SBB",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
191	{ 0xa0, "ANA",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
192	{ 0xa1, "ANA",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
193	{ 0xa2, "ANA",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
194	{ 0xa3, "ANA",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
195	{ 0xa4, "ANA",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
196	{ 0xa5, "ANA",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
197	{ 0xa6, "ANA",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
198	{ 0xa7, "ANA",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
199	{ 0xa8, "XRA",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
200	{ 0xa9, "XRA",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
201	{ 0xaa, "XRA",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
202	{ 0xab, "XRA",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
203	{ 0xac, "XRA",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
204	{ 0xad, "XRA",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
205	{ 0xae, "XRA",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
206	{ 0xaf, "XRA",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
207	{ 0xb0, "ORA",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
208	{ 0xb1, "ORA",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
209	{ 0xb2, "ORA",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
210	{ 0xb3, "ORA",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
211	{ 0xb4, "ORA",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
212	{ 0xb5, "ORA",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
213	{ 0xb6, "ORA",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
214	{ 0xb7, "ORA",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
215	{ 0xb8, "CMP",  "B",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
216	{ 0xb9, "CMP",  "C",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
217	{ 0xba, "CMP",  "D",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
218	{ 0xbb, "CMP",  "E",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
219	{ 0xbc, "CMP",  "H",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
220	{ 0xbd, "CMP",  "L",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
221	{ 0xbe, "CMP",  "M",  NULL, ARG_STR,  ARG_NONE, 1,  7, 0 },
222	{ 0xbf, "CMP",  "A",  NULL, ARG_STR,  ARG_NONE, 1,  4, 0 },
223	{ 0xc0, "RNZ",  NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
224	{ 0xc1, "POP",  "BC", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
225	{ 0xc2, "JNZ",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
226	{ 0xc3, "JMP",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP },
227	{ 0xc4, "CNZ",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
228	{ 0xc5, "PUSH", "BC", NULL, ARG_STR,  ARG_NONE, 1, 11, 0 },
229	{ 0xc6, "ADI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
230	{ 0xc7, "RST",  "0",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
231	{ 0xc8, "RZ",   NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
232	{ 0xc9, "RET",  NULL, NULL, ARG_NONE, ARG_NONE, 1, 10, E8080_OPF_RET },
233	{ 0xca, "JZ",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
234	{ 0xcb, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
235	{ 0xcc, "CZ",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
236	{ 0xcd, "CALL", NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL },
237	{ 0xce, "ACI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
238	{ 0xcf, "RST",  "1",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
239	{ 0xd0, "RNC",  NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
240	{ 0xd1, "POP",  "DE", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
241	{ 0xd2, "JNC",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
242	{ 0xd3, "OUT",  NULL, NULL, ARG_IMM8, ARG_NONE, 2, 10, 0 },
243	{ 0xd4, "CNC",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
244	{ 0xd5, "PUSH", "DE", NULL, ARG_STR,  ARG_NONE, 1, 11, 0 },
245	{ 0xd6, "SUI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
246	{ 0xd7, "RST",  "2",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
247	{ 0xd8, "RC",   NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
248	{ 0xd9, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
249	{ 0xda, "JC",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
250	{ 0xdb, "IN",   NULL, NULL, ARG_IMM8, ARG_NONE, 2, 10, 0 },
251	{ 0xdc, "CC",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
252	{ 0xdd, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
253	{ 0xde, "SBI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
254	{ 0xdf, "RST",  "3",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
255	{ 0xe0, "RPO",  NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
256	{ 0xe1, "POP",  "HL", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
257	{ 0xe2, "JPO",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
258	{ 0xe3, "XTHL", NULL, NULL, ARG_NONE, ARG_NONE, 1, 18, 0 },
259	{ 0xe4, "CPO",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
260	{ 0xe5, "PUSH", "HL", NULL, ARG_STR,  ARG_NONE, 1, 11, 0 },
261	{ 0xe6, "ANI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
262	{ 0xe7, "RST",  "4",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
263	{ 0xe8, "RPE",  NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
264	{ 0xe9, "PCHL", NULL, NULL, ARG_NONE, ARG_NONE, 1,  5, E8080_OPF_JMP },
265	{ 0xea, "JPE",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
266	{ 0xeb, "XCHG", NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
267	{ 0xec, "CPE",  NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
268	{ 0xed, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
269	{ 0xee, "XRI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
270	{ 0xef, "RST",  "5",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
271	{ 0xf0, "RP",   NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
272	{ 0xf1, "POP",  "AF", NULL, ARG_STR,  ARG_NONE, 1, 10, 0 },
273	{ 0xf2, "JP",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
274	{ 0xf3, "DI",   NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
275	{ 0xf4, "CP",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
276	{ 0xf5, "PUSH", "AF", NULL, ARG_STR,  ARG_NONE, 1, 11, 0 },
277	{ 0xf6, "ORI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
278	{ 0xf7, "RST",  "6",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL },
279	{ 0xf8, "RM",   NULL, NULL, ARG_NONE, ARG_NONE, 1, 11, E8080_OPF_RET | E8080_OPF_COND },
280	{ 0xf9, "SPHL", NULL, NULL, ARG_NONE, ARG_NONE, 1,  5, 0 },
281	{ 0xfa, "JM",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 10, E8080_OPF_JMP | E8080_OPF_COND },
282	{ 0xfb, "EI",   NULL, NULL, ARG_NONE, ARG_NONE, 1,  4, 0 },
283	{ 0xfc, "CM",   NULL, NULL, ARG_JP16, ARG_NONE, 3, 17, E8080_OPF_CALL | E8080_OPF_COND },
284	{ 0xfd, "DB",   NULL, NULL, ARG_OPC8, ARG_NONE, 1,  4, E8080_OPF_UND },
285	{ 0xfe, "CPI",  NULL, NULL, ARG_IMM8, ARG_NONE, 2,  7, 0 },
286	{ 0xff, "RST",  "7",  NULL, ARG_STR,  ARG_NONE, 1, 11, E8080_OPF_CALL }
287};
288
289
290static
291int e8080_disasm_arg (char *dst, const unsigned char *src, const char *str, unsigned arg)
292{
293	switch (arg) {
294	case ARG_STR:
295		strcpy (dst, str);
296		return (0);
297
298	case ARG_OPC8:
299		sprintf (dst, "%02X", src[0]);
300		return (0);
301
302	case ARG_IMM8:
303		sprintf (dst, "%02X", src[1]);
304		return (0);
305
306	case ARG_AD16:
307	case ARG_IM16:
308	case ARG_JP16:
309		sprintf (dst, "%04X", e8080_uint16 (src[1], src[2]));
310		return (0);
311	}
312
313	return (1);
314}
315
316void e8080_disasm (e8080_disasm_t *op, const unsigned char *src, unsigned short pc)
317{
318	unsigned    i, n;
319	e8080_dop_t *tab;
320
321	tab = &doptab[src[0] & 0xff];
322
323	op->pc = pc;
324	op->flags = tab->flags;
325	op->data_cnt = tab->size;
326
327	for (i = 0; i < tab->size; i++) {
328		op->data[i] = src[i];
329	}
330
331	strcpy (op->op, tab->mnemonic);
332
333	n = 0;
334
335	if (e8080_disasm_arg (op->arg[n], src, tab->arg1s, tab->arg1) == 0) {
336		n += 1;
337	}
338
339	if (e8080_disasm_arg (op->arg[n], src, tab->arg2s, tab->arg2) == 0) {
340		n += 1;
341	}
342
343	op->arg_cnt = n;
344}
345
346void e8080_disasm_mem (e8080_t *c, e8080_disasm_t *op, unsigned short pc)
347{
348	unsigned      i;
349	unsigned char src[4];
350
351	for (i = 0; i < 4; i++) {
352		src[i] = e8080_get_mem8 (c, (pc + i) & 0xffff);
353	}
354
355	e8080_disasm (op, src, pc);
356}
357
358void e8080_disasm_cur (e8080_t *c, e8080_disasm_t *op)
359{
360	e8080_disasm_mem (c, op, e8080_get_pc (c));
361}