jcs.org
fork of PCE focusing on macplus, supporting DaynaPort SCSI network emulation
1/*****************************************************************************
2 * pce *
3 *****************************************************************************/
4
5/*****************************************************************************
6 * File name: src/cpu/e68000/internal.h *
7 * Created: 2005-07-17 by Hampa Hug <hampa@hampa.ch> *
8 * Copyright: (C) 2005-2021 Hampa Hug <hampa@hampa.ch> *
9 *****************************************************************************/
10
11/*****************************************************************************
12 * This program is free software. You can redistribute it and / or modify it *
13 * under the terms of the GNU General Public License version 2 as published *
14 * by the Free Software Foundation. *
15 * *
16 * This program is distributed in the hope that it will be useful, but *
17 * WITHOUT ANY WARRANTY, without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General *
19 * Public License for more details. *
20 *****************************************************************************/
21
22
23#ifndef PCE_E68000_INTERNAL_H
24#define PCE_E68000_INTERNAL_H 1
25
26
27#include <stdlib.h>
28#include <stdio.h>
29
30
31#define e68_set_clk(c, clk) do { (c)->delay += (clk); } while (0)
32
33
34#define E68_SR_XC (E68_SR_X | E68_SR_C)
35#define E68_SR_NZVC (E68_SR_N | E68_SR_Z | E68_SR_V | E68_SR_C)
36#define E68_SR_XNVC (E68_SR_X | E68_SR_N | E68_SR_V | E68_SR_C)
37#define E68_SR_XNZVC (E68_SR_X | E68_SR_N | E68_SR_Z | E68_SR_V | E68_SR_C)
38
39#define E68_CCR_MASK (E68_SR_X | E68_SR_N | E68_SR_Z | E68_SR_V | E68_SR_C)
40#define E68_SR_MASK (E68_CCR_MASK | E68_SR_S | E68_SR_T | E68_SR_I)
41
42
43
44void e68_set_sr (e68000_t *c, unsigned short val);
45
46
47static inline
48uint32_t e68_exts8 (uint32_t val)
49{
50 return ((val & 0x80) ? (val | 0xffffff00) : (val & 0x000000ff));
51}
52
53static inline
54uint32_t e68_exts16 (uint32_t val)
55{
56 return ((val & 0x8000) ? (val | 0xffff0000) : (val & 0x0000ffff));
57}
58
59static inline
60void e68_set_ccr (e68000_t *c, uint8_t val)
61{
62 c->sr = (c->sr & 0xff00) | (val & 0x00ff);
63}
64
65static inline
66void e68_set_iml (e68000_t *c, unsigned val)
67{
68 c->sr &= 0xf8ff;
69 c->sr |= (val & 7) << 8;
70}
71
72static inline
73void e68_set_usp (e68000_t *c, uint32_t val)
74{
75 if (c->supervisor) {
76 c->usp = val;
77 }
78 else {
79 c->areg[7] = val;
80 }
81}
82
83static inline
84void e68_set_ssp (e68000_t *c, uint32_t val)
85{
86 if (c->supervisor) {
87 c->areg[7] = val;
88 }
89 else {
90 c->ssp = val;
91 }
92}
93
94static inline
95void e68_push16 (e68000_t *c, uint16_t val)
96{
97 uint32_t sp;
98
99 sp = (e68_get_areg32 (c, 7) - 2) & 0xffffffff;
100
101 e68_set_mem16 (c, sp, val);
102 e68_set_areg32 (c, 7, sp);
103}
104
105static inline
106void e68_push32 (e68000_t *c, uint32_t val)
107{
108 uint32_t sp;
109
110 sp = (e68_get_areg32 (c, 7) - 4) & 0xffffffff;
111
112 e68_set_mem32 (c, sp, val);
113 e68_set_areg32 (c, 7, sp);
114}
115
116static inline
117uint16_t e68_get_uint16 (const void *buf, unsigned i)
118{
119 uint16_t r;
120 const unsigned char *tmp = (const unsigned char *) buf + i;
121
122 r = tmp[0] & 0xff;
123 r = (r << 8) | (tmp[1] & 0xff);
124
125 return (r);
126}
127
128static inline
129uint32_t e68_get_uint32 (const void *buf, unsigned i)
130{
131 uint32_t r;
132 const unsigned char *tmp = (const unsigned char *) buf + i;
133
134 r = tmp[0] & 0xff;
135 r = (r << 8) | (tmp[1] & 0xff);
136 r = (r << 8) | (tmp[2] & 0xff);
137 r = (r << 8) | (tmp[3] & 0xff);
138
139 return (r);
140}
141
142static inline
143int e68_prefetch (e68000_t *c)
144{
145 if (c->ir_pc & 1) {
146 e68_exception_address (c, c->ir_pc, 0, 0);
147 return (1);
148 }
149
150 c->ir[1] = c->ir[2];
151 c->ir[2] = e68_get_mem16 (c, c->ir_pc);
152
153 if (c->bus_error) {
154 e68_exception_bus (c, c->ir_pc, 0, 0);
155 return (1);
156 }
157
158 c->ir_pc += 2;
159 c->pc += 2;
160
161 return (0);
162}
163
164
165#define e68_ir_ea1(c) ((c)->ir[0] & 0x3f)
166#define e68_ir_ea2(c) ((((c)->ir[0] >> 3) & 0x38) | (((c)->ir[0] >> 9) & 0x07))
167#define e68_ir_reg0(c) ((c)->ir[0] & 7)
168#define e68_ir_reg9(c) (((c)->ir[0] >> 9) & 7)
169
170#define e68_op_prefetch(c) if (e68_prefetch (c)) return;
171
172#define e68_op_prefetch8(c, v) do { \
173 if (e68_prefetch (c)) return; \
174 (v) = (c)->ir[1] & 0xff; \
175 } while (0)
176
177#define e68_op_prefetch16(c, v) do { \
178 if (e68_prefetch (c)) return; \
179 (v) = (c)->ir[1]; \
180 } while (0)
181
182#define e68_op_prefetch32(c, v) do { \
183 if (e68_prefetch (c)) return; \
184 (v) = (c)->ir[1]; \
185 if (e68_prefetch (c)) return; \
186 (v) = ((v) << 16) | (c)->ir[1]; \
187 } while (0)
188
189#define e68_op_get_ea8(c, ptr, ea, msk, val) do { \
190 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 8)) return; \
191 if (e68_ea_get_val8 (c, val)) return; \
192 } while (0)
193
194#define e68_op_get_ea16(c, ptr, ea, msk, val) do { \
195 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 16)) return; \
196 if (e68_ea_get_val16 (c, val)) return; \
197 } while (0)
198
199#define e68_op_get_ea32(c, ptr, ea, msk, val) do { \
200 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 32)) return; \
201 if (e68_ea_get_val32 (c, val)) return; \
202 } while (0)
203
204#define e68_op_set_ea8(c, ptr, ea, msk, val) do { \
205 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 8)) return; \
206 if (e68_ea_set_val8 (c, val)) return; \
207 } while (0)
208
209#define e68_op_set_ea16(c, ptr, ea, msk, val) do { \
210 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 16)) return; \
211 if (e68_ea_set_val16 (c, val)) return; \
212 } while (0)
213
214#define e68_op_set_ea32(c, ptr, ea, msk, val) do { \
215 if (ptr) if (e68_ea_get_ptr (c, ea, msk, 32)) return; \
216 if (e68_ea_set_val32 (c, val)) return; \
217 } while (0)
218
219
220void e68_op_dbcc (e68000_t *c, int cond);
221void e68_op_scc (e68000_t *c, int cond);
222
223void e68_cc_set_nz_8 (e68000_t *c, uint8_t msk, uint8_t val);
224void e68_cc_set_nz_16 (e68000_t *c, uint8_t msk, uint16_t val);
225void e68_cc_set_nz_32 (e68000_t *c, uint8_t msk, uint32_t val);
226
227void e68_cc_set_add_8 (e68000_t *c, uint8_t d, uint8_t s1, uint8_t s2);
228void e68_cc_set_add_16 (e68000_t *c, uint16_t d, uint16_t s1, uint16_t s2);
229void e68_cc_set_add_32 (e68000_t *c, uint32_t d, uint32_t s1, uint32_t s2);
230
231void e68_cc_set_addx_8 (e68000_t *c, uint8_t d, uint8_t s1, uint8_t s2);
232void e68_cc_set_addx_16 (e68000_t *c, uint16_t d, uint16_t s1, uint16_t s2);
233void e68_cc_set_addx_32 (e68000_t *c, uint32_t d, uint32_t s1, uint32_t s2);
234
235void e68_cc_set_cmp_8 (e68000_t *c, uint8_t d, uint8_t s1, uint8_t s2);
236void e68_cc_set_cmp_16 (e68000_t *c, uint16_t d, uint16_t s1, uint16_t s2);
237void e68_cc_set_cmp_32 (e68000_t *c, uint32_t d, uint32_t s1, uint32_t s2);
238
239void e68_cc_set_sub_8 (e68000_t *c, uint8_t d, uint8_t s1, uint8_t s2);
240void e68_cc_set_sub_16 (e68000_t *c, uint16_t d, uint16_t s1, uint16_t s2);
241void e68_cc_set_sub_32 (e68000_t *c, uint32_t d, uint32_t s1, uint32_t s2);
242
243void e68_cc_set_subx_8 (e68000_t *c, uint8_t d, uint8_t s1, uint8_t s2);
244void e68_cc_set_subx_16 (e68000_t *c, uint16_t d, uint16_t s1, uint16_t s2);
245void e68_cc_set_subx_32 (e68000_t *c, uint32_t d, uint32_t s1, uint32_t s2);
246
247
248#define E68_EA_TYPE_IMM 0
249#define E68_EA_TYPE_REG 1
250#define E68_EA_TYPE_MEM 2
251
252typedef int (*e68_get_ea_ptr_f) (e68000_t *c, unsigned ea, unsigned mask, unsigned size);
253
254extern e68_get_ea_ptr_f e68_ea_tab[64];
255
256static inline
257int e68_ea_get_ptr (e68000_t *c, unsigned ea, unsigned mask, unsigned size)
258{
259 return (e68_ea_tab[ea] (c, ea, mask, size));
260}
261
262int e68_ea_get_val8 (e68000_t *c, uint8_t *val);
263int e68_ea_get_val16 (e68000_t *c, uint16_t *val);
264int e68_ea_get_val32 (e68000_t *c, uint32_t *val);
265int e68_ea_set_val8 (e68000_t *c, uint8_t val);
266int e68_ea_set_val16 (e68000_t *c, uint16_t val);
267int e68_ea_set_val32 (e68000_t *c, uint32_t val);
268
269
270void e68_set_opcodes (e68000_t *c);
271void e68_set_opcodes_020 (e68000_t *c);
272
273
274#endif