jcs.org
fork of PCE focusing on macplus, supporting DaynaPort SCSI network emulation
1/*****************************************************************************
2 * pce *
3 *****************************************************************************/
4
5/*****************************************************************************
6 * File name: src/arch/simarm/intc.h *
7 * Created: 2004-11-13 by Hampa Hug <hampa@hampa.ch> *
8 * Copyright: (C) 2004-2009 Hampa Hug <hampa@hampa.ch> *
9 * Copyright: (C) 2004-2006 Lukas Ruf <ruf@lpr.ch> *
10 *****************************************************************************/
11
12/*****************************************************************************
13 * This program is free software. You can redistribute it and / or modify it *
14 * under the terms of the GNU General Public License version 2 as published *
15 * by the Free Software Foundation. *
16 * *
17 * This program is distributed in the hope that it will be useful, but *
18 * WITHOUT ANY WARRANTY, without even the implied warranty of *
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General *
20 * Public License for more details. *
21 *****************************************************************************/
22
23/*****************************************************************************
24 * This software was developed at the Computer Engineering and Networks *
25 * Laboratory (TIK), Swiss Federal Institute of Technology (ETH) Zurich. *
26 *****************************************************************************/
27
28
29/* IXP2400 interrupt controller */
30
31#ifndef PCE_SIMARM_INTC_H
32#define PCE_SIMARM_INTC_H 1
33
34
35#include <stdio.h>
36
37#include <devices/memory.h>
38
39
40/*!***************************************************************************
41 * @short The IXP interrupt controller context
42 *****************************************************************************/
43typedef struct ixp_intc_s {
44 mem_blk_t io;
45
46 unsigned long base;
47
48 void (*fiq) (void *ext, unsigned char val);
49 void *fiq_ext;
50 unsigned char fiq_val;
51
52 void (*irq) (void *ext, unsigned char val);
53 void *irq_ext;
54 unsigned char irq_val;
55
56 unsigned long status_raw;
57 unsigned long status_fiq;
58 unsigned long status_irq;
59 unsigned long enable_fiq;
60 unsigned long enable_irq;
61} ixp_intc_t;
62
63
64void ict_init (ixp_intc_t *ict, unsigned long base);
65ixp_intc_t *ict_new (unsigned long base);
66void ict_free (ixp_intc_t *ict);
67void ict_del (ixp_intc_t *ict);
68
69mem_blk_t *ict_get_io (ixp_intc_t *ict, unsigned i);
70
71void ict_set_fiq_f (ixp_intc_t *ict, void *f, void *ext);
72void ict_set_irq_f (ixp_intc_t *ict, void *f, void *ext);
73
74void *ict_get_irq_f (ixp_intc_t *ict, unsigned irq);
75
76void ict_set_irq (ixp_intc_t *ict, unsigned i, unsigned char val);
77
78void ict_set_irq0 (ixp_intc_t *ict, unsigned char val);
79void ict_set_irq1 (ixp_intc_t *ict, unsigned char val);
80void ict_set_irq2 (ixp_intc_t *ict, unsigned char val);
81void ict_set_irq3 (ixp_intc_t *ict, unsigned char val);
82void ict_set_irq4 (ixp_intc_t *ict, unsigned char val);
83void ict_set_irq5 (ixp_intc_t *ict, unsigned char val);
84void ict_set_irq6 (ixp_intc_t *ict, unsigned char val);
85void ict_set_irq7 (ixp_intc_t *ict, unsigned char val);
86void ict_set_irq8 (ixp_intc_t *ict, unsigned char val);
87void ict_set_irq9 (ixp_intc_t *ict, unsigned char val);
88void ict_set_irq10 (ixp_intc_t *ict, unsigned char val);
89void ict_set_irq11 (ixp_intc_t *ict, unsigned char val);
90void ict_set_irq12 (ixp_intc_t *ict, unsigned char val);
91void ict_set_irq13 (ixp_intc_t *ict, unsigned char val);
92void ict_set_irq14 (ixp_intc_t *ict, unsigned char val);
93void ict_set_irq15 (ixp_intc_t *ict, unsigned char val);
94void ict_set_irq16 (ixp_intc_t *ict, unsigned char val);
95void ict_set_irq17 (ixp_intc_t *ict, unsigned char val);
96void ict_set_irq18 (ixp_intc_t *ict, unsigned char val);
97void ict_set_irq19 (ixp_intc_t *ict, unsigned char val);
98void ict_set_irq20 (ixp_intc_t *ict, unsigned char val);
99void ict_set_irq21 (ixp_intc_t *ict, unsigned char val);
100void ict_set_irq22 (ixp_intc_t *ict, unsigned char val);
101void ict_set_irq23 (ixp_intc_t *ict, unsigned char val);
102void ict_set_irq24 (ixp_intc_t *ict, unsigned char val);
103void ict_set_irq25 (ixp_intc_t *ict, unsigned char val);
104void ict_set_irq26 (ixp_intc_t *ict, unsigned char val);
105void ict_set_irq27 (ixp_intc_t *ict, unsigned char val);
106void ict_set_irq28 (ixp_intc_t *ict, unsigned char val);
107void ict_set_irq29 (ixp_intc_t *ict, unsigned char val);
108void ict_set_irq30 (ixp_intc_t *ict, unsigned char val);
109void ict_set_irq31 (ixp_intc_t *ict, unsigned char val);
110
111
112#endif