huwcampbell.com
Reactos
1/*
2 *
3 */
4
5#pragma once
6
7#ifdef CONFIG_SMP
8#define HAL_BUILD_TYPE (DBG ? PRCB_BUILD_DEBUG : 0)
9#else
10#define HAL_BUILD_TYPE ((DBG ? PRCB_BUILD_DEBUG : 0) | PRCB_BUILD_UNIPROCESSOR)
11#endif
12
13/* Don't include this in freeloader */
14#ifndef _BLDR_
15extern KIRQL HalpIrqlSynchLevel;
16
17#undef SYNCH_LEVEL
18#define SYNCH_LEVEL HalpIrqlSynchLevel
19#endif
20
21typedef struct _HAL_BIOS_FRAME
22{
23 ULONG SegSs;
24 ULONG Esp;
25 ULONG EFlags;
26 ULONG SegCs;
27 ULONG Eip;
28 PKTRAP_FRAME TrapFrame;
29 ULONG CsLimit;
30 ULONG CsBase;
31 ULONG CsFlags;
32 ULONG SsLimit;
33 ULONG SsBase;
34 ULONG SsFlags;
35 ULONG Prefix;
36} HAL_BIOS_FRAME, *PHAL_BIOS_FRAME;
37
38typedef
39VOID
40(__cdecl *PHAL_SW_INTERRUPT_HANDLER)(
41 VOID
42);
43
44typedef
45VOID
46(FASTCALL *PHAL_SW_INTERRUPT_HANDLER_2ND_ENTRY)(
47 IN PKTRAP_FRAME TrapFrame
48);
49
50#define HAL_APC_REQUEST 0
51#define HAL_DPC_REQUEST 1
52
53/* HAL profiling offsets in KeGetPcr()->HalReserved[] */
54#define HAL_PROFILING_INTERVAL 0
55#define HAL_PROFILING_MULTIPLIER 1
56
57/* Usage flags */
58#define IDT_REGISTERED 0x01
59#define IDT_LATCHED 0x02
60#define IDT_READ_ONLY 0x04
61#define IDT_INTERNAL 0x11
62#define IDT_DEVICE 0x21
63
64#ifdef _M_AMD64
65#define HALP_LOW_STUB_SIZE_IN_PAGES 5
66#else
67#define HALP_LOW_STUB_SIZE_IN_PAGES 3
68#endif
69
70FORCEINLINE
71UCHAR
72BCD_INT(
73 _In_ UCHAR Bcd)
74{
75 return ((Bcd & 0xF0) >> 4) * 10 + (Bcd & 0x0F);
76}
77
78FORCEINLINE
79UCHAR
80INT_BCD(
81 _In_ CSHORT Int)
82{
83 return ((Int / 10) << 4) + (Int % 10);
84}
85
86typedef
87BOOLEAN
88(NTAPI *PHAL_DISMISS_INTERRUPT)(
89 IN KIRQL Irql,
90 IN ULONG Irq,
91 OUT PKIRQL OldIrql
92);
93
94BOOLEAN
95NTAPI
96HalpDismissIrqGeneric(
97 IN KIRQL Irql,
98 IN ULONG Irq,
99 OUT PKIRQL OldIrql
100);
101
102BOOLEAN
103NTAPI
104HalpDismissIrq15(
105 IN KIRQL Irql,
106 IN ULONG Irq,
107 OUT PKIRQL OldIrql
108);
109
110BOOLEAN
111NTAPI
112HalpDismissIrq13(
113 IN KIRQL Irql,
114 IN ULONG Irq,
115 OUT PKIRQL OldIrql
116);
117
118BOOLEAN
119NTAPI
120HalpDismissIrq07(
121 IN KIRQL Irql,
122 IN ULONG Irq,
123 OUT PKIRQL OldIrql
124);
125
126BOOLEAN
127NTAPI
128HalpDismissIrqLevel(
129 IN KIRQL Irql,
130 IN ULONG Irq,
131 OUT PKIRQL OldIrql
132);
133
134BOOLEAN
135NTAPI
136HalpDismissIrq15Level(
137 IN KIRQL Irql,
138 IN ULONG Irq,
139 OUT PKIRQL OldIrql
140);
141
142BOOLEAN
143NTAPI
144HalpDismissIrq13Level(
145 IN KIRQL Irql,
146 IN ULONG Irq,
147 OUT PKIRQL OldIrql
148);
149
150BOOLEAN
151NTAPI
152HalpDismissIrq07Level(
153 IN KIRQL Irql,
154 IN ULONG Irq,
155 OUT PKIRQL OldIrql
156);
157
158VOID
159__cdecl
160HalpHardwareInterruptLevel(
161 VOID
162);
163
164//
165// Hack Flags
166//
167#define HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24)
168#define HALP_REVISION_HACK_FLAGS(x) ((x) >> 12)
169#define HALP_HACK_FLAGS(x) ((x) & 0xFFF)
170
171//
172// Feature flags
173//
174#define HALP_CARD_FEATURE_FULL_DECODE 0x0001
175
176//
177// Match Flags
178//
179#define HALP_CHECK_CARD_REVISION_ID 0x10000
180#define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000
181#define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000
182
183//
184// Mm PTE/PDE to Hal PTE/PDE
185//
186#define HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x)
187#define HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x)
188
189typedef struct _IDTUsageFlags
190{
191 UCHAR Flags;
192} IDTUsageFlags;
193
194typedef struct
195{
196 KIRQL Irql;
197 UCHAR BusReleativeVector;
198} IDTUsage;
199
200typedef struct _HalAddressUsage
201{
202 struct _HalAddressUsage *Next;
203 CM_RESOURCE_TYPE Type;
204 UCHAR Flags;
205 struct
206 {
207 ULONG Start;
208 ULONG Length;
209 } Element[];
210} ADDRESS_USAGE, *PADDRESS_USAGE;
211
212/* adapter.c */
213PADAPTER_OBJECT NTAPI HalpAllocateAdapterEx(ULONG NumberOfMapRegisters,BOOLEAN IsMaster, BOOLEAN Dma32BitAddresses);
214
215/* sysinfo.c */
216CODE_SEG("INIT")
217VOID
218NTAPI
219HalpRegisterVector(IN UCHAR Flags,
220 IN ULONG BusVector,
221 IN ULONG SystemVector,
222 IN KIRQL Irql);
223
224CODE_SEG("INIT")
225VOID
226NTAPI
227HalpEnableInterruptHandler(IN UCHAR Flags,
228 IN ULONG BusVector,
229 IN ULONG SystemVector,
230 IN KIRQL Irql,
231 IN PVOID Handler,
232 IN KINTERRUPT_MODE Mode);
233
234/* pic.c */
235VOID NTAPI HalpInitializePICs(IN BOOLEAN EnableInterrupts);
236VOID __cdecl HalpApcInterrupt(VOID);
237VOID __cdecl HalpDispatchInterrupt(VOID);
238PHAL_SW_INTERRUPT_HANDLER __cdecl HalpDispatchInterrupt2(VOID);
239DECLSPEC_NORETURN VOID FASTCALL HalpApcInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
240DECLSPEC_NORETURN VOID FASTCALL HalpDispatchInterrupt2ndEntry(IN PKTRAP_FRAME TrapFrame);
241
242/* profil.c */
243extern BOOLEAN HalpProfilingStopped;
244
245/* timer.c */
246CODE_SEG("INIT") VOID NTAPI HalpInitializeClock(VOID);
247VOID __cdecl HalpClockInterrupt(VOID);
248VOID __cdecl HalpClockIpi(VOID);
249VOID __cdecl HalpProfileInterrupt(VOID);
250
251typedef struct _HALP_ROLLOVER
252{
253 ULONG RollOver;
254 ULONG Increment;
255} HALP_ROLLOVER, *PHALP_ROLLOVER;
256
257VOID
258NTAPI
259HalpCalibrateStallExecution(VOID);
260
261/* pci.c */
262VOID HalpInitPciBus (VOID);
263
264/* dma.c */
265CODE_SEG("INIT") VOID HalpInitDma (VOID);
266
267/* Non-generic initialization */
268VOID HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock);
269VOID HalpInitPhase1(VOID);
270
271VOID
272NTAPI
273HalpFlushTLB(VOID);
274
275//
276// KD Support
277//
278VOID
279NTAPI
280HalpCheckPowerButton(
281 VOID
282);
283
284CODE_SEG("INIT")
285VOID
286NTAPI
287HalpRegisterKdSupportFunctions(
288 VOID
289);
290
291CODE_SEG("INIT")
292NTSTATUS
293NTAPI
294HalpSetupPciDeviceForDebugging(
295 IN PVOID LoaderBlock,
296 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
297);
298
299CODE_SEG("INIT")
300NTSTATUS
301NTAPI
302HalpReleasePciDeviceForDebugging(
303 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
304);
305
306//
307// Memory routines
308//
309ULONG64
310NTAPI
311HalpAllocPhysicalMemory(
312 IN PLOADER_PARAMETER_BLOCK LoaderBlock,
313 IN ULONG64 MaxAddress,
314 IN PFN_NUMBER PageCount,
315 IN BOOLEAN Aligned
316);
317
318PVOID
319NTAPI
320HalpMapPhysicalMemory64Vista(
321 IN PHYSICAL_ADDRESS PhysicalAddress,
322 IN PFN_COUNT PageCount,
323 IN BOOLEAN FlushCurrentTLB
324);
325
326VOID
327NTAPI
328HalpUnmapVirtualAddressVista(
329 IN PVOID VirtualAddress,
330 IN PFN_COUNT NumberPages,
331 IN BOOLEAN FlushCurrentTLB
332);
333
334PVOID
335NTAPI
336HalpMapPhysicalMemory64(
337 IN PHYSICAL_ADDRESS PhysicalAddress,
338 IN PFN_COUNT PageCount
339);
340
341VOID
342NTAPI
343HalpUnmapVirtualAddress(
344 IN PVOID VirtualAddress,
345 IN PFN_COUNT NumberPages
346);
347
348/* sysinfo.c */
349NTSTATUS
350NTAPI
351HaliHandlePCIConfigSpaceAccess(
352 _In_ BOOLEAN IsRead,
353 _In_ ULONG Port,
354 _In_ ULONG Length,
355 _Inout_ PULONG Buffer
356);
357
358NTSTATUS
359NTAPI
360HaliQuerySystemInformation(
361 IN HAL_QUERY_INFORMATION_CLASS InformationClass,
362 IN ULONG BufferSize,
363 IN OUT PVOID Buffer,
364 OUT PULONG ReturnedLength
365);
366
367NTSTATUS
368NTAPI
369HaliSetSystemInformation(
370 IN HAL_SET_INFORMATION_CLASS InformationClass,
371 IN ULONG BufferSize,
372 IN OUT PVOID Buffer
373);
374
375//
376// BIOS Routines
377//
378BOOLEAN
379NTAPI
380HalpBiosDisplayReset(
381 VOID
382);
383
384VOID
385FASTCALL
386HalpExitToV86(
387 PKTRAP_FRAME TrapFrame
388);
389
390VOID
391__cdecl
392HalpRealModeStart(
393 VOID
394);
395
396//
397// Processor Halt Routine
398//
399VOID
400NTAPI
401HaliHaltSystem(
402 VOID
403);
404
405//
406// CMOS Routines
407//
408CODE_SEG("INIT")
409VOID
410NTAPI
411HalpInitializeCmos(
412 VOID
413);
414
415_Requires_lock_held_(HalpSystemHardwareLock)
416UCHAR
417NTAPI
418HalpReadCmos(
419 IN UCHAR Reg
420);
421
422_Requires_lock_held_(HalpSystemHardwareLock)
423VOID
424NTAPI
425HalpWriteCmos(
426 IN UCHAR Reg,
427 IN UCHAR Value
428);
429
430//
431// Spinlock for protecting CMOS access
432//
433_Acquires_lock_(HalpSystemHardwareLock)
434VOID
435NTAPI
436HalpAcquireCmosSpinLock(
437 VOID
438);
439
440_Releases_lock_(HalpSystemHardwareLock)
441VOID
442NTAPI
443HalpReleaseCmosSpinLock(
444 VOID
445);
446
447VOID
448NTAPI
449HalpInitializeLegacyPICs(
450 VOID
451);
452
453NTSTATUS
454NTAPI
455HalpOpenRegistryKey(
456 IN PHANDLE KeyHandle,
457 IN HANDLE RootKey,
458 IN PUNICODE_STRING KeyName,
459 IN ACCESS_MASK DesiredAccess,
460 IN BOOLEAN Create
461);
462
463CODE_SEG("INIT")
464VOID
465NTAPI
466HalpGetNMICrashFlag(
467 VOID
468);
469
470CODE_SEG("INIT")
471BOOLEAN
472NTAPI
473HalpGetDebugPortTable(
474 VOID
475);
476
477CODE_SEG("INIT")
478VOID
479NTAPI
480HalpReportSerialNumber(
481 VOID
482);
483
484CODE_SEG("INIT")
485NTSTATUS
486NTAPI
487HalpMarkAcpiHal(
488 VOID
489);
490
491CODE_SEG("INIT")
492VOID
493NTAPI
494HalpBuildAddressMap(
495 VOID
496);
497
498CODE_SEG("INIT")
499VOID
500NTAPI
501HalpReportResourceUsage(
502 IN PUNICODE_STRING HalName,
503 IN INTERFACE_TYPE InterfaceType
504);
505
506CODE_SEG("INIT")
507ULONG
508NTAPI
509HalpIs16BitPortDecodeSupported(
510 VOID
511);
512
513NTSTATUS
514NTAPI
515HalpQueryAcpiResourceRequirements(
516 OUT PIO_RESOURCE_REQUIREMENTS_LIST *Requirements
517);
518
519VOID
520FASTCALL
521KeUpdateSystemTime(
522 IN PKTRAP_FRAME TrapFrame,
523 IN ULONG Increment,
524 IN KIRQL OldIrql
525);
526
527VOID
528NTAPI
529KeUpdateRunTime(
530 _In_ PKTRAP_FRAME TrapFrame,
531 _In_ KIRQL Irql);
532
533CODE_SEG("INIT")
534VOID
535NTAPI
536HalpInitBusHandlers(
537 VOID
538);
539
540NTSTATUS
541NTAPI
542HaliInitPnpDriver(
543 VOID
544);
545
546CODE_SEG("INIT")
547VOID
548NTAPI
549HalpDebugPciDumpBus(
550 IN PBUS_HANDLER BusHandler,
551 IN PCI_SLOT_NUMBER PciSlot,
552 IN ULONG i,
553 IN ULONG j,
554 IN ULONG k,
555 IN PPCI_COMMON_CONFIG PciData
556);
557
558VOID
559NTAPI
560HalpInitProcessor(
561 IN ULONG ProcessorNumber,
562 IN PLOADER_PARAMETER_BLOCK LoaderBlock
563);
564
565#if defined(SARCH_PC98)
566BOOLEAN
567NTAPI
568HalpDismissIrq08(
569 _In_ KIRQL Irql,
570 _In_ ULONG Irq,
571 _Out_ PKIRQL OldIrql
572);
573
574BOOLEAN
575NTAPI
576HalpDismissIrq08Level(
577 _In_ KIRQL Irql,
578 _In_ ULONG Irq,
579 _Out_ PKIRQL OldIrql
580);
581
582VOID
583NTAPI
584HalpInitializeClockPc98(VOID);
585
586extern ULONG PIT_FREQUENCY;
587#endif /* SARCH_PC98 */
588
589VOID
590NTAPI
591HalInitializeBios(
592 _In_ ULONG Phase,
593 _In_ PLOADER_PARAMETER_BLOCK LoaderBlock
594);
595
596#ifdef _M_AMD64
597#define KfLowerIrql KeLowerIrql
598#define KiEnterInterruptTrap(TrapFrame) /* We do all neccessary in asm code */
599#endif // _M_AMD64
600
601#ifdef _MINIHAL_
602#if defined(_M_IX86) || defined(_M_AMD64)
603/* Use intrinsics for IA-32 and amd64 */
604#include <ioaccess.h>
605
606#define READ_PORT_BUFFER_UCHAR(port, buffer, count) __inbytestring(H2I(port), buffer, count)
607#define READ_PORT_BUFFER_USHORT(port, buffer, count) __inwordstring(H2I(port), buffer, count)
608#define READ_PORT_BUFFER_ULONG(port, buffer, count) __indwordstring(H2I(port), buffer, count)
609#define WRITE_PORT_BUFFER_UCHAR(port, buffer, count) __outbytestring(H2I(port), buffer, count)
610#define WRITE_PORT_BUFFER_USHORT(port, buffer, count) __outwordstring(H2I(port), buffer, count)
611#define WRITE_PORT_BUFFER_ULONG(port, buffer, count) __outdwordstring(H2I(port), buffer, count)
612#endif
613#endif
614
615extern BOOLEAN HalpNMIInProgress;
616
617extern ADDRESS_USAGE HalpDefaultIoSpace;
618
619extern KSPIN_LOCK HalpSystemHardwareLock;
620
621extern PADDRESS_USAGE HalpAddressUsageList;
622
623extern LARGE_INTEGER HalpPerfCounter;
624
625extern KAFFINITY HalpActiveProcessors;
626
627extern BOOLEAN HalDisableFirmwareMapper;
628extern PWCHAR HalHardwareIdString;
629extern PWCHAR HalName;
630
631extern KAFFINITY HalpDefaultInterruptAffinity;
632
633extern IDTUsageFlags HalpIDTUsageFlags[MAXIMUM_IDTVECTOR+1];
634
635extern const USHORT HalpBuildType;